X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=examples%2Fvm_power_manager%2Fpower_manager.c;h=7b4f4b3c4dfaeabc189f90e90aaf771a40c4a3b7;hb=0c2b79e8d59f31bc4bd39a7cd8f1960689465979;hp=1834a823fcca98b46665b6e1df9b6dfb4ae8cb78;hpb=7f472f7486d21f88b6a8bf0ba6f2d404e665c0b5;p=dpdk.git diff --git a/examples/vm_power_manager/power_manager.c b/examples/vm_power_manager/power_manager.c index 1834a823fc..7b4f4b3c4d 100644 --- a/examples/vm_power_manager/power_manager.c +++ b/examples/vm_power_manager/power_manager.c @@ -1,34 +1,5 @@ -/*- - * BSD LICENSE - * - * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2010-2014 Intel Corporation */ #include @@ -41,105 +12,116 @@ #include #include +#include #include #include #include #include +#include "channel_manager.h" #include "power_manager.h" - -#define RTE_LOGTYPE_POWER_MANAGER RTE_LOGTYPE_USER1 +#include "oob_monitor.h" #define POWER_SCALE_CORE(DIRECTION, core_num , ret) do { \ - if (core_num >= POWER_MGR_MAX_CPUS) \ + if (core_num >= ci.core_count) \ return -1; \ - if (!(global_enabled_cpus & (1ULL << core_num))) \ + if (!(ci.cd[core_num].global_enabled_cpus)) \ return -1; \ rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \ ret = rte_power_freq_##DIRECTION(core_num); \ rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \ } while (0) -#define POWER_SCALE_MASK(DIRECTION, core_mask, ret) do { \ - int i; \ - for (i = 0; core_mask; core_mask &= ~(1 << i++)) { \ - if ((core_mask >> i) & 1) { \ - if (!(global_enabled_cpus & (1ULL << i))) \ - continue; \ - rte_spinlock_lock(&global_core_freq_info[i].power_sl); \ - if (rte_power_freq_##DIRECTION(i) != 1) \ - ret = -1; \ - rte_spinlock_unlock(&global_core_freq_info[i].power_sl); \ - } \ - } \ -} while (0) - struct freq_info { rte_spinlock_t power_sl; uint32_t freqs[RTE_MAX_LCORE_FREQS]; unsigned num_freqs; } __rte_cache_aligned; -static struct freq_info global_core_freq_info[POWER_MGR_MAX_CPUS]; +static struct freq_info global_core_freq_info[RTE_MAX_LCORE]; -static uint64_t global_enabled_cpus; +struct core_info ci; #define SYSFS_CPU_PATH "/sys/devices/system/cpu/cpu%u/topology/core_id" -static unsigned -set_host_cpus_mask(void) +struct core_info * +get_core_info(void) { - char path[PATH_MAX]; - unsigned i; - unsigned num_cpus = 0; - - for (i = 0; i < POWER_MGR_MAX_CPUS; i++) { - snprintf(path, sizeof(path), SYSFS_CPU_PATH, i); - if (access(path, F_OK) == 0) { - global_enabled_cpus |= 1ULL << i; - num_cpus++; - } else - return num_cpus; + return &ci; +} + +int +core_info_init(void) +{ + struct core_info *ci; + int i; + + ci = get_core_info(); + + ci->core_count = get_nprocs_conf(); + ci->branch_ratio_threshold = BRANCH_RATIO_THRESHOLD; + ci->cd = malloc(ci->core_count * sizeof(struct core_details)); + memset(ci->cd, 0, ci->core_count * sizeof(struct core_details)); + if (!ci->cd) { + RTE_LOG(ERR, POWER_MANAGER, "Failed to allocate memory for core info."); + return -1; + } + for (i = 0; i < ci->core_count; i++) { + ci->cd[i].global_enabled_cpus = 1; } - return num_cpus; + printf("%d cores in system\n", ci->core_count); + return 0; } int power_manager_init(void) { - unsigned int i, num_cpus, num_freqs; - uint64_t cpu_mask; + unsigned int i, num_cpus = 0, num_freqs = 0; int ret = 0; + struct core_info *ci; + unsigned int max_core_num; - num_cpus = set_host_cpus_mask(); - if (num_cpus == 0) { - RTE_LOG(ERR, POWER_MANAGER, "Unable to detected host CPUs, please " - "ensure that sufficient privileges exist to inspect sysfs\n"); + rte_power_set_env(PM_ENV_NOT_SET); + + ci = get_core_info(); + if (!ci) { + RTE_LOG(ERR, POWER_MANAGER, + "Failed to get core info!\n"); return -1; } - rte_power_set_env(PM_ENV_ACPI_CPUFREQ); - cpu_mask = global_enabled_cpus; - for (i = 0; cpu_mask; cpu_mask &= ~(1 << i++)) { - if (rte_power_init(i) < 0) - RTE_LOG(ERR, POWER_MANAGER, - "Unable to initialize power manager " - "for core %u\n", i); - num_freqs = rte_power_freqs(i, global_core_freq_info[i].freqs, + + if (ci->core_count > RTE_MAX_LCORE) + max_core_num = RTE_MAX_LCORE; + else + max_core_num = ci->core_count; + + for (i = 0; i < max_core_num; i++) { + if (ci->cd[i].global_enabled_cpus) { + if (rte_power_init(i) < 0) + RTE_LOG(ERR, POWER_MANAGER, + "Unable to initialize power manager " + "for core %u\n", i); + num_cpus++; + num_freqs = rte_power_freqs(i, + global_core_freq_info[i].freqs, RTE_MAX_LCORE_FREQS); - if (num_freqs == 0) { - RTE_LOG(ERR, POWER_MANAGER, - "Unable to get frequency list for core %u\n", - i); - global_enabled_cpus &= ~(1 << i); - num_cpus--; - ret = -1; + if (num_freqs == 0) { + RTE_LOG(ERR, POWER_MANAGER, + "Unable to get frequency list for core %u\n", + i); + ci->cd[i].oob_enabled = 0; + ret = -1; + } + global_core_freq_info[i].num_freqs = num_freqs; + + rte_spinlock_init(&global_core_freq_info[i].power_sl); } - global_core_freq_info[i].num_freqs = num_freqs; - rte_spinlock_init(&global_core_freq_info[i].power_sl); + if (ci->cd[i].oob_enabled) + add_core_to_monitor(i); } - RTE_LOG(INFO, POWER_MANAGER, "Detected %u host CPUs , enabled core mask:" - " 0x%"PRIx64"\n", num_cpus, global_enabled_cpus); + RTE_LOG(INFO, POWER_MANAGER, "Managing %u cores out of %u available host cores\n", + num_cpus, ci->core_count); return ret; } @@ -149,18 +131,18 @@ power_manager_get_current_frequency(unsigned core_num) { uint32_t freq, index; - if (core_num >= POWER_MGR_MAX_CPUS) { + if (core_num >= RTE_MAX_LCORE) { RTE_LOG(ERR, POWER_MANAGER, "Core(%u) is out of range 0...%d\n", - core_num, POWER_MGR_MAX_CPUS-1); + core_num, RTE_MAX_LCORE-1); return -1; } - if (!(global_enabled_cpus & (1ULL << core_num))) + if (!(ci.cd[core_num].global_enabled_cpus)) return 0; rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); index = rte_power_get_freq(core_num); rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); - if (index >= POWER_MGR_MAX_CPUS) + if (index >= RTE_MAX_LCORE_FREQS) freq = 0; else freq = global_core_freq_info[core_num].freqs[index]; @@ -173,69 +155,32 @@ power_manager_exit(void) { unsigned int i; int ret = 0; + struct core_info *ci; + unsigned int max_core_num; - for (i = 0; global_enabled_cpus; global_enabled_cpus &= ~(1 << i++)) { - if (rte_power_exit(i) < 0) { - RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager " - "for core %u\n", i); - ret = -1; - } + ci = get_core_info(); + if (!ci) { + RTE_LOG(ERR, POWER_MANAGER, + "Failed to get core info!\n"); + return -1; } - global_enabled_cpus = 0; - return ret; -} - -int -power_manager_scale_mask_up(uint64_t core_mask) -{ - int ret = 0; - - POWER_SCALE_MASK(up, core_mask, ret); - return ret; -} - -int -power_manager_scale_mask_down(uint64_t core_mask) -{ - int ret = 0; - POWER_SCALE_MASK(down, core_mask, ret); - return ret; -} - -int -power_manager_scale_mask_min(uint64_t core_mask) -{ - int ret = 0; - - POWER_SCALE_MASK(min, core_mask, ret); - return ret; -} - -int -power_manager_scale_mask_max(uint64_t core_mask) -{ - int ret = 0; - - POWER_SCALE_MASK(max, core_mask, ret); - return ret; -} - -int -power_manager_enable_turbo_mask(uint64_t core_mask) -{ - int ret = 0; - - POWER_SCALE_MASK(enable_turbo, core_mask, ret); - return ret; -} - -int -power_manager_disable_turbo_mask(uint64_t core_mask) -{ - int ret = 0; - - POWER_SCALE_MASK(disable_turbo, core_mask, ret); + if (ci->core_count > RTE_MAX_LCORE) + max_core_num = RTE_MAX_LCORE; + else + max_core_num = ci->core_count; + + for (i = 0; i < max_core_num; i++) { + if (ci->cd[i].global_enabled_cpus) { + if (rte_power_exit(i) < 0) { + RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager " + "for core %u\n", i); + ret = -1; + } + ci->cd[i].global_enabled_cpus = 0; + } + remove_core_from_monitor(i); + } return ret; } @@ -297,10 +242,12 @@ int power_manager_scale_core_med(unsigned int core_num) { int ret = 0; + struct core_info *ci; - if (core_num >= POWER_MGR_MAX_CPUS) + ci = get_core_info(); + if (core_num >= RTE_MAX_LCORE) return -1; - if (!(global_enabled_cpus & (1ULL << core_num))) + if (!(ci->cd[core_num].global_enabled_cpus)) return -1; rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); ret = rte_power_set_freq(core_num,