X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=kernel%2Flinux%2Figb_uio%2Figb_uio.c;h=039f5a5f635494c357dad8599a5ad6bf14956682;hb=024e95759c16c67eee92efffeee34915dc94a9c0;hp=cbc5ab63ad7a81c80dcf84db6b713a690061dc09;hpb=6f0841b7701bd7f962d2fa982f6a827760f65907;p=dpdk.git diff --git a/kernel/linux/igb_uio/igb_uio.c b/kernel/linux/igb_uio/igb_uio.c index cbc5ab63ad..039f5a5f63 100644 --- a/kernel/linux/igb_uio/igb_uio.c +++ b/kernel/linux/igb_uio/igb_uio.c @@ -26,10 +26,10 @@ struct rte_uio_pci_dev { struct uio_info info; struct pci_dev *pdev; enum rte_intr_mode mode; - struct mutex lock; - int refcnt; + atomic_t refcnt; }; +static int wc_activate; static char *intr_mode; static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX; /* sriov sysfs */ @@ -236,7 +236,7 @@ igbuio_pci_enable_interrupts(struct rte_uio_pci_dev *udev) } #endif - /* fall back to MSI */ + /* falls through - to MSI */ case RTE_INTR_MODE_MSI: #ifndef HAVE_ALLOC_IRQ_VECTORS if (pci_enable_msi(udev->pdev) == 0) { @@ -255,7 +255,7 @@ igbuio_pci_enable_interrupts(struct rte_uio_pci_dev *udev) break; } #endif - /* fall back to INTX */ + /* falls through - to INTX */ case RTE_INTR_MODE_LEGACY: if (pci_intx_mask_supported(udev->pdev)) { dev_dbg(&udev->pdev->dev, "using INTX"); @@ -265,7 +265,7 @@ igbuio_pci_enable_interrupts(struct rte_uio_pci_dev *udev) break; } dev_notice(&udev->pdev->dev, "PCI INTX mask not supported\n"); - /* fall back to no IRQ */ + /* falls through - to no IRQ */ case RTE_INTR_MODE_NONE: udev->mode = RTE_INTR_MODE_NONE; udev->info.irq = UIO_IRQ_NONE; @@ -319,23 +319,19 @@ igbuio_pci_open(struct uio_info *info, struct inode *inode) struct pci_dev *dev = udev->pdev; int err; - mutex_lock(&udev->lock); - if (++udev->refcnt > 1) { - mutex_unlock(&udev->lock); + if (atomic_inc_return(&udev->refcnt) != 1) return 0; - } /* set bus master, which was cleared by the reset function */ pci_set_master(dev); /* enable interrupts */ err = igbuio_pci_enable_interrupts(udev); - mutex_unlock(&udev->lock); if (err) { + atomic_dec(&udev->refcnt); dev_err(&dev->dev, "Enable interrupt fails\n"); - return err; } - return 0; + return err; } static int @@ -344,19 +340,14 @@ igbuio_pci_release(struct uio_info *info, struct inode *inode) struct rte_uio_pci_dev *udev = info->priv; struct pci_dev *dev = udev->pdev; - mutex_lock(&udev->lock); - if (--udev->refcnt > 0) { - mutex_unlock(&udev->lock); - return 0; - } + if (atomic_dec_and_test(&udev->refcnt)) { + /* disable interrupts */ + igbuio_pci_disable_interrupts(udev); - /* disable interrupts */ - igbuio_pci_disable_interrupts(udev); - - /* stop the device from further DMA */ - pci_clear_master(dev); + /* stop the device from further DMA */ + pci_clear_master(dev); + } - mutex_unlock(&udev->lock); return 0; } @@ -375,9 +366,13 @@ igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info, len = pci_resource_len(dev, pci_bar); if (addr == 0 || len == 0) return -1; - internal_addr = ioremap(addr, len); - if (internal_addr == NULL) - return -1; + if (wc_activate == 0) { + internal_addr = ioremap(addr, len); + if (internal_addr == NULL) + return -1; + } else { + internal_addr = NULL; + } info->mem[n].name = name; info->mem[n].addr = addr; info->mem[n].internal_addr = internal_addr; @@ -473,16 +468,17 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) void *map_addr; int err; +#ifdef HAVE_PCI_IS_BRIDGE_API if (pci_is_bridge(dev)) { dev_warn(&dev->dev, "Ignoring PCI bridge device\n"); return -ENODEV; } +#endif udev = kzalloc(sizeof(struct rte_uio_pci_dev), GFP_KERNEL); if (!udev) return -ENOMEM; - mutex_init(&udev->lock); /* * enable device: ask low-level code to enable I/O and * memory @@ -522,6 +518,7 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) udev->info.release = igbuio_pci_release; udev->info.priv = udev; udev->pdev = dev; + atomic_set(&udev->refcnt, 0); err = sysfs_create_group(&dev->dev.kobj, &dev_attr_grp); if (err != 0) @@ -573,7 +570,8 @@ igbuio_pci_remove(struct pci_dev *dev) { struct rte_uio_pci_dev *udev = pci_get_drvdata(dev); - mutex_destroy(&udev->lock); + igbuio_pci_release(&udev->info, NULL); + sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp); uio_unregister_device(&udev->info); igbuio_pci_release_iomem(&udev->info); @@ -619,6 +617,14 @@ igbuio_pci_init_module(void) { int ret; + if (igbuio_kernel_is_locked_down()) { + pr_err("Not able to use module, kernel lock down is enabled\n"); + return -EINVAL; + } + + if (wc_activate != 0) + pr_info("wc_activate is set\n"); + ret = igbuio_config_intr_mode(intr_mode); if (ret < 0) return ret; @@ -643,6 +649,12 @@ MODULE_PARM_DESC(intr_mode, " " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n" "\n"); +module_param(wc_activate, int, 0); +MODULE_PARM_DESC(wc_activate, +"Activate support for write combining (WC) (default=0)\n" +" 0 - disable\n" +" other - enable\n"); + MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards"); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Intel Corporation");