X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_eal%2Fcommon%2Finclude%2Fgeneric%2Frte_atomic.h;h=7b81705b3fba7e173687b6815350e2fd54f6b479;hb=5b923dfbe6daa292a64e6b6878282b6f14e2d3de;hp=26d1f56de25213d8763af8ba6844f3b20bb29112;hpb=4c02e453cc6272e20c3a901b7afb6f49ec08f1b3;p=dpdk.git

diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h b/lib/librte_eal/common/include/generic/rte_atomic.h
index 26d1f56de2..7b81705b3f 100644
--- a/lib/librte_eal/common/include/generic/rte_atomic.h
+++ b/lib/librte_eal/common/include/generic/rte_atomic.h
@@ -42,6 +42,7 @@
  */
 
 #include <stdint.h>
+#include <rte_common.h>
 
 #ifdef __DOXYGEN__
 
@@ -99,6 +100,33 @@ static inline void rte_smp_wmb(void);
  */
 static inline void rte_smp_rmb(void);
 
+/**
+ * General memory barrier for I/O device
+ *
+ * Guarantees that the LOAD and STORE operations that precede the
+ * rte_io_mb() call are visible to I/O device or CPU before the
+ * LOAD and STORE operations that follow it.
+ */
+static inline void rte_io_mb(void);
+
+/**
+ * Write memory barrier for I/O device
+ *
+ * Guarantees that the STORE operations that precede the
+ * rte_io_wmb() call are visible to I/O device before the STORE
+ * operations that follow it.
+ */
+static inline void rte_io_wmb(void);
+
+/**
+ * Read memory barrier for IO device
+ *
+ * Guarantees that the LOAD operations on I/O device that precede the
+ * rte_io_rmb() call are visible to CPU before the LOAD
+ * operations that follow it.
+ */
+static inline void rte_io_rmb(void);
+
 #endif /* __DOXYGEN__ */
 
 /**
@@ -309,7 +337,7 @@ static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v);
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
 {
-	return (__sync_add_and_fetch(&v->cnt, 1) == 0);
+	return __sync_add_and_fetch(&v->cnt, 1) == 0;
 }
 #endif
 
@@ -329,7 +357,7 @@ static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v);
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
 {
-	return (__sync_sub_and_fetch(&v->cnt, 1) == 0);
+	return __sync_sub_and_fetch(&v->cnt, 1) == 0;
 }
 #endif
 
@@ -562,7 +590,7 @@ static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v);
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
 {
-	return (__sync_add_and_fetch(&v->cnt, 1) == 0);
+	return __sync_add_and_fetch(&v->cnt, 1) == 0;
 }
 #endif
 
@@ -582,7 +610,7 @@ static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v);
 #ifdef RTE_FORCE_INTRINSICS
 static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)
 {
-	return (__sync_sub_and_fetch(&v->cnt, 1) == 0);
+	return __sync_sub_and_fetch(&v->cnt, 1) == 0;
 }
 #endif