X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_eal%2Finclude%2Fgeneric%2Frte_power_intrinsics.h;h=dddca3d41ce1efbb970530d2f05896487982f3ae;hb=8d63961fc7137cab823f85a50ee82779792f21e4;hp=6109d28faa06dfd5f9116c12c99b729c04b9638d;hpb=55243435f50b35ec465df8e1af59a140262e8c47;p=dpdk.git

diff --git a/lib/librte_eal/include/generic/rte_power_intrinsics.h b/lib/librte_eal/include/generic/rte_power_intrinsics.h
index 6109d28faa..dddca3d41c 100644
--- a/lib/librte_eal/include/generic/rte_power_intrinsics.h
+++ b/lib/librte_eal/include/generic/rte_power_intrinsics.h
@@ -20,29 +20,35 @@
 
 struct rte_power_monitor_cond {
 	volatile void *addr;  /**< Address to monitor for changes */
-	uint64_t val;         /**< Before attempting the monitoring, the address
-	                       *   may be read and compared against this value.
-	                       **/
-	uint64_t mask;   /**< 64-bit mask to extract current value from addr */
-	uint8_t data_sz; /**< Data size (in bytes) that will be used to compare
-	                  *   expected value with the memory address. Can be 1,
-	                  *   2, 4, or 8. Supplying any other value will lead to
-	                  *   undefined result. */
+	uint64_t val;         /**< If the `mask` is non-zero, location pointed
+	                       *   to by `addr` will be read and compared
+	                       *   against this value.
+	                       */
+	uint64_t mask;   /**< 64-bit mask to extract value read from `addr` */
+	uint8_t size;    /**< Data size (in bytes) that will be used to compare
+	                  *   expected value (`val`) with data read from the
+	                  *   monitored memory location (`addr`). Can be 1, 2,
+	                  *   4, or 8. Supplying any other value will result in
+	                  *   an error.
+	                  */
 };
 
 /**
  * @warning
- * @b EXPERIMENTAL: this API may change without prior notice
+ * @b EXPERIMENTAL: this API may change without prior notice.
  *
  * Monitor specific address for changes. This will cause the CPU to enter an
  * architecture-defined optimized power state until either the specified
  * memory address is written to, a certain TSC timestamp is reached, or other
  * reasons cause the CPU to wake up.
  *
- * Additionally, an `expected` 64-bit value and 64-bit mask are provided. If
- * mask is non-zero, the current value pointed to by the `p` pointer will be
- * checked against the expected value, and if they match, the entering of
- * optimized power state may be aborted.
+ * Additionally, an expected value (`pmc->val`), mask (`pmc->mask`), and data
+ * size (`pmc->size`) are provided in the `pmc` power monitoring condition. If
+ * the mask is non-zero, the current value pointed to by the `pmc->addr` pointer
+ * will be read and compared against the expected value, and if they match, the
+ * entering of optimized power state will be aborted. This is intended to
+ * prevent the CPU from entering optimized power state and waiting on a write
+ * that has already happened by the time this API is called.
  *
  * @warning It is responsibility of the user to check if this function is
  *   supported at runtime using `rte_cpu_get_intrinsics_support()` API call.
@@ -64,11 +70,14 @@ int rte_power_monitor(const struct rte_power_monitor_cond *pmc,
 
 /**
  * @warning
- * @b EXPERIMENTAL: this API may change without prior notice
+ * @b EXPERIMENTAL: this API may change without prior notice.
  *
  * Wake up a specific lcore that is in a power optimized state and is monitoring
  * an address.
  *
+ * @note It is safe to call this function if the lcore in question is not
+ *   sleeping. The function will have no effect.
+ *
  * @note This function will *not* wake up a core that is in a power optimized
  *   state due to calling `rte_power_pause`.
  *
@@ -80,7 +89,7 @@ int rte_power_monitor_wakeup(const unsigned int lcore_id);
 
 /**
  * @warning
- * @b EXPERIMENTAL: this API may change without prior notice
+ * @b EXPERIMENTAL: this API may change without prior notice.
  *
  * Enter an architecture-defined optimized power state until a certain TSC
  * timestamp is reached.