X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_eal%2Flinuxapp%2Feal%2Feal_timer.c;h=94909edb3325bebc3255cdfc167682dbffcce7a5;hb=a20d5f06e2e19d3622620d838006ea4eaaa594fb;hp=b8fbaf14c46e3593d967a271edb605042f248c0b;hpb=1c1d4d7a923d4804f1926fc5264f9ecdd8977b04;p=dpdk.git

diff --git a/lib/librte_eal/linuxapp/eal/eal_timer.c b/lib/librte_eal/linuxapp/eal/eal_timer.c
index b8fbaf14c4..94909edb33 100644
--- a/lib/librte_eal/linuxapp/eal/eal_timer.c
+++ b/lib/librte_eal/linuxapp/eal/eal_timer.c
@@ -1,13 +1,14 @@
 /*-
  *   BSD LICENSE
- * 
- *   Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
+ *
+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ *   Copyright(c) 2012-2013 6WIND S.A.
  *   All rights reserved.
- * 
+ *
  *   Redistribution and use in source and binary forms, with or without
  *   modification, are permitted provided that the following conditions
  *   are met:
- * 
+ *
  *     * Redistributions of source code must retain the above copyright
  *       notice, this list of conditions and the following disclaimer.
  *     * Redistributions in binary form must reproduce the above copyright
@@ -17,7 +18,7 @@
  *     * Neither the name of Intel Corporation nor the names of its
  *       contributors may be used to endorse or promote products derived
  *       from this software without specific prior written permission.
- * 
+ *
  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@@ -46,7 +47,6 @@
 #include <rte_common.h>
 #include <rte_log.h>
 #include <rte_cycles.h>
-#include <rte_tailq.h>
 #include <rte_memory.h>
 #include <rte_memzone.h>
 #include <rte_eal.h>
@@ -70,8 +70,6 @@ static uint64_t eal_tsc_resolution_hz = 0;
 /* General capabilities register */
 #define CLK_PERIOD_SHIFT     32 /* Clock period shift. */
 #define CLK_PERIOD_MASK      0xffffffff00000000ULL /* Clock period mask. */
-#define COUNT_SIZE_CAP_SHIFT 13 /* Count size capa. shift. */
-#define COUNT_SIZE_CAP_MASK 0x0000000000002000ULL /* Count size capa. mask. */
 
 /**
  * HPET timer registers. From the Intel IA-PC HPET (High Precision Event
@@ -190,7 +188,7 @@ rte_eal_hpet_init(int make_default)
 	int fd, ret;
 
 	if (internal_config.no_hpet) {
-		RTE_LOG(INFO, EAL, "HPET is disabled\n");
+		RTE_LOG(NOTICE, EAL, "HPET is disabled\n");
 		return -1;
 	}
 
@@ -242,6 +240,41 @@ rte_eal_hpet_init(int make_default)
 }
 #endif
 
+static void
+check_tsc_flags(void)
+{
+	char line[512];
+	FILE *stream;
+
+	stream = fopen("/proc/cpuinfo", "r");
+	if (!stream) {
+		RTE_LOG(WARNING, EAL, "WARNING: Unable to open /proc/cpuinfo\n");
+		return;
+	}
+
+	while (fgets(line, sizeof line, stream)) {
+		char *constant_tsc;
+		char *nonstop_tsc;
+
+		if (strncmp(line, "flags", 5) != 0)
+			continue;
+
+		constant_tsc = strstr(line, "constant_tsc");
+		nonstop_tsc = strstr(line, "nonstop_tsc");
+		if (!constant_tsc || !nonstop_tsc)
+			RTE_LOG(WARNING, EAL,
+				"WARNING: cpu flags "
+				"constant_tsc=%s "
+				"nonstop_tsc=%s "
+				"-> using unreliable clock cycles !\n",
+				constant_tsc ? "yes":"no",
+				nonstop_tsc ? "yes":"no");
+		break;
+	}
+
+	fclose(stream);
+}
+
 static int
 set_tsc_freq_from_clock(void)
 {
@@ -304,5 +337,6 @@ rte_eal_timer_init(void)
 	eal_timer_source = EAL_TIMER_TSC;
 
 	set_tsc_freq();
+	check_tsc_flags();
 	return 0;
 }