X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_eal%2Flinuxapp%2Figb_uio%2Figb_uio.c;h=fd320d87d5c25cd4f3fadba56bb4f9d91d29f2b6;hb=d5c7a09edbe709b50ecde4269b80b9a07627c876;hp=42c4fc97e15f1c46d0c9d5e736cb789bdd12f9d8;hpb=282e1ec8570cb021c3f85cff9fced40e6c2d74d2;p=dpdk.git diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c index 42c4fc97e1..fd320d87d5 100644 --- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c +++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c @@ -29,27 +29,14 @@ #include #include #include +#include #include #include +#include -#ifdef CONFIG_XEN_DOM0 -#include -#endif #include -#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0) -#define pci_cfg_access_lock pci_block_user_cfg_access -#define pci_cfg_access_unlock pci_unblock_user_cfg_access -#endif - -#ifdef RTE_PCI_CONFIG -#define PCI_SYS_FILE_BUF_SIZE 10 -#define PCI_DEV_CAP_REG 0xA4 -#define PCI_DEV_CTRL_REG 0xA8 -#define PCI_DEV_CAP_EXT_TAG_MASK 0x20 -#define PCI_DEV_CTRL_EXT_TAG_SHIFT 8 -#define PCI_DEV_CTRL_EXT_TAG_MASK (1 << PCI_DEV_CTRL_EXT_TAG_SHIFT) -#endif +#include "compat.h" /** * A structure describing the private information for a uio device. @@ -60,42 +47,14 @@ struct rte_uio_pci_dev { enum rte_intr_mode mode; }; -static char *intr_mode = NULL; +static char *intr_mode; static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX; - -static inline struct rte_uio_pci_dev * -igbuio_get_uio_pci_dev(struct uio_info *info) -{ - return container_of(info, struct rte_uio_pci_dev, info); -} - /* sriov sysfs */ -#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 34) -static int pci_num_vf(struct pci_dev *dev) -{ - struct iov { - int pos; - int nres; - u32 cap; - u16 ctrl; - u16 total; - u16 initial; - u16 nr_virtfn; - } *iov = (struct iov *)dev->sriov; - - if (!dev->is_physfn) - return 0; - - return iov->nr_virtfn; -} -#endif - static ssize_t show_max_vfs(struct device *dev, struct device_attribute *attr, char *buf) { - return snprintf(buf, 10, "%u\n", - pci_num_vf(container_of(dev, struct pci_dev, dev))); + return snprintf(buf, 10, "%u\n", dev_num_vf(dev)); } static ssize_t @@ -104,9 +63,9 @@ store_max_vfs(struct device *dev, struct device_attribute *attr, { int err = 0; unsigned long max_vfs; - struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); + struct pci_dev *pdev = to_pci_dev(dev); - if (0 != strict_strtoul(buf, 0, &max_vfs)) + if (0 != kstrtoul(buf, 0, &max_vfs)) return -EINVAL; if (0 == max_vfs) @@ -119,109 +78,10 @@ store_max_vfs(struct device *dev, struct device_attribute *attr, return err ? err : count; } -#ifdef RTE_PCI_CONFIG -static ssize_t -show_extended_tag(struct device *dev, struct device_attribute *attr, char *buf) -{ - struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev); - uint32_t val = 0; - - pci_read_config_dword(pci_dev, PCI_DEV_CAP_REG, &val); - if (!(val & PCI_DEV_CAP_EXT_TAG_MASK)) /* Not supported */ - return snprintf(buf, PCI_SYS_FILE_BUF_SIZE, "%s\n", "invalid"); - - val = 0; - pci_bus_read_config_dword(pci_dev->bus, pci_dev->devfn, - PCI_DEV_CTRL_REG, &val); - - return snprintf(buf, PCI_SYS_FILE_BUF_SIZE, "%s\n", - (val & PCI_DEV_CTRL_EXT_TAG_MASK) ? "on" : "off"); -} - -static ssize_t -store_extended_tag(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t count) -{ - struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev); - uint32_t val = 0, enable; - - if (strncmp(buf, "on", 2) == 0) - enable = 1; - else if (strncmp(buf, "off", 3) == 0) - enable = 0; - else - return -EINVAL; - - pci_cfg_access_lock(pci_dev); - pci_bus_read_config_dword(pci_dev->bus, pci_dev->devfn, - PCI_DEV_CAP_REG, &val); - if (!(val & PCI_DEV_CAP_EXT_TAG_MASK)) { /* Not supported */ - pci_cfg_access_unlock(pci_dev); - return -EPERM; - } - - val = 0; - pci_bus_read_config_dword(pci_dev->bus, pci_dev->devfn, - PCI_DEV_CTRL_REG, &val); - if (enable) - val |= PCI_DEV_CTRL_EXT_TAG_MASK; - else - val &= ~PCI_DEV_CTRL_EXT_TAG_MASK; - pci_bus_write_config_dword(pci_dev->bus, pci_dev->devfn, - PCI_DEV_CTRL_REG, val); - pci_cfg_access_unlock(pci_dev); - - return count; -} - -static ssize_t -show_max_read_request_size(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev); - int val = pcie_get_readrq(pci_dev); - - return snprintf(buf, PCI_SYS_FILE_BUF_SIZE, "%d\n", val); -} - -static ssize_t -store_max_read_request_size(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t count) -{ - struct pci_dev *pci_dev = container_of(dev, struct pci_dev, dev); - unsigned long size = 0; - int ret; - - if (strict_strtoul(buf, 0, &size) != 0) - return -EINVAL; - - ret = pcie_set_readrq(pci_dev, (int)size); - if (ret < 0) - return ret; - - return count; -} -#endif - static DEVICE_ATTR(max_vfs, S_IRUGO | S_IWUSR, show_max_vfs, store_max_vfs); -#ifdef RTE_PCI_CONFIG -static DEVICE_ATTR(extended_tag, S_IRUGO | S_IWUSR, show_extended_tag, - store_extended_tag); -static DEVICE_ATTR(max_read_request_size, S_IRUGO | S_IWUSR, - show_max_read_request_size, store_max_read_request_size); -#endif static struct attribute *dev_attrs[] = { &dev_attr_max_vfs.attr, -#ifdef RTE_PCI_CONFIG - &dev_attr_extended_tag.attr, - &dev_attr_max_read_request_size.attr, -#endif NULL, }; @@ -229,69 +89,15 @@ static const struct attribute_group dev_attr_grp = { .attrs = dev_attrs, }; -#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0) -/* Check if INTX works to control irq's. - * Set's INTX_DISABLE flag and reads it back - */ -static bool pci_intx_mask_supported(struct pci_dev *pdev) -{ - bool mask_supported = false; - uint16_t orig, new; - - pci_block_user_cfg_access(pdev); - pci_read_config_word(pdev, PCI_COMMAND, &orig); - pci_write_config_word(pdev, PCI_COMMAND, - orig ^ PCI_COMMAND_INTX_DISABLE); - pci_read_config_word(pdev, PCI_COMMAND, &new); - - if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) { - dev_err(&pdev->dev, "Command register changed from " - "0x%x to 0x%x: driver or hardware bug?\n", orig, new); - } else if ((new ^ orig) & PCI_COMMAND_INTX_DISABLE) { - mask_supported = true; - pci_write_config_word(pdev, PCI_COMMAND, orig); - } - pci_unblock_user_cfg_access(pdev); - - return mask_supported; -} - -static bool pci_check_and_mask_intx(struct pci_dev *pdev) -{ - bool pending; - uint32_t status; - - pci_block_user_cfg_access(pdev); - pci_read_config_dword(pdev, PCI_COMMAND, &status); - - /* interrupt is not ours, goes to out */ - pending = (((status >> 16) & PCI_STATUS_INTERRUPT) != 0); - if (pending) { - uint16_t old, new; - - old = status; - if (status != 0) - new = old & (~PCI_COMMAND_INTX_DISABLE); - else - new = old | PCI_COMMAND_INTX_DISABLE; - - if (old != new) - pci_write_config_word(pdev, PCI_COMMAND, new); - } - pci_unblock_user_cfg_access(pdev); - - return pending; -} -#endif - +#ifndef HAVE_PCI_MSI_MASK_IRQ /* * It masks the msix on/off of generating MSI-X messages. */ static void -igbuio_msix_mask_irq(struct msi_desc *desc, int32_t state) +igbuio_msix_mask_irq(struct msi_desc *desc, s32 state) { u32 mask_bits = desc->masked; - unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + + unsigned int offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; if (state != 0) @@ -306,24 +112,52 @@ igbuio_msix_mask_irq(struct msi_desc *desc, int32_t state) } } +/* + * It masks the msi on/off of generating MSI messages. + */ static void -igbuio_msi_mask_irq(struct irq_data *data, u32 enable) +igbuio_msi_mask_irq(struct pci_dev *pdev, struct msi_desc *desc, int32_t state) { - struct msi_desc *desc = irq_data_get_msi(data); u32 mask_bits = desc->masked; - unsigned offset = data->irq - desc->dev->irq; + u32 offset = desc->irq - pdev->irq; u32 mask = 1 << offset; - u32 flag = enable << offset; - mask_bits &= ~mask; - mask_bits |= flag; + if (!desc->msi_attrib.maskbit) + return; + + if (state != 0) + mask_bits &= ~mask; + else + mask_bits |= mask; - if (desc->msi_attrib.maskbit && mask_bits != desc->masked) { - pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits); + if (mask_bits != desc->masked) { + pci_write_config_dword(pdev, desc->mask_pos, mask_bits); desc->masked = mask_bits; } } +static void +igbuio_mask_irq(struct pci_dev *pdev, enum rte_intr_mode mode, s32 irq_state) +{ + struct msi_desc *desc; + struct list_head *msi_list; + +#ifdef HAVE_MSI_LIST_IN_GENERIC_DEVICE + msi_list = &pdev->dev.msi_list; +#else + msi_list = &pdev->msi_list; +#endif + + if (mode == RTE_INTR_MODE_MSIX) { + list_for_each_entry(desc, msi_list, list) + igbuio_msix_mask_irq(desc, irq_state); + } else if (mode == RTE_INTR_MODE_MSI) { + list_for_each_entry(desc, msi_list, list) + igbuio_msi_mask_irq(pdev, desc, irq_state); + } +} +#endif + /** * This is the irqcontrol callback to be registered to uio_info. * It can be used to disable/enable interrupt from user space processes. @@ -340,22 +174,29 @@ igbuio_msi_mask_irq(struct irq_data *data, u32 enable) static int igbuio_pci_irqcontrol(struct uio_info *info, s32 irq_state) { - struct rte_uio_pci_dev *udev = igbuio_get_uio_pci_dev(info); + struct rte_uio_pci_dev *udev = info->priv; struct pci_dev *pdev = udev->pdev; +#ifdef HAVE_PCI_MSI_MASK_IRQ + struct irq_data *irq = irq_get_irq_data(udev->info.irq); +#endif + pci_cfg_access_lock(pdev); + + if (udev->mode == RTE_INTR_MODE_MSIX || udev->mode == RTE_INTR_MODE_MSI) { +#ifdef HAVE_PCI_MSI_MASK_IRQ + if (irq_state == 1) + pci_msi_unmask_irq(irq); + else + pci_msi_mask_irq(irq); +#else + igbuio_mask_irq(pdev, udev->mode, irq_state); +#endif + } + if (udev->mode == RTE_INTR_MODE_LEGACY) pci_intx(pdev, !!irq_state); - else if (udev->mode == RTE_INTR_MODE_MSI) { - struct irq_data *data = irq_get_irq_data(pdev->irq); - igbuio_msi_mask_irq(data, !!irq_state); - } else if (udev->mode == RTE_INTR_MODE_MSIX) { - struct msi_desc *desc; - - list_for_each_entry(desc, &pdev->msi_list, list) - igbuio_msix_mask_irq(desc, irq_state); - } pci_cfg_access_unlock(pdev); return 0; @@ -366,62 +207,163 @@ igbuio_pci_irqcontrol(struct uio_info *info, s32 irq_state) * If yes, disable it here and will be enable later. */ static irqreturn_t -igbuio_pci_irqhandler(int irq, struct uio_info *info) +igbuio_pci_irqhandler(int irq, void *dev_id) { - struct rte_uio_pci_dev *udev = igbuio_get_uio_pci_dev(info); + struct rte_uio_pci_dev *udev = (struct rte_uio_pci_dev *)dev_id; + struct uio_info *info = &udev->info; /* Legacy mode need to mask in hardware */ if (udev->mode == RTE_INTR_MODE_LEGACY && !pci_check_and_mask_intx(udev->pdev)) return IRQ_NONE; + uio_event_notify(info); + /* Message signal mode, no share IRQ and automasked */ return IRQ_HANDLED; } -#ifdef CONFIG_XEN_DOM0 static int -igbuio_dom0_mmap_phys(struct uio_info *info, struct vm_area_struct *vma) +igbuio_pci_enable_interrupts(struct rte_uio_pci_dev *udev) { - int idx; + int err = 0; +#ifndef HAVE_ALLOC_IRQ_VECTORS + struct msix_entry msix_entry; +#endif - idx = (int)vma->vm_pgoff; - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); - vma->vm_page_prot.pgprot |= _PAGE_IOMAP; + switch (igbuio_intr_mode_preferred) { + case RTE_INTR_MODE_MSIX: + /* Only 1 msi-x vector needed */ +#ifndef HAVE_ALLOC_IRQ_VECTORS + msix_entry.entry = 0; + if (pci_enable_msix(udev->pdev, &msix_entry, 1) == 0) { + dev_dbg(&udev->pdev->dev, "using MSI-X"); + udev->info.irq_flags = IRQF_NO_THREAD; + udev->info.irq = msix_entry.vector; + udev->mode = RTE_INTR_MODE_MSIX; + break; + } +#else + if (pci_alloc_irq_vectors(udev->pdev, 1, 1, PCI_IRQ_MSIX) == 1) { + dev_dbg(&udev->pdev->dev, "using MSI-X"); + udev->info.irq_flags = IRQF_NO_THREAD; + udev->info.irq = pci_irq_vector(udev->pdev, 0); + udev->mode = RTE_INTR_MODE_MSIX; + break; + } +#endif + + /* fall back to MSI */ + case RTE_INTR_MODE_MSI: +#ifndef HAVE_ALLOC_IRQ_VECTORS + if (pci_enable_msi(udev->pdev) == 0) { + dev_dbg(&udev->pdev->dev, "using MSI"); + udev->info.irq_flags = IRQF_NO_THREAD; + udev->info.irq = udev->pdev->irq; + udev->mode = RTE_INTR_MODE_MSI; + break; + } +#else + if (pci_alloc_irq_vectors(udev->pdev, 1, 1, PCI_IRQ_MSI) == 1) { + dev_dbg(&udev->pdev->dev, "using MSI"); + udev->info.irq_flags = IRQF_NO_THREAD; + udev->info.irq = pci_irq_vector(udev->pdev, 0); + udev->mode = RTE_INTR_MODE_MSI; + break; + } +#endif + /* fall back to INTX */ + case RTE_INTR_MODE_LEGACY: + if (pci_intx_mask_supported(udev->pdev)) { + dev_dbg(&udev->pdev->dev, "using INTX"); + udev->info.irq_flags = IRQF_SHARED | IRQF_NO_THREAD; + udev->info.irq = udev->pdev->irq; + udev->mode = RTE_INTR_MODE_LEGACY; + break; + } + dev_notice(&udev->pdev->dev, "PCI INTX mask not supported\n"); + /* fall back to no IRQ */ + case RTE_INTR_MODE_NONE: + udev->mode = RTE_INTR_MODE_NONE; + udev->info.irq = UIO_IRQ_NONE; + break; + + default: + dev_err(&udev->pdev->dev, "invalid IRQ mode %u", + igbuio_intr_mode_preferred); + udev->info.irq = UIO_IRQ_NONE; + err = -EINVAL; + } + + if (udev->info.irq != UIO_IRQ_NONE) + err = request_irq(udev->info.irq, igbuio_pci_irqhandler, + udev->info.irq_flags, udev->info.name, + udev); + dev_info(&udev->pdev->dev, "uio device registered with irq %lx\n", + udev->info.irq); - return remap_pfn_range(vma, - vma->vm_start, - info->mem[idx].addr >> PAGE_SHIFT, - vma->vm_end - vma->vm_start, - vma->vm_page_prot); + return err; } +static void +igbuio_pci_disable_interrupts(struct rte_uio_pci_dev *udev) +{ + if (udev->info.irq) { + free_irq(udev->info.irq, udev); + udev->info.irq = 0; + } + +#ifndef HAVE_ALLOC_IRQ_VECTORS + if (udev->mode == RTE_INTR_MODE_MSIX) + pci_disable_msix(udev->pdev); + if (udev->mode == RTE_INTR_MODE_MSI) + pci_disable_msi(udev->pdev); +#else + if (udev->mode == RTE_INTR_MODE_MSIX || + udev->mode == RTE_INTR_MODE_MSI) + pci_free_irq_vectors(udev->pdev); +#endif +} + + /** - * This is uio device mmap method which will use igbuio mmap for Xen - * Dom0 environment. + * This gets called while opening uio device file. */ static int -igbuio_dom0_pci_mmap(struct uio_info *info, struct vm_area_struct *vma) +igbuio_pci_open(struct uio_info *info, struct inode *inode) { - int idx; - - if (vma->vm_pgoff >= MAX_UIO_MAPS) - return -EINVAL; + struct rte_uio_pci_dev *udev = info->priv; + struct pci_dev *dev = udev->pdev; + int err; - if (info->mem[vma->vm_pgoff].size == 0) - return -EINVAL; + /* set bus master, which was cleared by the reset function */ + pci_set_master(dev); - idx = (int)vma->vm_pgoff; - switch (info->mem[idx].memtype) { - case UIO_MEM_PHYS: - return igbuio_dom0_mmap_phys(info, vma); - case UIO_MEM_LOGICAL: - case UIO_MEM_VIRTUAL: - default: - return -EINVAL; + /* enable interrupts */ + err = igbuio_pci_enable_interrupts(udev); + if (err) { + dev_err(&dev->dev, "Enable interrupt fails\n"); + return err; } + return 0; +} + +static int +igbuio_pci_release(struct uio_info *info, struct inode *inode) +{ + struct rte_uio_pci_dev *udev = info->priv; + struct pci_dev *dev = udev->pdev; + + /* disable interrupts */ + igbuio_pci_disable_interrupts(udev); + + /* stop the device from further DMA */ + pci_clear_master(dev); + + pci_reset_function(dev); + + return 0; } -#endif /* Remap pci resources described by bar #pci_bar in uio resource n. */ static int @@ -431,7 +373,7 @@ igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info, unsigned long addr, len; void *internal_addr; - if (sizeof(info->mem) / sizeof(info->mem[0]) <= n) + if (n >= ARRAY_SIZE(info->mem)) return -EINVAL; addr = pci_resource_start(dev, pci_bar); @@ -456,7 +398,7 @@ igbuio_pci_setup_ioport(struct pci_dev *dev, struct uio_info *info, { unsigned long addr, len; - if (sizeof(info->port) / sizeof(info->port[0]) <= n) + if (n >= ARRAY_SIZE(info->port)) return -EINVAL; addr = pci_resource_start(dev, pci_bar); @@ -501,7 +443,7 @@ igbuio_setup_bars(struct pci_dev *dev, struct uio_info *info) iom = 0; iop = 0; - for (i = 0; i != sizeof(bar_names) / sizeof(bar_names[0]); i++) { + for (i = 0; i < ARRAY_SIZE(bar_names); i++) { if (pci_resource_len(dev, i) != 0 && pci_resource_start(dev, i) != 0) { flags = pci_resource_flags(dev, i); @@ -521,7 +463,7 @@ igbuio_setup_bars(struct pci_dev *dev, struct uio_info *info) } } - return (iom != 0) ? ret : -ENOENT; + return (iom != 0 || iop != 0) ? ret : -ENOENT; } #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) @@ -532,7 +474,8 @@ static int igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { struct rte_uio_pci_dev *udev; - struct msix_entry msix_entry; + dma_addr_t map_dma_addr; + void *map_addr; int err; udev = kzalloc(sizeof(struct rte_uio_pci_dev), GFP_KERNEL); @@ -549,16 +492,6 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) goto fail_free; } - /* - * reserve device's PCI memory regions for use by this - * module - */ - err = pci_request_regions(dev, "igb_uio"); - if (err != 0) { - dev_err(&dev->dev, "Cannot request regions\n"); - goto fail_disable; - } - /* enable bus mastering on the device */ pci_set_master(dev); @@ -583,56 +516,12 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) /* fill uio infos */ udev->info.name = "igb_uio"; udev->info.version = "0.1"; - udev->info.handler = igbuio_pci_irqhandler; udev->info.irqcontrol = igbuio_pci_irqcontrol; - udev->info.irq = dev->irq; -#ifdef CONFIG_XEN_DOM0 - /* check if the driver run on Xen Dom0 */ - if (xen_initial_domain()) - udev->info.mmap = igbuio_dom0_pci_mmap; -#endif + udev->info.open = igbuio_pci_open; + udev->info.release = igbuio_pci_release; udev->info.priv = udev; udev->pdev = dev; - switch (igbuio_intr_mode_preferred) { - case RTE_INTR_MODE_NONE: - udev->info.irq = 0; - break; - case RTE_INTR_MODE_MSIX: - /* Only 1 msi-x vector needed */ - msix_entry.entry = 0; - if (pci_enable_msix(dev, &msix_entry, 1) == 0) { - dev_dbg(&dev->dev, "using MSI-X"); - udev->info.irq = msix_entry.vector; - udev->mode = RTE_INTR_MODE_MSIX; - break; - } - /* fall back to MSI */ - case RTE_INTR_MODE_MSI: - if (pci_enable_msi(dev) == 0) { - dev_dbg(&dev->dev, "using MSI"); - udev->mode = RTE_INTR_MODE_MSI; - break; - } - /* fall back to INTX */ - case RTE_INTR_MODE_LEGACY: - if (pci_intx_mask_supported(dev)) { - dev_dbg(&dev->dev, "using INTX"); - udev->info.irq_flags = IRQF_SHARED; - udev->mode = RTE_INTR_MODE_LEGACY; - } else { - dev_err(&dev->dev, "PCI INTX mask not supported\n"); - err = -EIO; - goto fail_release_iomem; - } - break; - default: - dev_err(&dev->dev, "invalid IRQ mode %u", - igbuio_intr_mode_preferred); - err = -EINVAL; - goto fail_release_iomem; - } - err = sysfs_create_group(&dev->dev.kobj, &dev_attr_grp); if (err != 0) goto fail_release_iomem; @@ -644,8 +533,26 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) pci_set_drvdata(dev, udev); - dev_info(&dev->dev, "uio device registered with irq %lx\n", - udev->info.irq); + /* + * Doing a harmless dma mapping for attaching the device to + * the iommu identity mapping if kernel boots with iommu=pt. + * Note this is not a problem if no IOMMU at all. + */ + map_addr = dma_alloc_coherent(&dev->dev, 1024, &map_dma_addr, + GFP_KERNEL); + if (map_addr) + memset(map_addr, 0, 1024); + + if (!map_addr) + dev_info(&dev->dev, "dma mapping failed\n"); + else { + dev_info(&dev->dev, "mapping 1K dma=%#llx host=%p\n", + (unsigned long long)map_dma_addr, map_addr); + + dma_free_coherent(&dev->dev, 1024, map_addr, map_dma_addr); + dev_info(&dev->dev, "unmapping 1K dma=%#llx host=%p\n", + (unsigned long long)map_dma_addr, map_addr); + } return 0; @@ -653,12 +560,6 @@ fail_remove_group: sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp); fail_release_iomem: igbuio_pci_release_iomem(&udev->info); - if (udev->mode == RTE_INTR_MODE_MSIX) - pci_disable_msix(udev->pdev); - else if (udev->mode == RTE_INTR_MODE_MSI) - pci_disable_msi(udev->pdev); - pci_release_regions(dev); -fail_disable: pci_disable_device(dev); fail_free: kfree(udev); @@ -669,25 +570,14 @@ fail_free: static void igbuio_pci_remove(struct pci_dev *dev) { - struct uio_info *info = pci_get_drvdata(dev); - struct rte_uio_pci_dev *udev = igbuio_get_uio_pci_dev(info); - - if (info->priv == NULL) { - pr_notice("Not igbuio device\n"); - return; - } + struct rte_uio_pci_dev *udev = pci_get_drvdata(dev); sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp); - uio_unregister_device(info); - igbuio_pci_release_iomem(info); - if (udev->mode == RTE_INTR_MODE_MSIX) - pci_disable_msix(dev); - else if (udev->mode == RTE_INTR_MODE_MSI) - pci_disable_msi(dev); - pci_release_regions(dev); + uio_unregister_device(&udev->info); + igbuio_pci_release_iomem(&udev->info); pci_disable_device(dev); pci_set_drvdata(dev, NULL); - kfree(info); + kfree(udev); } static int