X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_ether%2Frte_ethdev.c;h=7bbc66e559ab5631854328ed408a8069b64c7c84;hb=1c1d4d7a923d4804f1926fc5264f9ecdd8977b04;hp=ac22f7a66543f6a5bc29ad8e707dcf79101e9ec4;hpb=5de201df8927c00c78006d9163af1194a492e182;p=dpdk.git diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c index ac22f7a665..7bbc66e559 100644 --- a/lib/librte_ether/rte_ethdev.c +++ b/lib/librte_ether/rte_ethdev.c @@ -1,35 +1,34 @@ /*- * BSD LICENSE * - * Copyright(c) 2010-2012 Intel Corporation. All rights reserved. + * Copyright(c) 2010-2013 Intel Corporation. All rights reserved. * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions * are met: * - * * Redistributions of source code must retain the above copyright + * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * */ #include @@ -124,6 +123,7 @@ struct rte_eth_dev_callback { rte_eth_dev_cb_fn cb_fn; /**< Callback address */ void *cb_arg; /**< Parameter for callback */ enum rte_eth_event_type event; /**< Interrupt event type */ + uint32_t active; /**< Callback is executing */ }; enum { @@ -240,12 +240,240 @@ rte_eth_driver_register(struct eth_driver *eth_drv) rte_eal_pci_register(ð_drv->pci_drv); } +int +rte_eth_dev_socket_id(uint8_t port_id) +{ + if (port_id >= nb_ports) + return -1; + return rte_eth_devices[port_id].pci_dev->numa_node; +} + uint8_t rte_eth_dev_count(void) { return (nb_ports); } +static int +rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues) +{ + uint16_t old_nb_queues = dev->data->nb_rx_queues; + void **rxq; + unsigned i; + + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP); + + if (dev->data->rx_queues == NULL) { + dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues", + sizeof(dev->data->rx_queues[0]) * nb_queues, + CACHE_LINE_SIZE); + if (dev->data->rx_queues == NULL) { + dev->data->nb_rx_queues = 0; + return -(ENOMEM); + } + } else { + rxq = dev->data->rx_queues; + + for (i = nb_queues; i < old_nb_queues; i++) + (*dev->dev_ops->rx_queue_release)(rxq[i]); + rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues, + CACHE_LINE_SIZE); + if (rxq == NULL) + return -(ENOMEM); + + if (nb_queues > old_nb_queues) + memset(rxq + old_nb_queues, 0, + sizeof(rxq[0]) * (nb_queues - old_nb_queues)); + + dev->data->rx_queues = rxq; + + } + dev->data->nb_rx_queues = nb_queues; + return (0); +} + +static int +rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues) +{ + uint16_t old_nb_queues = dev->data->nb_tx_queues; + void **txq; + unsigned i; + + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP); + + if (dev->data->tx_queues == NULL) { + dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues", + sizeof(dev->data->tx_queues[0]) * nb_queues, + CACHE_LINE_SIZE); + if (dev->data->tx_queues == NULL) { + dev->data->nb_tx_queues = 0; + return -(ENOMEM); + } + } else { + txq = dev->data->tx_queues; + + for (i = nb_queues; i < old_nb_queues; i++) + (*dev->dev_ops->tx_queue_release)(txq[i]); + txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues, + CACHE_LINE_SIZE); + if (txq == NULL) + return -(ENOMEM); + + if (nb_queues > old_nb_queues) + memset(txq + old_nb_queues, 0, + sizeof(txq[0]) * (nb_queues - old_nb_queues)); + + dev->data->tx_queues = txq; + + } + dev->data->nb_tx_queues = nb_queues; + return (0); +} + +static int +rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, + const struct rte_eth_conf *dev_conf) +{ + struct rte_eth_dev *dev = &rte_eth_devices[port_id]; + + if (RTE_ETH_DEV_SRIOV(dev).active != 0) { + /* check multi-queue mode */ + if ((dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) || + (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) || + (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB_RSS) || + (dev_conf->txmode.mq_mode == ETH_MQ_TX_DCB)) { + /* SRIOV only works in VMDq enable mode */ + PMD_DEBUG_TRACE("ethdev port_id=%d SRIOV active, " + "wrong VMDQ mq_mode rx %d tx %d\n", + port_id, dev_conf->rxmode.mq_mode, + dev_conf->txmode.mq_mode); + return (-EINVAL); + } + + switch (dev_conf->rxmode.mq_mode) { + case ETH_MQ_RX_VMDQ_RSS: + case ETH_MQ_RX_VMDQ_DCB: + case ETH_MQ_RX_VMDQ_DCB_RSS: + /* DCB/RSS VMDQ in SRIOV mode, not implement yet */ + PMD_DEBUG_TRACE("ethdev port_id=%d SRIOV active, " + "unsupported VMDQ mq_mode rx %d\n", + port_id, dev_conf->rxmode.mq_mode); + return (-EINVAL); + default: /* ETH_MQ_RX_VMDQ_ONLY or ETH_MQ_RX_NONE */ + /* if nothing mq mode configure, use default scheme */ + dev->data->dev_conf.rxmode.mq_mode = ETH_MQ_RX_VMDQ_ONLY; + if (RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool > 1) + RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = 1; + break; + } + + switch (dev_conf->txmode.mq_mode) { + case ETH_MQ_TX_VMDQ_DCB: + /* DCB VMDQ in SRIOV mode, not implement yet */ + PMD_DEBUG_TRACE("ethdev port_id=%d SRIOV active, " + "unsupported VMDQ mq_mode tx %d\n", + port_id, dev_conf->txmode.mq_mode); + return (-EINVAL); + default: /* ETH_MQ_TX_VMDQ_ONLY or ETH_MQ_TX_NONE */ + /* if nothing mq mode configure, use default scheme */ + dev->data->dev_conf.txmode.mq_mode = ETH_MQ_TX_VMDQ_ONLY; + if (RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool > 1) + RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = 1; + break; + } + + /* check valid queue number */ + if ((nb_rx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool) || + (nb_tx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool)) { + PMD_DEBUG_TRACE("ethdev port_id=%d SRIOV active, " + "queue number must less equal to %d\n", + port_id, RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool); + return (-EINVAL); + } + } else { + /* For vmdb+dcb mode check our configuration before we go further */ + if (dev_conf->rxmode.mq_mode == ETH_MQ_RX_VMDQ_DCB) { + const struct rte_eth_vmdq_dcb_conf *conf; + + if (nb_rx_q != ETH_VMDQ_DCB_NUM_QUEUES) { + PMD_DEBUG_TRACE("ethdev port_id=%d VMDQ+DCB, nb_rx_q " + "!= %d\n", + port_id, ETH_VMDQ_DCB_NUM_QUEUES); + return (-EINVAL); + } + conf = &(dev_conf->rx_adv_conf.vmdq_dcb_conf); + if (! (conf->nb_queue_pools == ETH_16_POOLS || + conf->nb_queue_pools == ETH_32_POOLS)) { + PMD_DEBUG_TRACE("ethdev port_id=%d VMDQ+DCB selected, " + "nb_queue_pools must be %d or %d\n", + port_id, ETH_16_POOLS, ETH_32_POOLS); + return (-EINVAL); + } + } + if (dev_conf->txmode.mq_mode == ETH_MQ_TX_VMDQ_DCB) { + const struct rte_eth_vmdq_dcb_tx_conf *conf; + + if (nb_tx_q != ETH_VMDQ_DCB_NUM_QUEUES) { + PMD_DEBUG_TRACE("ethdev port_id=%d VMDQ+DCB, nb_tx_q " + "!= %d\n", + port_id, ETH_VMDQ_DCB_NUM_QUEUES); + return (-EINVAL); + } + conf = &(dev_conf->tx_adv_conf.vmdq_dcb_tx_conf); + if (! (conf->nb_queue_pools == ETH_16_POOLS || + conf->nb_queue_pools == ETH_32_POOLS)) { + PMD_DEBUG_TRACE("ethdev port_id=%d VMDQ+DCB selected, " + "nb_queue_pools != %d or nb_queue_pools " + "!= %d\n", + port_id, ETH_16_POOLS, ETH_32_POOLS); + return (-EINVAL); + } + } + + /* For DCB mode check our configuration before we go further */ + if (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) { + const struct rte_eth_dcb_rx_conf *conf; + + if (nb_rx_q != ETH_DCB_NUM_QUEUES) { + PMD_DEBUG_TRACE("ethdev port_id=%d DCB, nb_rx_q " + "!= %d\n", + port_id, ETH_DCB_NUM_QUEUES); + return (-EINVAL); + } + conf = &(dev_conf->rx_adv_conf.dcb_rx_conf); + if (! (conf->nb_tcs == ETH_4_TCS || + conf->nb_tcs == ETH_8_TCS)) { + PMD_DEBUG_TRACE("ethdev port_id=%d DCB selected, " + "nb_tcs != %d or nb_tcs " + "!= %d\n", + port_id, ETH_4_TCS, ETH_8_TCS); + return (-EINVAL); + } + } + + if (dev_conf->txmode.mq_mode == ETH_MQ_TX_DCB) { + const struct rte_eth_dcb_tx_conf *conf; + + if (nb_tx_q != ETH_DCB_NUM_QUEUES) { + PMD_DEBUG_TRACE("ethdev port_id=%d DCB, nb_tx_q " + "!= %d\n", + port_id, ETH_DCB_NUM_QUEUES); + return (-EINVAL); + } + conf = &(dev_conf->tx_adv_conf.dcb_tx_conf); + if (! (conf->nb_tcs == ETH_4_TCS || + conf->nb_tcs == ETH_8_TCS)) { + PMD_DEBUG_TRACE("ethdev port_id=%d DCB selected, " + "nb_tcs != %d or nb_tcs " + "!= %d\n", + port_id, ETH_4_TCS, ETH_8_TCS); + return (-EINVAL); + } + } + } + return 0; +} + int rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, const struct rte_eth_conf *dev_conf) @@ -316,36 +544,54 @@ rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, (unsigned)dev_info.max_rx_pktlen); return (-EINVAL); } + else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) { + PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u" + " < min valid value %u\n", + port_id, + (unsigned)dev_conf->rxmode.max_rx_pkt_len, + (unsigned)ETHER_MIN_LEN); + return (-EINVAL); + } } else /* Use default value */ dev->data->dev_conf.rxmode.max_rx_pkt_len = ETHER_MAX_LEN; - /* For vmdb+dcb mode check our configuration before we go further */ - if (dev_conf->rxmode.mq_mode == ETH_VMDQ_DCB) { - const struct rte_eth_vmdq_dcb_conf *conf; + /* multipe queue mode checking */ + diag = rte_eth_dev_check_mq_mode(port_id, nb_rx_q, nb_tx_q, dev_conf); + if (diag != 0) { + PMD_DEBUG_TRACE("port%d rte_eth_dev_check_mq_mode = %d\n", + port_id, diag); + return diag; + } - if (nb_rx_q != ETH_VMDQ_DCB_NUM_QUEUES) { - PMD_DEBUG_TRACE("ethdev port_id=%d VMDQ+DCB, nb_rx_q " - "!= %d\n", - port_id, ETH_VMDQ_DCB_NUM_QUEUES); - return (-EINVAL); - } - conf = &(dev_conf->rx_adv_conf.vmdq_dcb_conf); - if (! (conf->nb_queue_pools == ETH_16_POOLS || - conf->nb_queue_pools == ETH_32_POOLS)) { - PMD_DEBUG_TRACE("ethdev port_id=%d VMDQ+DCB selected, " - "nb_queue_pools must be %d or %d\n", - port_id, ETH_16_POOLS, ETH_32_POOLS); - return (-EINVAL); - } + /* + * Setup new number of RX/TX queues and reconfigure device. + */ + diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q); + if (diag != 0) { + PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n", + port_id, diag); + return diag; } - diag = (*dev->dev_ops->dev_configure)(dev, nb_rx_q, nb_tx_q); + diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q); if (diag != 0) { - rte_free(dev->data->rx_queues); - rte_free(dev->data->tx_queues); + PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n", + port_id, diag); + rte_eth_dev_rx_queue_config(dev, 0); + return diag; } - return diag; + + diag = (*dev->dev_ops->dev_configure)(dev); + if (diag != 0) { + PMD_DEBUG_TRACE("port%d dev_configure = %d\n", + port_id, diag); + rte_eth_dev_rx_queue_config(dev, 0); + rte_eth_dev_tx_queue_config(dev, 0); + return diag; + } + + return 0; } static void @@ -355,11 +601,15 @@ rte_eth_dev_config_restore(uint8_t port_id) struct rte_eth_dev_info dev_info; struct ether_addr addr; uint16_t i; + uint32_t pool = 0; dev = &rte_eth_devices[port_id]; rte_eth_dev_info_get(port_id, &dev_info); + if (RTE_ETH_DEV_SRIOV(dev).active) + pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx; + /* replay MAC address configuration */ for (i = 0; i < dev_info.max_mac_addrs; i++) { addr = dev->data->mac_addrs[i]; @@ -370,7 +620,7 @@ rte_eth_dev_config_restore(uint8_t port_id) /* add address to the hardware */ if (*dev->dev_ops->mac_addr_add) - (*dev->dev_ops->mac_addr_add)(dev, &addr, i, 0); + (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool); else { PMD_DEBUG_TRACE("port %d: MAC address array not supported\n", port_id); @@ -537,7 +787,7 @@ rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id, * in a multi-process setup*/ PROC_PRIMARY_OR_ERR_RET(-E_RTE_SECONDARY); - if (port_id >= nb_ports) { + if (port_id >= RTE_MAX_ETHPORTS || port_id >= nb_ports) { PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); return (-EINVAL); } @@ -827,6 +1077,118 @@ rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on) return (0); } +int +rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on) +{ + struct rte_eth_dev *dev; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + + dev = &rte_eth_devices[port_id]; + if (rx_queue_id >= dev->data->nb_rx_queues) { + PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id); + return (-EINVAL); + } + + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP); + (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on); + + return (0); +} + +int +rte_eth_dev_set_vlan_ether_type(uint8_t port_id, uint16_t tpid) +{ + struct rte_eth_dev *dev; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + + dev = &rte_eth_devices[port_id]; + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP); + (*dev->dev_ops->vlan_tpid_set)(dev, tpid); + + return (0); +} + +int +rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask) +{ + struct rte_eth_dev *dev; + int ret = 0; + int mask = 0; + int cur, org = 0; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + + dev = &rte_eth_devices[port_id]; + + /*check which option changed by application*/ + cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD); + org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip); + if (cur != org){ + dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur; + mask |= ETH_VLAN_STRIP_MASK; + } + + cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD); + org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter); + if (cur != org){ + dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur; + mask |= ETH_VLAN_FILTER_MASK; + } + + cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD); + org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend); + if (cur != org){ + dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur; + mask |= ETH_VLAN_EXTEND_MASK; + } + + /*no change*/ + if(mask == 0) + return ret; + + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP); + (*dev->dev_ops->vlan_offload_set)(dev, mask); + + return ret; +} + +int +rte_eth_dev_get_vlan_offload(uint8_t port_id) +{ + struct rte_eth_dev *dev; + int ret = 0; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + + dev = &rte_eth_devices[port_id]; + + if (dev->data->dev_conf.rxmode.hw_vlan_strip) + ret |= ETH_VLAN_STRIP_OFFLOAD ; + + if (dev->data->dev_conf.rxmode.hw_vlan_filter) + ret |= ETH_VLAN_FILTER_OFFLOAD ; + + if (dev->data->dev_conf.rxmode.hw_vlan_extend) + ret |= ETH_VLAN_EXTEND_OFFLOAD ; + + return ret; +} + + int rte_eth_dev_fdir_add_signature_filter(uint8_t port_id, struct rte_fdir_filter *fdir_filter, @@ -1083,10 +1445,6 @@ rte_eth_dev_fdir_set_masks(uint8_t port_id, struct rte_fdir_masks *fdir_mask) return (-ENOSYS); } - /* IPv6 mask are not supported */ - if (fdir_mask->src_ipv6_mask) - return (-ENOTSUP); - FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fdir_set_masks, -ENOTSUP); return (*dev->dev_ops->fdir_set_masks)(dev, fdir_mask); } @@ -1107,13 +1465,102 @@ rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf) } dev = &rte_eth_devices[port_id]; + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP); + return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf); +} + +int +rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf) +{ + struct rte_eth_dev *dev; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + + if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) { + PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n"); + return (-EINVAL); + } + dev = &rte_eth_devices[port_id]; /* High water, low water validation are device specific */ - FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP); - if (*dev->dev_ops->flow_ctrl_set) - return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf); + if (*dev->dev_ops->priority_flow_ctrl_set) + return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf); + return (-ENOTSUP); +} + +int +rte_eth_dev_rss_reta_update(uint8_t port_id, struct rte_eth_rss_reta *reta_conf) +{ + struct rte_eth_dev *dev; + uint8_t i,j; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + + /* Invalid mask bit(s) setting */ + if ((reta_conf->mask_lo == 0) && (reta_conf->mask_hi == 0)) { + PMD_DEBUG_TRACE("Invalid update mask bits for port=%d\n",port_id); + return (-EINVAL); + } + + if (reta_conf->mask_lo != 0) { + for (i = 0; i < ETH_RSS_RETA_NUM_ENTRIES/2; i++) { + if ((reta_conf->mask_lo & (1ULL << i)) && + (reta_conf->reta[i] >= ETH_RSS_RETA_MAX_QUEUE)) { + PMD_DEBUG_TRACE("RETA hash index output" + "configration for port=%d,invalid" + "queue=%d\n",port_id,reta_conf->reta[i]); + + return (-EINVAL); + } + } + } + + if (reta_conf->mask_hi != 0) { + for (i = 0; i< ETH_RSS_RETA_NUM_ENTRIES/2; i++) { + j = (uint8_t)(i + ETH_RSS_RETA_NUM_ENTRIES/2); + + /* Check if the max entry >= 128 */ + if ((reta_conf->mask_hi & (1ULL << i)) && + (reta_conf->reta[j] >= ETH_RSS_RETA_MAX_QUEUE)) { + PMD_DEBUG_TRACE("RETA hash index output" + "configration for port=%d,invalid" + "queue=%d\n",port_id,reta_conf->reta[j]); + + return (-EINVAL); + } + } + } + + dev = &rte_eth_devices[port_id]; + + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP); + return (*dev->dev_ops->reta_update)(dev, reta_conf); +} + +int +rte_eth_dev_rss_reta_query(uint8_t port_id, struct rte_eth_rss_reta *reta_conf) +{ + struct rte_eth_dev *dev; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + + if((reta_conf->mask_lo == 0) && (reta_conf->mask_hi == 0)) { + PMD_DEBUG_TRACE("Invalid update mask bits for the port=%d\n",port_id); + return (-EINVAL); + } - return -ENOTSUP; + dev = &rte_eth_devices[port_id]; + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP); + return (*dev->dev_ops->reta_query)(dev, reta_conf); } int @@ -1277,6 +1724,35 @@ rte_eth_tx_burst(uint8_t port_id, uint16_t queue_id, return (*dev->tx_pkt_burst)(dev->data->tx_queues[queue_id], tx_pkts, nb_pkts); } + +uint32_t +rte_eth_rx_queue_count(uint8_t port_id, uint16_t queue_id) +{ + struct rte_eth_dev *dev; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return 0; + } + dev = &rte_eth_devices[port_id]; + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_count, -ENOTSUP); + return (*dev->dev_ops->rx_queue_count)(dev, queue_id); +} + +int +rte_eth_rx_descriptor_done(uint8_t port_id, uint16_t queue_id, uint16_t offset) +{ + struct rte_eth_dev *dev; + + if (port_id >= nb_ports) { + PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); + return (-ENODEV); + } + dev = &rte_eth_devices[port_id]; + FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_descriptor_done, -ENOTSUP); + return (*dev->dev_ops->rx_descriptor_done)( \ + dev->data->rx_queues[queue_id], offset); +} #endif int @@ -1284,40 +1760,38 @@ rte_eth_dev_callback_register(uint8_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg) { - int ret = -1; struct rte_eth_dev *dev; - struct rte_eth_dev_callback *user_cb = NULL; + struct rte_eth_dev_callback *user_cb; if (!cb_fn) - return -1; + return (-EINVAL); if (port_id >= nb_ports) { PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); - return -1; + return (-EINVAL); } + dev = &rte_eth_devices[port_id]; rte_spinlock_lock(&rte_eth_dev_cb_lock); + TAILQ_FOREACH(user_cb, &(dev->callbacks), next) { if (user_cb->cb_fn == cb_fn && user_cb->cb_arg == cb_arg && user_cb->event == event) { - ret = 0; - goto out; + break; } } - user_cb = rte_malloc("INTR_USER_CALLBACK", - sizeof(struct rte_eth_dev_callback), 0); - if (!user_cb) - goto out; - user_cb->cb_fn = cb_fn; - user_cb->cb_arg = cb_arg; - user_cb->event = event; - TAILQ_INSERT_TAIL(&(dev->callbacks), user_cb, next); - ret = 0; -out: - rte_spinlock_unlock(&rte_eth_dev_cb_lock); + /* create a new callback. */ + if (user_cb == NULL && (user_cb = rte_zmalloc("INTR_USER_CALLBACK", + sizeof(struct rte_eth_dev_callback), 0)) != NULL) { + user_cb->cb_fn = cb_fn; + user_cb->cb_arg = cb_arg; + user_cb->event = event; + TAILQ_INSERT_TAIL(&(dev->callbacks), user_cb, next); + } - return ret; + rte_spinlock_unlock(&rte_eth_dev_cb_lock); + return ((user_cb == NULL) ? -ENOMEM : 0); } int @@ -1325,38 +1799,51 @@ rte_eth_dev_callback_unregister(uint8_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg) { - int ret = -1; + int ret; struct rte_eth_dev *dev; - struct rte_eth_dev_callback *cb_lst = NULL; + struct rte_eth_dev_callback *cb, *next; if (!cb_fn) - return -1; + return (-EINVAL); if (port_id >= nb_ports) { PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id); - return -1; + return (-EINVAL); } + dev = &rte_eth_devices[port_id]; rte_spinlock_lock(&rte_eth_dev_cb_lock); - TAILQ_FOREACH(cb_lst, &(dev->callbacks), next) { - if (cb_lst->cb_fn != cb_fn || cb_lst->event != event) + + ret = 0; + for (cb = TAILQ_FIRST(&dev->callbacks); cb != NULL; cb = next) { + + next = TAILQ_NEXT(cb, next); + + if (cb->cb_fn != cb_fn || cb->event != event || + (cb->cb_arg != (void *)-1 && + cb->cb_arg != cb_arg)) continue; - if (cb_lst->cb_arg == (void *)-1 || - cb_lst->cb_arg == cb_arg) { - TAILQ_REMOVE(&(dev->callbacks), cb_lst, next); - rte_free(cb_lst); - ret = 0; + + /* + * if this callback is not executing right now, + * then remove it. + */ + if (cb->active == 0) { + TAILQ_REMOVE(&(dev->callbacks), cb, next); + rte_free(cb); + } else { + ret = -EAGAIN; } } rte_spinlock_unlock(&rte_eth_dev_cb_lock); - - return ret; + return (ret); } void -_rte_eth_dev_callback_process(struct rte_eth_dev *dev, enum rte_eth_event_type event) +_rte_eth_dev_callback_process(struct rte_eth_dev *dev, + enum rte_eth_event_type event) { - struct rte_eth_dev_callback *cb_lst = NULL; + struct rte_eth_dev_callback *cb_lst; struct rte_eth_dev_callback dev_cb; rte_spinlock_lock(&rte_eth_dev_cb_lock); @@ -1364,11 +1851,12 @@ _rte_eth_dev_callback_process(struct rte_eth_dev *dev, enum rte_eth_event_type e if (cb_lst->cb_fn == NULL || cb_lst->event != event) continue; dev_cb = *cb_lst; + cb_lst->active = 1; rte_spinlock_unlock(&rte_eth_dev_cb_lock); dev_cb.cb_fn(dev->data->port_id, dev_cb.event, dev_cb.cb_arg); rte_spinlock_lock(&rte_eth_dev_cb_lock); + cb_lst->active = 0; } rte_spinlock_unlock(&rte_eth_dev_cb_lock); } -