X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_hash%2Frte_hash_crc.h;h=3dcd362841cba8b704823005cfd114bed2478103;hb=12fa4a00788d;hp=6cc67cd1222642882e03b6d6c9804296eb0e8a6c;hpb=d2b989045f9bb0dcbf138a4e13130c41adbf71cf;p=dpdk.git

diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index 6cc67cd122..3dcd362841 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -45,6 +45,9 @@ extern "C" {
 #endif
 
 #include <stdint.h>
+#include <rte_cpuflags.h>
+#include <rte_branch_prediction.h>
+#include <rte_common.h>
 
 /* Lookup tables for software implementation of CRC32C */
 static const uint32_t crc32c_tables[8][256] = {{
@@ -362,6 +365,8 @@ crc32c_2words(uint64_t data, uint32_t init_val)
 	return crc;
 }
 
+#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64)
+
 static inline uint32_t
 crc32c_sse42_u32(uint32_t data, uint32_t init_val)
 {
@@ -372,6 +377,40 @@ crc32c_sse42_u32(uint32_t data, uint32_t init_val)
 	return init_val;
 }
 
+static inline uint32_t
+crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)
+{
+	union {
+		uint32_t u32[2];
+		uint64_t u64;
+	} d;
+
+	d.u64 = data;
+	init_val = crc32c_sse42_u32(d.u32[0], init_val);
+	init_val = crc32c_sse42_u32(d.u32[1], init_val);
+	return init_val;
+}
+
+#else
+
+static inline uint32_t
+crc32c_sse42_u32(__rte_unused uint32_t data,
+                 __rte_unused uint32_t init_val)
+{
+	return 0;
+}
+
+static inline uint32_t
+crc32c_sse42_u64_mimic(__rte_unused uint32_t data,
+                       __rte_unused uint32_t init_val)
+{
+	return 0;
+}
+
+#endif
+
+#ifdef RTE_ARCH_X86_64
+
 static inline uint32_t
 crc32c_sse42_u64(uint64_t data, uint64_t init_val)
 {
@@ -382,22 +421,63 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
 	return init_val;
 }
 
+#else
+
 static inline uint32_t
-crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)
+crc32c_sse42_u64(__rte_unused uint64_t data,
+                 __rte_unused uint64_t init_val)
 {
-	union {
-		uint32_t u32[2];
-		uint64_t u64;
-	} d;
+	return 0;
+}
 
-	d.u64 = data;
-	init_val = crc32c_sse42_u32(d.u32[0], init_val);
-	init_val = crc32c_sse42_u32(d.u32[1], init_val);
-	return init_val;
+#endif
+
+#define CRC32_SW            (1U << 0)
+#define CRC32_SSE42         (1U << 1)
+#define CRC32_x64           (1U << 2)
+#define CRC32_SSE42_x64     (CRC32_x64|CRC32_SSE42)
+
+static uint8_t crc32_alg = CRC32_SW;
+
+/**
+ * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash
+ * calculation.
+ *
+ * @param alg
+ *   An OR of following flags:
+ *   - (CRC32_SW) Don't use SSE4.2 intrinsics
+ *   - (CRC32_SSE42) Use SSE4.2 intrinsics if available
+ *   - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default)
+ *
+ */
+static inline void
+rte_hash_crc_set_alg(uint8_t alg)
+{
+	switch (alg) {
+	case CRC32_SSE42_x64:
+		if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
+			alg = CRC32_SSE42;
+	case CRC32_SSE42:
+		if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2))
+			alg = CRC32_SW;
+	case CRC32_SW:
+		crc32_alg = alg;
+	default:
+		break;
+	}
+}
+
+/* Setting the best available algorithm */
+static inline void __attribute__((constructor))
+rte_hash_crc_init_alg(void)
+{
+	rte_hash_crc_set_alg(CRC32_SSE42_x64);
 }
 
 /**
  * Use single crc32 instruction to perform a hash on a 4 byte value.
+ * Fall back to software crc32 implementation in case SSE4.2 is
+ * not supported
  *
  * @param data
  *   Data to perform hash on.
@@ -409,11 +489,16 @@ crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)
 static inline uint32_t
 rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
 {
-	return crc32c_sse42_u32(data, init_val);
+	if (likely(crc32_alg & CRC32_SSE42))
+		return crc32c_sse42_u32(data, init_val);
+
+	return crc32c_1word(data, init_val);
 }
 
 /**
  * Use single crc32 instruction to perform a hash on a 8 byte value.
+ * Fall back to software crc32 implementation in case SSE4.2 is
+ * not supported
  *
  * @param data
  *   Data to perform hash on.
@@ -425,11 +510,17 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
 {
-	return crc32c_sse42_u64(data, init_val);
+	if (likely(crc32_alg == CRC32_SSE42_x64))
+		return crc32c_sse42_u64(data, init_val);
+
+	if (likely(crc32_alg & CRC32_SSE42))
+		return crc32c_sse42_u64_mimic(data, init_val);
+
+	return crc32c_2words(data, init_val);
 }
 
 /**
- * Use crc32 instruction to perform a hash.
+ * Calculate CRC32 hash on user-supplied byte array.
  *
  * @param data
  *   Data to perform hash on.
@@ -444,23 +535,38 @@ static inline uint32_t
 rte_hash_crc(const void *data, uint32_t data_len, uint32_t init_val)
 {
 	unsigned i;
-	uint32_t temp = 0;
-	const uint32_t *p32 = (const uint32_t *)data;
+	uint64_t temp = 0;
+	const uint64_t *p64 = (const uint64_t *)data;
 
-	for (i = 0; i < data_len / 4; i++) {
-		init_val = rte_hash_crc_4byte(*p32++, init_val);
+	for (i = 0; i < data_len / 8; i++) {
+		init_val = rte_hash_crc_8byte(*p64++, init_val);
 	}
 
-	switch (3 - (data_len & 0x03)) {
+	switch (7 - (data_len & 0x07)) {
 	case 0:
-		temp |= *((const uint8_t *)p32 + 2) << 16;
+		temp |= (uint64_t) *((const uint8_t *)p64 + 6) << 48;
 		/* Fallthrough */
 	case 1:
-		temp |= *((const uint8_t *)p32 + 1) << 8;
+		temp |= (uint64_t) *((const uint8_t *)p64 + 5) << 40;
 		/* Fallthrough */
 	case 2:
-		temp |= *((const uint8_t *)p32);
+		temp |= (uint64_t) *((const uint8_t *)p64 + 4) << 32;
+		temp |= *((const uint32_t *)p64);
+		init_val = rte_hash_crc_8byte(temp, init_val);
+		break;
+	case 3:
+		init_val = rte_hash_crc_4byte(*(const uint32_t *)p64, init_val);
+		break;
+	case 4:
+		temp |= *((const uint8_t *)p64 + 2) << 16;
+		/* Fallthrough */
+	case 5:
+		temp |= *((const uint8_t *)p64 + 1) << 8;
+		/* Fallthrough */
+	case 6:
+		temp |= *((const uint8_t *)p64);
 		init_val = rte_hash_crc_4byte(temp, init_val);
+		/* Fallthrough */
 	default:
 		break;
 	}