X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_pmd_e1000%2Fe1000%2Fe1000_osdep.h;h=d04ec732f6e478c15e1025bf885151edf1760dbc;hb=66e1591687ac;hp=cfea42422a4a095c571fb0cac2b1bacd674ea4b2;hpb=2fd4855f306e9df389d140fc070bd8a3dfbdefc0;p=dpdk.git

diff --git a/lib/librte_pmd_e1000/e1000/e1000_osdep.h b/lib/librte_pmd_e1000/e1000/e1000_osdep.h
index cfea42422a..d04ec732f6 100644
--- a/lib/librte_pmd_e1000/e1000/e1000_osdep.h
+++ b/lib/librte_pmd_e1000/e1000/e1000_osdep.h
@@ -1,6 +1,6 @@
 /******************************************************************************
 
-  Copyright (c) 2001-2011, Intel Corporation 
+  Copyright (c) 2001-2014, Intel Corporation 
   All rights reserved.
   
   Redistribution and use in source and binary forms, with or without 
@@ -43,16 +43,18 @@
 #include <rte_cycles.h>
 #include <rte_log.h>
 #include <rte_debug.h>
+#include <rte_byteorder.h>
 
 #include "../e1000_logs.h"
 
 #define DELAY(x) rte_delay_us(x)
 #define usec_delay(x) DELAY(x)
+#define usec_delay_irq(x) DELAY(x)
 #define msec_delay(x) DELAY(1000*(x))
 #define msec_delay_irq(x) DELAY(1000*(x))
 
-#define DEBUGFUNC(F)            DEBUGOUT(F);
-#define DEBUGOUT(S, args...)    PMD_DRV_LOG(DEBUG, S, ##args)
+#define DEBUGFUNC(F)            DEBUGOUT(F "\n");
+#define DEBUGOUT(S, args...)    PMD_DRV_LOG_RAW(DEBUG, S, ##args)
 #define DEBUGOUT1(S, args...)   DEBUGOUT(S, ##args)
 #define DEBUGOUT2(S, args...)   DEBUGOUT(S, ##args)
 #define DEBUGOUT3(S, args...)   DEBUGOUT(S, ##args)
@@ -95,7 +97,7 @@ typedef int		bool;
 #define E1000_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
 
 #define E1000_PCI_REG_WRITE(reg, value) do { \
-	E1000_PCI_REG((reg)) = (value); \
+	E1000_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \
 } while (0)
 
 #define E1000_PCI_REG_ADDR(hw, reg) \
@@ -106,9 +108,22 @@ typedef int		bool;
 
 static inline uint32_t e1000_read_addr(volatile void* addr)
 {
-	return E1000_PCI_REG(addr);
+	return rte_le_to_cpu_32(E1000_PCI_REG(addr));
 }
 
+/* Necessary defines */
+#define E1000_MRQC_ENABLE_MASK                  0x00000007
+#define E1000_MRQC_RSS_FIELD_IPV6_EX		0x00080000
+#define E1000_ALL_FULL_DUPLEX   ( \
+        ADVERTISE_10_FULL | ADVERTISE_100_FULL | ADVERTISE_1000_FULL)
+
+#define M88E1543_E_PHY_ID    0x01410EA0
+#define NAHUM6LP_HW 
+#define ULP_SUPPORT
+
+#define E1000_RCTL_DTYP_MASK	0x00000C00 /* Descriptor type mask */
+#define E1000_MRQC_RSS_FIELD_IPV6_EX            0x00080000
+
 /* Register READ/WRITE macros */
 
 #define E1000_READ_REG(hw, reg) \