X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_pmd_ixgbe%2Fixgbe_fdir.c;h=06de1fbfce7e7f31f300311c6d244464e55340d1;hb=6441b9f65327386490d4a4f2e2a09458f6e070bc;hp=3b4f5b7ed4ca52ffda87e1a42e1263046529f286;hpb=c25eb53e5d137430ec4f27b77dd4cba5b6ad3680;p=dpdk.git

diff --git a/lib/librte_pmd_ixgbe/ixgbe_fdir.c b/lib/librte_pmd_ixgbe/ixgbe_fdir.c
index 3b4f5b7ed4..06de1fbfce 100644
--- a/lib/librte_pmd_ixgbe/ixgbe_fdir.c
+++ b/lib/librte_pmd_ixgbe/ixgbe_fdir.c
@@ -608,7 +608,7 @@ fdir_set_input_mask_82599(struct ixgbe_hw *hw,
 
 	/*
 	 * Program the relevant mask registers.  If src/dst_port or src/dst_addr
-	 * are zero, then assume a full mask for that field.  Also assume that
+	 * are zero, then assume a full mask for that field. Also assume that
 	 * a VLAN of 0 is unspecified, so mask that out as well.  L4type
 	 * cannot be masked out in this implementation.
 	 */
@@ -649,10 +649,10 @@ fdir_set_input_mask_82599(struct ixgbe_hw *hw,
 
 	if (!input_mask->set_ipv6_mask) {
 		/* Store source and destination IPv4 masks (big-endian) */
-	IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M,
-			IXGBE_NTOHL(~input_mask->src_ipv4_mask));
-	IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M,
-			IXGBE_NTOHL(~input_mask->dst_ipv4_mask));
+		IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M,
+				IXGBE_NTOHL(~input_mask->src_ipv4_mask));
+		IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M,
+				IXGBE_NTOHL(~input_mask->dst_ipv4_mask));
 	}
 	else {
 		/* Store source and destination IPv6 masks (bit reversed) */