X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_power%2Fpower_pstate_cpufreq.c;h=2526441a4c0b16aa173651e36ea2e733af4de3b8;hb=f74904ce98e84f48e8f3a96b7ad6b6347c3f44b6;hp=336c13869da3c7d0b34a441f1e063f9232074d73;hpb=6723c0fc7207ca4416822b170b1485a78aa47c7c;p=dpdk.git

diff --git a/lib/librte_power/power_pstate_cpufreq.c b/lib/librte_power/power_pstate_cpufreq.c
index 336c13869d..2526441a4c 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -14,9 +14,10 @@
 #include <errno.h>
 #include <inttypes.h>
 
-#include <rte_string_fns.h>
-#include <rte_memcpy.h>
 #include <rte_atomic.h>
+#include <rte_memcpy.h>
+#include <rte_memory.h>
+#include <rte_string_fns.h>
 
 #include "power_pstate_cpufreq.h"
 #include "power_common.h"
@@ -32,7 +33,7 @@
 
 #define FOPEN_OR_ERR_RET(f, retval) do { \
 		if ((f) == NULL) { \
-			RTE_LOG(ERR, POWER, "File not openned\n"); \
+			RTE_LOG(ERR, POWER, "File not opened\n"); \
 			return retval; \
 		} \
 } while (0)
@@ -70,6 +71,7 @@
 		"/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq"
 #define POWER_SYSFILE_BASE_FREQ  \
 		"/sys/devices/system/cpu/cpu%u/cpufreq/base_frequency"
+#define POWER_PSTATE_DRIVER "intel_pstate"
 #define POWER_MSR_PATH  "/dev/cpu/%u/msr"
 
 /*
@@ -158,6 +160,7 @@ power_init_for_setting_freq(struct pstate_power_info *pi)
 	char *s_base;
 	uint32_t base_ratio = 0;
 	uint64_t max_non_turbo = 0;
+	int  ret_val = 0;
 
 	snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
 			pi->lcore_id);
@@ -199,8 +202,10 @@ power_init_for_setting_freq(struct pstate_power_info *pi)
 
 	/* Add MSR read to detect turbo status */
 
-	if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0)
-		return -1;
+	if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0) {
+		ret_val = -1;
+		goto out;
+	}
 
 	max_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;
 
@@ -219,7 +224,9 @@ power_init_for_setting_freq(struct pstate_power_info *pi)
 	pi->core_base_freq = base_ratio * BUS_FREQ;
 
 out:
-	return 0;
+	if (f_base != NULL)
+		fclose(f_base);
+	return ret_val;
 }
 
 static int
@@ -281,7 +288,7 @@ set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
 			return -1;
 		}
 
-		POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
+		POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
 				  target_freq, pi->lcore_id);
 
 		fflush(pi->f_cur_min);
@@ -304,7 +311,7 @@ set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
 			return -1;
 		}
 
-		POWER_DEBUG_TRACE("Freqency '%u' to be set for lcore %u\n",
+		POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
 				  target_freq, pi->lcore_id);
 
 		fflush(pi->f_cur_max);
@@ -525,6 +532,12 @@ out:
 	return ret;
 }
 
+int
+power_pstate_cpufreq_check_supported(void)
+{
+	return cpufreq_check_scaling_driver(POWER_PSTATE_DRIVER);
+}
+
 int
 power_pstate_cpufreq_init(unsigned int lcore_id)
 {
@@ -690,7 +703,8 @@ power_pstate_cpufreq_freq_up(unsigned int lcore_id)
 	}
 
 	pi = &lcore_power_info[lcore_id];
-	if (pi->curr_idx == 0)
+	if (pi->curr_idx == 0 ||
+	    (pi->curr_idx == 1 && pi->turbo_available && !pi->turbo_enable))
 		return 0;
 
 	/* Frequencies in the array are from high to low. */
@@ -810,6 +824,15 @@ power_pstate_disable_turbo(unsigned int lcore_id)
 
 	pi->turbo_enable = 0;
 
+	if (pi->turbo_available && pi->curr_idx <= 1) {
+		/* Try to set freq to max by default coming out of turbo */
+		if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
+			RTE_LOG(ERR, POWER,
+				"Failed to set frequency of lcore %u to max\n",
+				lcore_id);
+			return -1;
+		}
+	}
 
 	return 0;
 }