NFB cards employ multiple Ethernet ports.
Until now, Ethernet port-related operations were performed on all of them
(since the whole card was represented as a single port).
With new NFB-200G2QL card, this is no longer viable.
Since there is no fixed mapping between the queues and Ethernet ports,
and since a single card can be represented as two ports in DPDK,
there is no way of telling which (if any) physical ports should be
associated with individual ports in DPDK.
This is also described in documentation in more detail.
Signed-off-by: Matej Vido <vido@cesnet.cz>
Signed-off-by: Jan Remes <remes@netcope.com>
# Compile software PMD backed by SZEDATA2 device
#
CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
-#
-# Defines firmware type address space.
-# See documentation for supported values.
-# Other values raise compile time error.
-CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0
#
# Compile burst-oriented Cavium Thunderx NICVF PMD driver
--- /dev/null
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+ id="path49"
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+ id="path53"
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+ id="path57"
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+ <text
+ id="text4480"
+ y="54.570911"
+ x="24.425898"
+ style="font-style:normal;font-weight:normal;font-size:18.75px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ y="54.570911"
+ x="24.425898"
+ id="tspan4482">ETH 0</tspan></text>
+ <text
+ id="text4480-3"
+ y="103.53807"
+ x="25.51882"
+ style="font-style:normal;font-weight:normal;font-size:20px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ style="font-size:18.75px"
+ id="tspan4502"
+ y="103.53807"
+ x="25.51882">ETH 1</tspan></text>
+ <text
+ id="text4480-7"
+ y="86.200645"
+ x="103.15979"
+ style="font-style:normal;font-weight:normal;font-size:18.75px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ id="tspan4524"
+ y="86.200645"
+ x="103.15979">NFB-200G2QL card</tspan></text>
+ <text
+ id="text4480-7-3"
+ y="169.2041"
+ x="92.195312"
+ style="font-style:normal;font-weight:normal;font-size:18.75px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ style="font-size:18.75px"
+ id="tspan4546"
+ y="169.2041"
+ x="92.195312">PCI-E master slot</tspan></text>
+ <text
+ id="text4480-7-3-6"
+ y="169.20409"
+ x="367.98856"
+ style="font-style:normal;font-weight:normal;font-size:18.75px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ style="font-size:18.75px"
+ id="tspan4546-2"
+ y="169.20409"
+ x="367.98856">PCI-E slave slot</tspan></text>
+ <text
+ transform="matrix(0,1,-1,0,0,0)"
+ id="text4480-3-9"
+ y="-73.591309"
+ x="182.29367"
+ style="font-style:normal;font-weight:normal;font-size:20px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ style="font-size:18.75px"
+ id="tspan4502-1"
+ y="-73.591309"
+ x="182.29367">QUEUE 0</tspan></text>
+ <text
+ transform="matrix(0,1.0000002,-0.99999976,0,0,0)"
+ id="text4480-3-9-2"
+ y="-251.11163"
+ x="182.29283"
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+ xml:space="preserve"><tspan
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+ x="182.29283">QUEUE 15</tspan></text>
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+ xml:space="preserve"><tspan
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+ y="-341.94324"
+ x="182.29311">QUEUE 16</tspan></text>
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+ xml:space="preserve"><tspan
+ style="font-size:18.75px"
+ id="tspan4502-1-7-6"
+ y="-517.70703"
+ x="182.29356">QUEUE 31</tspan></text>
+ <text
+ id="text4480-3-0"
+ y="299.21396"
+ x="128.3978"
+ style="font-style:normal;font-weight:normal;font-size:20px;line-height:125%;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ xml:space="preserve"><tspan
+ style="font-size:18.75px"
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* **Kernel modules**
+ * combo6core
* combov3
- * szedata2_cv3
+ * szedata2
+ * szedata2_cv3 or szedata2_cv3_fdt
Kernel modules manage initialization of hardware, allocation and
sharing of resources for user space applications.
Value **y** enables compilation of szedata2 PMD.
-* ``CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS`` default value: **0**
-
- This option defines type of firmware address space and must be set
- according to the used card and mode.
- Currently supported values are:
-
- * **0** - for cards (modes):
-
- * NFB-100G1 (100G1)
+Using the SZEDATA2 PMD
+----------------------
- * **1** - for cards (modes):
+From DPDK version 16.04 the type of SZEDATA2 PMD is changed to PMD_PDEV.
+SZEDATA2 device is automatically recognized during EAL initialization.
+No special command line options are needed.
- * NFB-100G2Q (100G1)
+Kernel modules have to be loaded before running the DPDK application.
- * **2** - for cards (modes):
+NFB card architecture
+---------------------
- * NFB-40G2 (40G2)
- * NFB-100G2C (100G2)
- * NFB-100G2Q (40G2)
+The NFB cards are multi-port multi-queue cards, where (generally) data from any
+Ethernet port may be sent to any queue.
+They were historically represented in DPDK as a single port.
- * **3** - for cards (modes):
+However, the new NFB-200G2QL card employs an addon cable which allows to connect
+it to two physical PCI-E slots at the same time (see the diagram below).
+This is done to allow 200 Gbps of traffic to be transferred through the PCI-E
+bus (note that a single PCI-E 3.0 x16 slot provides only 125 Gbps theoretical
+throughput).
- * NFB-40G2 (10G8)
- * NFB-100G2Q (10G8)
+Since each slot may be connected to a different CPU and therefore to a different
+NUMA node, the card is represented as two ports in DPDK (each with half of the
+queues), which allows DPDK to work with data from the individual queues on the
+right NUMA node.
- * **4** - for cards (modes):
+.. figure:: img/szedata2_nfb200g_architecture.svg
+ :align: center
- * NFB-100G1 (10G10)
+ NFB-200G2QL high-level diagram
- * **5** - for experimental firmwares and future use
+Limitations
+-----------
-Using the SZEDATA2 PMD
-----------------------
+The SZEDATA2 PMD does not support operations related to Ethernet ports
+(link_up, link_down, set_mac_address, etc.).
-From DPDK version 16.04 the type of SZEDATA2 PMD is changed to PMD_PDEV.
-SZEDATA2 device is automatically recognized during EAL initialization.
-No special command line options are needed.
+NFB cards employ multiple Ethernet ports.
+Until now, Ethernet port-related operations were performed on all of them
+(since the whole card was represented as a single port).
+With NFB-200G2QL card, this is no longer viable (see above).
-Kernel modules have to be loaded before running the DPDK application.
+Since there is no fixed mapping between the queues and Ethernet ports, and since
+a single card can be represented as two ports in DPDK, there is no way of
+telling which (if any) physical ports should be associated with individual
+ports in DPDK.
Example of usage
----------------
# all source are stored in SRCS-y
#
SRCS-$(CONFIG_RTE_LIBRTE_PMD_SZEDATA2) += rte_eth_szedata2.c
-SRCS-$(CONFIG_RTE_LIBRTE_PMD_SZEDATA2) += szedata2_iobuf.c
#
# Export include files
#include "rte_eth_szedata2.h"
#include "szedata2_logs.h"
-#include "szedata2_iobuf.h"
#define RTE_ETH_SZEDATA2_MAX_RX_QUEUES 32
#define RTE_ETH_SZEDATA2_MAX_TX_QUEUES 32
dev->data->nb_tx_queues = 0;
}
-/**
- * Function takes value from first IBUF status register.
- * Values in IBUF and OBUF should be same.
- *
- * @param internals
- * Pointer to device private structure.
- * @return
- * Link speed constant.
- */
-static inline enum szedata2_link_speed
-get_link_speed(const struct pmd_internals *internals)
-{
- const volatile struct szedata2_ibuf *ibuf =
- ibuf_ptr_by_index(internals->pci_rsc, 0);
- uint32_t speed = (szedata2_read32(&ibuf->ibuf_st) & 0x70) >> 4;
- switch (speed) {
- case 0x03:
- return SZEDATA2_LINK_SPEED_10G;
- case 0x04:
- return SZEDATA2_LINK_SPEED_40G;
- case 0x05:
- return SZEDATA2_LINK_SPEED_100G;
- default:
- return SZEDATA2_LINK_SPEED_DEFAULT;
- }
-}
-
static int
eth_link_update(struct rte_eth_dev *dev,
int wait_to_complete __rte_unused)
{
struct rte_eth_link link;
- struct pmd_internals *internals = (struct pmd_internals *)
- dev->data->dev_private;
- const volatile struct szedata2_ibuf *ibuf;
- uint32_t i;
- bool link_is_up = false;
memset(&link, 0, sizeof(link));
- switch (get_link_speed(internals)) {
- case SZEDATA2_LINK_SPEED_10G:
- link.link_speed = ETH_SPEED_NUM_10G;
- break;
- case SZEDATA2_LINK_SPEED_40G:
- link.link_speed = ETH_SPEED_NUM_40G;
- break;
- case SZEDATA2_LINK_SPEED_100G:
- link.link_speed = ETH_SPEED_NUM_100G;
- break;
- default:
- link.link_speed = ETH_SPEED_NUM_10G;
- break;
- }
-
- /* szedata2 uses only full duplex */
+ link.link_speed = ETH_SPEED_NUM_100G;
link.link_duplex = ETH_LINK_FULL_DUPLEX;
-
- for (i = 0; i < szedata2_ibuf_count; i++) {
- ibuf = ibuf_ptr_by_index(internals->pci_rsc, i);
- /*
- * Link is considered up if at least one ibuf is enabled
- * and up.
- */
- if (ibuf_is_enabled(ibuf) && ibuf_is_link_up(ibuf)) {
- link_is_up = true;
- break;
- }
- }
-
- link.link_status = link_is_up ? ETH_LINK_UP : ETH_LINK_DOWN;
-
+ link.link_status = ETH_LINK_UP;
link.link_autoneg = ETH_LINK_FIXED;
rte_eth_linkstatus_set(dev, &link);
}
static int
-eth_dev_set_link_up(struct rte_eth_dev *dev)
+eth_dev_set_link_up(struct rte_eth_dev *dev __rte_unused)
{
- struct pmd_internals *internals = (struct pmd_internals *)
- dev->data->dev_private;
- uint32_t i;
-
- for (i = 0; i < szedata2_ibuf_count; i++)
- ibuf_enable(ibuf_ptr_by_index(internals->pci_rsc, i));
- for (i = 0; i < szedata2_obuf_count; i++)
- obuf_enable(obuf_ptr_by_index(internals->pci_rsc, i));
+ PMD_DRV_LOG(WARNING, "Setting link up is not supported.");
return 0;
}
static int
-eth_dev_set_link_down(struct rte_eth_dev *dev)
+eth_dev_set_link_down(struct rte_eth_dev *dev __rte_unused)
{
- struct pmd_internals *internals = (struct pmd_internals *)
- dev->data->dev_private;
- uint32_t i;
-
- for (i = 0; i < szedata2_ibuf_count; i++)
- ibuf_disable(ibuf_ptr_by_index(internals->pci_rsc, i));
- for (i = 0; i < szedata2_obuf_count; i++)
- obuf_disable(obuf_ptr_by_index(internals->pci_rsc, i));
+ PMD_DRV_LOG(WARNING, "Setting link down is not supported.");
return 0;
}
}
static void
-eth_promiscuous_enable(struct rte_eth_dev *dev)
+eth_promiscuous_enable(struct rte_eth_dev *dev __rte_unused)
{
- struct pmd_internals *internals = (struct pmd_internals *)
- dev->data->dev_private;
- uint32_t i;
-
- for (i = 0; i < szedata2_ibuf_count; i++) {
- ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
- SZEDATA2_MAC_CHMODE_PROMISC);
- }
+ PMD_DRV_LOG(WARNING, "Enabling promiscuous mode is not supported. "
+ "The card is always in promiscuous mode.");
}
static void
-eth_promiscuous_disable(struct rte_eth_dev *dev)
+eth_promiscuous_disable(struct rte_eth_dev *dev __rte_unused)
{
- struct pmd_internals *internals = (struct pmd_internals *)
- dev->data->dev_private;
- uint32_t i;
-
- for (i = 0; i < szedata2_ibuf_count; i++) {
- ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
- SZEDATA2_MAC_CHMODE_ONLY_VALID);
- }
+ PMD_DRV_LOG(WARNING, "Disabling promiscuous mode is not supported. "
+ "The card is always in promiscuous mode.");
}
static void
-eth_allmulticast_enable(struct rte_eth_dev *dev)
+eth_allmulticast_enable(struct rte_eth_dev *dev __rte_unused)
{
- struct pmd_internals *internals = (struct pmd_internals *)
- dev->data->dev_private;
- uint32_t i;
-
- for (i = 0; i < szedata2_ibuf_count; i++) {
- ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
- SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
- }
+ PMD_DRV_LOG(WARNING, "Enabling allmulticast mode is not supported.");
}
static void
-eth_allmulticast_disable(struct rte_eth_dev *dev)
+eth_allmulticast_disable(struct rte_eth_dev *dev __rte_unused)
{
- struct pmd_internals *internals = (struct pmd_internals *)
- dev->data->dev_private;
- uint32_t i;
-
- for (i = 0; i < szedata2_ibuf_count; i++) {
- ibuf_mac_mode_write(ibuf_ptr_by_index(internals->pci_rsc, i),
- SZEDATA2_MAC_CHMODE_ONLY_VALID);
- }
+ PMD_DRV_LOG(WARNING, "Disabling allmulticast mode is not supported.");
}
static const struct eth_dev_ops ops = {
ether_addr_copy(ð_addr, data->mac_addrs);
- /* At initial state COMBO card is in promiscuous mode so disable it */
- eth_promiscuous_disable(dev);
-
PMD_INIT_LOG(INFO, "szedata2 device ("
PCI_PRI_FMT ") successfully initialized",
pci_addr->domain, pci_addr->bus, pci_addr->devid,
+++ /dev/null
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2017 CESNET
- */
-
-#include <stdint.h>
-
-#include <rte_common.h>
-
-#include "szedata2_iobuf.h"
-
-/*
- * IBUFs and OBUFs can generally be located at different offsets in different
- * firmwares (modes).
- * This part defines base offsets of IBUFs and OBUFs for various cards
- * and firmwares (modes).
- * Type of firmware (mode) is set through configuration option
- * CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS.
- * Possible values are:
- * 0 - for cards (modes):
- * NFB-100G1 (100G1)
- *
- * 1 - for cards (modes):
- * NFB-100G2Q (100G1)
- *
- * 2 - for cards (modes):
- * NFB-40G2 (40G2)
- * NFB-100G2C (100G2)
- * NFB-100G2Q (40G2)
- *
- * 3 - for cards (modes):
- * NFB-40G2 (10G8)
- * NFB-100G2Q (10G8)
- *
- * 4 - for cards (modes):
- * NFB-100G1 (10G10)
- *
- * 5 - for experimental firmwares and future use
- */
-#if !defined(RTE_LIBRTE_PMD_SZEDATA2_AS)
-#error "RTE_LIBRTE_PMD_SZEDATA2_AS has to be defined"
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 0
-
-/*
- * Cards (modes):
- * NFB-100G1 (100G1)
- */
-
-const uint32_t szedata2_ibuf_base_table[] = {
- 0x8000
-};
-const uint32_t szedata2_obuf_base_table[] = {
- 0x9000
-};
-
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 1
-
-/*
- * Cards (modes):
- * NFB-100G2Q (100G1)
- */
-
-const uint32_t szedata2_ibuf_base_table[] = {
- 0x8800
-};
-const uint32_t szedata2_obuf_base_table[] = {
- 0x9800
-};
-
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 2
-
-/*
- * Cards (modes):
- * NFB-40G2 (40G2)
- * NFB-100G2C (100G2)
- * NFB-100G2Q (40G2)
- */
-
-const uint32_t szedata2_ibuf_base_table[] = {
- 0x8000,
- 0x8800
-};
-const uint32_t szedata2_obuf_base_table[] = {
- 0x9000,
- 0x9800
-};
-
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 3
-
-/*
- * Cards (modes):
- * NFB-40G2 (10G8)
- * NFB-100G2Q (10G8)
- */
-
-const uint32_t szedata2_ibuf_base_table[] = {
- 0x8000,
- 0x8200,
- 0x8400,
- 0x8600,
- 0x8800,
- 0x8A00,
- 0x8C00,
- 0x8E00
-};
-const uint32_t szedata2_obuf_base_table[] = {
- 0x9000,
- 0x9200,
- 0x9400,
- 0x9600,
- 0x9800,
- 0x9A00,
- 0x9C00,
- 0x9E00
-};
-
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 4
-
-/*
- * Cards (modes):
- * NFB-100G1 (10G10)
- */
-
-const uint32_t szedata2_ibuf_base_table[] = {
- 0x8000,
- 0x8200,
- 0x8400,
- 0x8600,
- 0x8800,
- 0x8A00,
- 0x8C00,
- 0x8E00,
- 0x9000,
- 0x9200
-};
-const uint32_t szedata2_obuf_base_table[] = {
- 0xA000,
- 0xA200,
- 0xA400,
- 0xA600,
- 0xA800,
- 0xAA00,
- 0xAC00,
- 0xAE00,
- 0xB000,
- 0xB200
-};
-
-#elif RTE_LIBRTE_PMD_SZEDATA2_AS == 5
-
-/*
- * Future use and experimental firmwares.
- */
-
-const uint32_t szedata2_ibuf_base_table[] = {
- 0x8000,
- 0x8200,
- 0x8400,
- 0x8600,
- 0x8800
-};
-const uint32_t szedata2_obuf_base_table[] = {
- 0x9000,
- 0x9200,
- 0x9400,
- 0x9600,
- 0x9800
-};
-
-#else
-#error "RTE_LIBRTE_PMD_SZEDATA2_AS has wrong value, see comments in config file"
-#endif
-
-const uint32_t szedata2_ibuf_count = RTE_DIM(szedata2_ibuf_base_table);
-const uint32_t szedata2_obuf_count = RTE_DIM(szedata2_obuf_base_table);
+++ /dev/null
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2017 CESNET
- */
-
-#ifndef _SZEDATA2_IOBUF_H_
-#define _SZEDATA2_IOBUF_H_
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#include <rte_byteorder.h>
-#include <rte_io.h>
-#include <rte_dev.h>
-
-/* IBUF offsets from the beginning of the PCI resource address space. */
-extern const uint32_t szedata2_ibuf_base_table[];
-extern const uint32_t szedata2_ibuf_count;
-
-/* OBUF offsets from the beginning of the PCI resource address space. */
-extern const uint32_t szedata2_obuf_base_table[];
-extern const uint32_t szedata2_obuf_count;
-
-enum szedata2_link_speed {
- SZEDATA2_LINK_SPEED_DEFAULT = 0,
- SZEDATA2_LINK_SPEED_10G,
- SZEDATA2_LINK_SPEED_40G,
- SZEDATA2_LINK_SPEED_100G,
-};
-
-enum szedata2_mac_check_mode {
- SZEDATA2_MAC_CHMODE_PROMISC = 0x0,
- SZEDATA2_MAC_CHMODE_ONLY_VALID = 0x1,
- SZEDATA2_MAC_CHMODE_ALL_BROADCAST = 0x2,
- SZEDATA2_MAC_CHMODE_ALL_MULTICAST = 0x3,
-};
-
-/**
- * Macro takes pointer to pci resource structure (rsc)
- * and returns pointer to mapped resource memory at
- * specified offset (offset) typecast to the type (type).
- */
-#define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
- ((type)(((uint8_t *)(rsc)->addr) + (offset)))
-
-/**
- * Maximum possible number of MAC addresses (limited by IBUF status
- * register value MAC_COUNT which has 5 bits).
- */
-#define SZEDATA2_IBUF_MAX_MAC_COUNT 32
-
-/**
- * Structure describes IBUF address space.
- */
-struct szedata2_ibuf {
- /** Total Received Frames Counter low part */
- uint32_t trfcl; /**< 0x00 */
- /** Correct Frames Counter low part */
- uint32_t cfcl; /**< 0x04 */
- /** Discarded Frames Counter low part */
- uint32_t dfcl; /**< 0x08 */
- /** Counter of frames discarded due to buffer overflow low part */
- uint32_t bodfcl; /**< 0x0C */
- /** Total Received Frames Counter high part */
- uint32_t trfch; /**< 0x10 */
- /** Correct Frames Counter high part */
- uint32_t cfch; /**< 0x14 */
- /** Discarded Frames Counter high part */
- uint32_t dfch; /**< 0x18 */
- /** Counter of frames discarded due to buffer overflow high part */
- uint32_t bodfch; /**< 0x1C */
- /** IBUF enable register */
- uint32_t ibuf_en; /**< 0x20 */
- /** Error mask register */
- uint32_t err_mask; /**< 0x24 */
- /** IBUF status register */
- uint32_t ibuf_st; /**< 0x28 */
- /** IBUF command register */
- uint32_t ibuf_cmd; /**< 0x2C */
- /** Minimum frame length allowed */
- uint32_t mfla; /**< 0x30 */
- /** Frame MTU */
- uint32_t mtu; /**< 0x34 */
- /** MAC address check mode */
- uint32_t mac_chmode; /**< 0x38 */
- /** Octets Received OK Counter low part */
- uint32_t orocl; /**< 0x3C */
- /** Octets Received OK Counter high part */
- uint32_t oroch; /**< 0x40 */
- /** reserved */
- uint8_t reserved[60]; /**< 0x4C */
- /** IBUF memory for MAC addresses */
- uint32_t mac_mem[2 * SZEDATA2_IBUF_MAX_MAC_COUNT]; /**< 0x80 */
-} __rte_packed;
-
-/**
- * Structure describes OBUF address space.
- */
-struct szedata2_obuf {
- /** Total Sent Frames Counter low part */
- uint32_t tsfcl; /**< 0x00 */
- /** Octets Sent Counter low part */
- uint32_t oscl; /**< 0x04 */
- /** Total Discarded Frames Counter low part */
- uint32_t tdfcl; /**< 0x08 */
- /** reserved */
- uint32_t reserved1; /**< 0x0C */
- /** Total Sent Frames Counter high part */
- uint32_t tsfch; /**< 0x10 */
- /** Octets Sent Counter high part */
- uint32_t osch; /**< 0x14 */
- /** Total Discarded Frames Counter high part */
- uint32_t tdfch; /**< 0x18 */
- /** reserved */
- uint32_t reserved2; /**< 0x1C */
- /** OBUF enable register */
- uint32_t obuf_en; /**< 0x20 */
- /** reserved */
- uint64_t reserved3; /**< 0x24 */
- /** OBUF control register */
- uint32_t ctrl; /**< 0x2C */
- /** OBUF status register */
- uint32_t obuf_st; /**< 0x30 */
-} __rte_packed;
-
-/**
- * Wrapper for reading 4 bytes from device memory in correct endianness.
- *
- * @param addr
- * Address for reading.
- * @return
- * 4 B value.
- */
-static inline uint32_t
-szedata2_read32(const volatile void *addr)
-{
- return rte_le_to_cpu_32(rte_read32(addr));
-}
-
-/**
- * Wrapper for writing 4 bytes to device memory in correct endianness.
- *
- * @param value
- * Value to write.
- * @param addr
- * Address for writing.
- */
-static inline void
-szedata2_write32(uint32_t value, volatile void *addr)
-{
- rte_write32(rte_cpu_to_le_32(value), addr);
-}
-
-/**
- * Get pointer to IBUF structure according to specified index.
- *
- * @param rsc
- * Pointer to base address of memory resource.
- * @param index
- * Index of IBUF.
- * @return
- * Pointer to IBUF structure.
- */
-static inline struct szedata2_ibuf *
-ibuf_ptr_by_index(struct rte_mem_resource *rsc, uint32_t index)
-{
- if (index >= szedata2_ibuf_count)
- index = szedata2_ibuf_count - 1;
- return SZEDATA2_PCI_RESOURCE_PTR(rsc, szedata2_ibuf_base_table[index],
- struct szedata2_ibuf *);
-}
-
-/**
- * Get pointer to OBUF structure according to specified idnex.
- *
- * @param rsc
- * Pointer to base address of memory resource.
- * @param index
- * Index of OBUF.
- * @return
- * Pointer to OBUF structure.
- */
-static inline struct szedata2_obuf *
-obuf_ptr_by_index(struct rte_mem_resource *rsc, uint32_t index)
-{
- if (index >= szedata2_obuf_count)
- index = szedata2_obuf_count - 1;
- return SZEDATA2_PCI_RESOURCE_PTR(rsc, szedata2_obuf_base_table[index],
- struct szedata2_obuf *);
-}
-
-/**
- * Checks if IBUF is enabled.
- *
- * @param ibuf
- * Pointer to IBUF structure.
- * @return
- * true if IBUF is enabled.
- * false if IBUF is disabled.
- */
-static inline bool
-ibuf_is_enabled(const volatile struct szedata2_ibuf *ibuf)
-{
- return ((szedata2_read32(&ibuf->ibuf_en) & 0x1) != 0) ? true : false;
-}
-
-/**
- * Enables IBUF.
- *
- * @param ibuf
- * Pointer to IBUF structure.
- */
-static inline void
-ibuf_enable(volatile struct szedata2_ibuf *ibuf)
-{
- szedata2_write32(szedata2_read32(&ibuf->ibuf_en) | 0x1, &ibuf->ibuf_en);
-}
-
-/**
- * Disables IBUF.
- *
- * @param ibuf
- * Pointer to IBUF structure.
- */
-static inline void
-ibuf_disable(volatile struct szedata2_ibuf *ibuf)
-{
- szedata2_write32(szedata2_read32(&ibuf->ibuf_en) & ~0x1,
- &ibuf->ibuf_en);
-}
-
-/**
- * Checks if link is up.
- *
- * @param ibuf
- * Pointer to IBUF structure.
- * @return
- * true if ibuf link is up.
- * false if ibuf link is down.
- */
-static inline bool
-ibuf_is_link_up(const volatile struct szedata2_ibuf *ibuf)
-{
- return ((szedata2_read32(&ibuf->ibuf_st) & 0x80) != 0) ? true : false;
-}
-
-/**
- * Get current MAC address check mode from IBUF.
- *
- * @param ibuf
- * Pointer to IBUF structure.
- * @return
- * MAC address check mode constant.
- */
-static inline enum szedata2_mac_check_mode
-ibuf_mac_mode_read(const volatile struct szedata2_ibuf *ibuf)
-{
- switch (szedata2_read32(&ibuf->mac_chmode) & 0x3) {
- case 0x0:
- return SZEDATA2_MAC_CHMODE_PROMISC;
- case 0x1:
- return SZEDATA2_MAC_CHMODE_ONLY_VALID;
- case 0x2:
- return SZEDATA2_MAC_CHMODE_ALL_BROADCAST;
- case 0x3:
- return SZEDATA2_MAC_CHMODE_ALL_MULTICAST;
- default:
- return SZEDATA2_MAC_CHMODE_PROMISC;
- }
-}
-
-/**
- * Writes mode in MAC address check mode register in IBUF.
- *
- * @param ibuf
- * Pointer to IBUF structure.
- * @param mode
- * MAC address check mode to set.
- */
-static inline void
-ibuf_mac_mode_write(volatile struct szedata2_ibuf *ibuf,
- enum szedata2_mac_check_mode mode)
-{
- szedata2_write32((szedata2_read32(&ibuf->mac_chmode) & ~0x3) | mode,
- &ibuf->mac_chmode);
-}
-
-/**
- * Checks if obuf is enabled.
- *
- * @param obuf
- * Pointer to OBUF structure.
- * @return
- * true if OBUF is enabled.
- * false if OBUF is disabled.
- */
-static inline bool
-obuf_is_enabled(const volatile struct szedata2_obuf *obuf)
-{
- return ((szedata2_read32(&obuf->obuf_en) & 0x1) != 0) ? true : false;
-}
-
-/**
- * Enables OBUF.
- *
- * @param obuf
- * Pointer to OBUF structure.
- */
-static inline void
-obuf_enable(volatile struct szedata2_obuf *obuf)
-{
- szedata2_write32(szedata2_read32(&obuf->obuf_en) | 0x1, &obuf->obuf_en);
-}
-
-/**
- * Disables OBUF.
- *
- * @param obuf
- * Pointer to OBUF structure.
- */
-static inline void
-obuf_disable(volatile struct szedata2_obuf *obuf)
-{
- szedata2_write32(szedata2_read32(&obuf->obuf_en) & ~0x1,
- &obuf->obuf_en);
-}
-
-#endif /* _SZEDATA2_IOBUF_H_ */
git.droids-corp.org / dpdk.git / commitdiff
