net/ice/base: whitelist register for NVM access
authorQi Zhang <qi.z.zhang@intel.com>
Mon, 6 Jan 2020 03:38:40 +0000 (11:38 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 17 Jan 2020 18:46:01 +0000 (19:46 +0100)
Allow tools to access register offset 0xB8188 (GLGEN_RSTAT) for
NVMUpdate operations.  This is a read-only register, so risk of other
issues stemming from this change is low. Even so, update the write
command to prevent and reject any commands which attempt to write to
this register, just like we do for GL_HICR_EN.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

No differences found