From: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Date: Tue, 17 Apr 2018 20:04:58 +0000 (+0530)
Subject: net/axgbe: fix incorrect cache alignment macro
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;ds=inline;h=23738dadf37b375f2fc6faf039ec75448b522120;p=dpdk.git

net/axgbe: fix incorrect cache alignment macro

Due to missing ____cacheline_aligned definition compiler treats it as a
global variable replace it with proper cache alignment macro.

Fixes: 9e890103267e ("net/axgbe: add Rx/Tx setup")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
---

diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index 1ec6c2ca6f..917da58ce4 100644
--- a/drivers/net/axgbe/axgbe_rxtx.h
+++ b/drivers/net/axgbe/axgbe_rxtx.h
@@ -94,7 +94,7 @@ struct axgbe_rx_queue {
 	/* Number of mbufs allocated from pool*/
 	uint64_t mbuf_alloc;
 
-} ____cacheline_aligned;
+} __rte_cache_aligned;
 
 /*Tx descriptor format */
 struct axgbe_tx_desc {