From: Andy Moreton <amoreton@solarflare.com>
Date: Tue, 20 Feb 2018 07:34:15 +0000 (+0000)
Subject: net/sfc/base: move vector config to ef10 NIC board config
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=01a22b15b4cbcc65552ff5ba88ea2d8905bbb7ab;p=dpdk.git

net/sfc/base: move vector config to ef10 NIC board config

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---

diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 974e7c00de..e37a2acb80 100644
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -1551,6 +1551,7 @@ ef10_nic_board_cfg(
 	ef10_link_state_t els;
 	efx_port_t *epp = &(enp->en_port);
 	uint32_t board_type = 0;
+	uint32_t base, nvec;
 	uint32_t port;
 	uint32_t pf;
 	uint32_t vf;
@@ -1667,13 +1668,27 @@ ef10_nic_board_cfg(
 
 	encp->enc_buftbl_limit = 0xFFFFFFFF;
 
+	/* Get interrupt vector limits */
+	if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
+		if (EFX_PCI_FUNCTION_IS_PF(encp))
+			goto fail9;
+
+		/* Ignore error (cannot query vector limits from a VF). */
+		base = 0;
+		nvec = 1024;
+	}
+	encp->enc_intr_vec_base = base;
+	encp->enc_intr_limit = nvec;
+
 	/* Get remaining controller-specific board config */
 	if ((rc = enop->eno_board_cfg(enp)) != 0)
 		if (rc != EACCES)
-			goto fail9;
+			goto fail10;
 
 	return (0);
 
+fail10:
+	EFSYS_PROBE(fail10);
 fail9:
 	EFSYS_PROBE(fail9);
 fail8:
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index 3c1f44a597..b19b41e3b7 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -81,7 +81,6 @@ hunt_board_cfg(
 	uint32_t mask;
 	uint32_t flags;
 	uint32_t sysclk, dpcpu_clk;
-	uint32_t base, nvec;
 	uint32_t bandwidth;
 	efx_rc_t rc;
 
@@ -226,20 +225,8 @@ hunt_board_cfg(
 		goto fail5;
 	encp->enc_privilege_mask = mask;
 
-	/* Get interrupt vector limits */
-	if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
-		if (EFX_PCI_FUNCTION_IS_PF(encp))
-			goto fail6;
-
-		/* Ignore error (cannot query vector limits from a VF). */
-		base = 0;
-		nvec = 1024;
-	}
-	encp->enc_intr_vec_base = base;
-	encp->enc_intr_limit = nvec;
-
 	if ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)
-		goto fail7;
+		goto fail6;
 	encp->enc_required_pcie_bandwidth_mbps = bandwidth;
 
 	/* All Huntington devices have a PCIe Gen3, 8 lane connector */
@@ -247,8 +234,6 @@ hunt_board_cfg(
 
 	return (0);
 
-fail7:
-	EFSYS_PROBE(fail7);
 fail6:
 	EFSYS_PROBE(fail6);
 fail5:
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index cd072e4e26..85431d2fbd 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -51,7 +51,6 @@ medford2_board_cfg(
 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 	uint32_t mask;
 	uint32_t sysclk, dpcpu_clk;
-	uint32_t base, nvec;
 	uint32_t end_padding;
 	uint32_t bandwidth;
 	uint32_t vi_window_shift;
@@ -159,18 +158,6 @@ medford2_board_cfg(
 		goto fail5;
 	encp->enc_privilege_mask = mask;
 
-	/* Get interrupt vector limits */
-	if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
-		if (EFX_PCI_FUNCTION_IS_PF(encp))
-			goto fail6;
-
-		/* Ignore error (cannot query vector limits from a VF). */
-		base = 0;
-		nvec = 1024;
-	}
-	encp->enc_intr_vec_base = base;
-	encp->enc_intr_limit = nvec;
-
 	/*
 	 * Medford2 stores a single global copy of VPD, not per-PF as on
 	 * Huntington.
@@ -179,14 +166,12 @@ medford2_board_cfg(
 
 	rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
 	if (rc != 0)
-		goto fail7;
+		goto fail6;
 	encp->enc_required_pcie_bandwidth_mbps = bandwidth;
 	encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
 
 	return (0);
 
-fail7:
-	EFSYS_PROBE(fail7);
 fail6:
 	EFSYS_PROBE(fail6);
 fail5:
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index 9d6989bc44..daa1478ce8 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -49,7 +49,6 @@ medford_board_cfg(
 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 	uint32_t mask;
 	uint32_t sysclk, dpcpu_clk;
-	uint32_t base, nvec;
 	uint32_t end_padding;
 	uint32_t bandwidth;
 	efx_rc_t rc;
@@ -158,18 +157,6 @@ medford_board_cfg(
 		goto fail4;
 	encp->enc_privilege_mask = mask;
 
-	/* Get interrupt vector limits */
-	if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
-		if (EFX_PCI_FUNCTION_IS_PF(encp))
-			goto fail5;
-
-		/* Ignore error (cannot query vector limits from a VF). */
-		base = 0;
-		nvec = 1024;
-	}
-	encp->enc_intr_vec_base = base;
-	encp->enc_intr_limit = nvec;
-
 	/*
 	 * Medford stores a single global copy of VPD, not per-PF as on
 	 * Huntington.
@@ -178,14 +165,12 @@ medford_board_cfg(
 
 	rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth);
 	if (rc != 0)
-		goto fail6;
+		goto fail5;
 	encp->enc_required_pcie_bandwidth_mbps = bandwidth;
 	encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
 
 	return (0);
 
-fail6:
-	EFSYS_PROBE(fail6);
 fail5:
 	EFSYS_PROBE(fail5);
 fail4: