From: Tomasz Duszynski <tduszynski@marvell.com>
Date: Mon, 21 Jun 2021 15:04:18 +0000 (+0200)
Subject: common/cnxk: add BPHY CGX/RPM initialization and cleanup
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=0399ff9d2b139a3a76312c97500c5b0f6597e9bf;p=dpdk.git

common/cnxk: add BPHY CGX/RPM initialization and cleanup

Add support for low level initialization and cleanup of baseband
PHY CGX/RPM blocks.

Initialization and cleanup are related hence are in the same patch.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
---

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 178bce7ab8..59975fd343 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -11,6 +11,7 @@ endif
 config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'
 deps = ['eal', 'pci', 'bus_pci', 'mbuf']
 sources = files(
+        'roc_bphy_cgx.c',
         'roc_dev.c',
         'roc_idev.c',
         'roc_irq.c',
diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h
index 67f5d13f05..256d8c68dc 100644
--- a/drivers/common/cnxk/roc_api.h
+++ b/drivers/common/cnxk/roc_api.h
@@ -100,4 +100,7 @@
 /* Idev */
 #include "roc_idev.h"
 
+/* Baseband phy cgx */
+#include "roc_bphy_cgx.h"
+
 #endif /* _ROC_API_H_ */
diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
new file mode 100644
index 0000000000..029d4102ee
--- /dev/null
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "roc_api.h"
+
+/*
+ * CN10K stores number of lmacs in 4 bit filed
+ * in contraty to CN9K which uses only 3 bits.
+ *
+ * In theory masks should differ yet on CN9K
+ * bits beyond specified range contain zeros.
+ *
+ * Hence common longer mask may be used.
+ */
+#define CGX_CMRX_RX_LMACS	0x128
+#define CGX_CMRX_RX_LMACS_LMACS GENMASK_ULL(3, 0)
+
+static uint64_t
+roc_bphy_cgx_read(struct roc_bphy_cgx *roc_cgx, uint64_t lmac, uint64_t offset)
+{
+	int shift = roc_model_is_cn10k() ? 20 : 18;
+	uint64_t base = (uint64_t)roc_cgx->bar0_va;
+
+	return plt_read64(base + (lmac << shift) + offset);
+}
+
+static unsigned int
+roc_bphy_cgx_dev_id(struct roc_bphy_cgx *roc_cgx)
+{
+	uint64_t cgx_id = roc_model_is_cn10k() ? GENMASK_ULL(26, 24) :
+						 GENMASK_ULL(25, 24);
+
+	return FIELD_GET(cgx_id, roc_cgx->bar0_pa);
+}
+
+int
+roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx)
+{
+	uint64_t val;
+
+	if (!roc_cgx || !roc_cgx->bar0_va || !roc_cgx->bar0_pa)
+		return -EINVAL;
+
+	val = roc_bphy_cgx_read(roc_cgx, 0, CGX_CMRX_RX_LMACS);
+	val = FIELD_GET(CGX_CMRX_RX_LMACS_LMACS, val);
+	if (roc_model_is_cn9k())
+		val = GENMASK_ULL(val - 1, 0);
+	roc_cgx->lmac_bmap = val;
+	roc_cgx->id = roc_bphy_cgx_dev_id(roc_cgx);
+
+	return 0;
+}
+
+int
+roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx)
+{
+	if (!roc_cgx)
+		return -EINVAL;
+
+	return 0;
+}
diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h
new file mode 100644
index 0000000000..aac2c262cf
--- /dev/null
+++ b/drivers/common/cnxk/roc_bphy_cgx.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef _ROC_BPHY_CGX_H_
+#define _ROC_BPHY_CGX_H_
+
+#include "roc_api.h"
+
+struct roc_bphy_cgx {
+	uint64_t bar0_pa;
+	void *bar0_va;
+	uint64_t lmac_bmap;
+	unsigned int id;
+} __plt_cache_aligned;
+
+__roc_api int roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx);
+__roc_api int roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx);
+
+#endif /* _ROC_BPHY_CGX_H_ */
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 8e67c83a62..1db4d104af 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -9,6 +9,8 @@ INTERNAL {
 	cnxk_logtype_sso;
 	cnxk_logtype_tim;
 	cnxk_logtype_tm;
+	roc_bphy_cgx_dev_fini;
+	roc_bphy_cgx_dev_init;
 	roc_clk_freq_get;
 	roc_error_msg_get;
 	roc_idev_lmt_base_addr_get;