From: Sunil Kumar Kori <skori@marvell.com>
Date: Wed, 23 Jun 2021 04:46:59 +0000 (+0530)
Subject: net/cnxk: support clock read
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=3199a7f6a38cbe0c9a362b29dbf2679970f11c3a;p=dpdk.git

net/cnxk: support clock read

Patch implements read raw clock operation for cn9k and
cn10k.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---

diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini
index 9ef9c77a30..b1564221cc 100644
--- a/doc/guides/nics/features/cnxk.ini
+++ b/doc/guides/nics/features/cnxk.ini
@@ -32,6 +32,8 @@ L4 checksum offload  = Y
 Inner L3 checksum    = Y
 Inner L4 checksum    = Y
 Packet type parsing  = Y
+Timesync             = Y
+Timestamp offload    = Y
 Basic stats          = Y
 Stats per queue      = Y
 Extended stats       = Y
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index c8bbb7a831..b2a8f3a744 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -1265,6 +1265,7 @@ struct eth_dev_ops cnxk_eth_dev_ops = {
 	.timesync_read_time = cnxk_nix_timesync_read_time,
 	.timesync_write_time = cnxk_nix_timesync_write_time,
 	.timesync_adjust_time = cnxk_nix_timesync_adjust_time,
+	.read_clock = cnxk_nix_read_clock,
 };
 
 static int
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 4214365f8d..fa6f16f733 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -323,6 +323,7 @@ int cnxk_nix_timesync_write_time(struct rte_eth_dev *eth_dev,
 				 const struct timespec *ts);
 int cnxk_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta);
 int cnxk_nix_tsc_convert(struct cnxk_eth_dev *dev);
+int cnxk_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *clock);
 
 uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);
 
diff --git a/drivers/net/cnxk/cnxk_ptp.c b/drivers/net/cnxk/cnxk_ptp.c
index 52f6eb1442..449489f599 100644
--- a/drivers/net/cnxk/cnxk_ptp.c
+++ b/drivers/net/cnxk/cnxk_ptp.c
@@ -4,6 +4,23 @@
 
 #include "cnxk_ethdev.h"
 
+int
+cnxk_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *clock)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+
+	/* This API returns the raw PTP HI clock value. Since LFs do not
+	 * have direct access to PTP registers and it requires mbox msg
+	 * to AF for this value. In fastpath reading this value for every
+	 * packet (which involes mbox call) becomes very expensive, hence
+	 * we should be able to derive PTP HI clock value from tsc by
+	 * using freq_mult and clk_delta calculated during configure stage.
+	 */
+	*clock = (rte_get_tsc_cycles() + dev->clk_delta) * dev->clk_freq_mult;
+
+	return 0;
+}
+
 /* This function calculates two parameters "clk_freq_mult" and
  * "clk_delta" which is useful in deriving PTP HI clock from
  * timestamp counter (tsc) value.