From: Konstantin Ananyev <konstantin.ananyev@intel.com>
Date: Mon, 3 Aug 2015 17:59:41 +0000 (+0100)
Subject: ixgbe: fix Rx with buffer address not word aligned
X-Git-Tag: spdx-start~8559
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=33dd07136f14f81df2760be57a61df521b1e4c84;p=dpdk.git

ixgbe: fix Rx with buffer address not word aligned

Niantic HW expects Header Buffer Address in the RXD to be word aligned.
So, if mbuf's buf_physaddr is not word aligned then
RX path will not work properly.
Right now, in ixgbe PMD we always setup Packet Buffer Address(PBA) and
Header Buffer Address (HBA) to the same value:
buf_physaddr + RTE_PKTMBUF_HEADROOM.
As ixgbe PMD doesn't support split header feature anyway,
the issue can be fixed just by always setting HBA in the RXD to zero.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---

diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 3f808b34a3..91023b9afe 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1193,7 +1193,7 @@ ixgbe_rx_alloc_bufs(struct ixgbe_rx_queue *rxq, bool reset_mbuf)
 
 		/* populate the descriptors */
 		dma_addr = rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb));
-		rxdp[i].read.hdr_addr = dma_addr;
+		rxdp[i].read.hdr_addr = 0;
 		rxdp[i].read.pkt_addr = dma_addr;
 	}
 
@@ -1424,7 +1424,7 @@ ixgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 		rxe->mbuf = nmb;
 		dma_addr =
 			rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));
-		rxdp->read.hdr_addr = dma_addr;
+		rxdp->read.hdr_addr = 0;
 		rxdp->read.pkt_addr = dma_addr;
 
 		/*
@@ -1753,7 +1753,7 @@ next_desc:
 			rxe->mbuf = nmb;
 
 			rxm->data_off = RTE_PKTMBUF_HEADROOM;
-			rxdp->read.hdr_addr = dma;
+			rxdp->read.hdr_addr = 0;
 			rxdp->read.pkt_addr = dma;
 		} else
 			rxe->mbuf = NULL;
@@ -3666,7 +3666,7 @@ ixgbe_alloc_rx_queue_mbufs(struct ixgbe_rx_queue *rxq)
 		dma_addr =
 			rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf));
 		rxd = &rxq->rx_ring[i];
-		rxd->read.hdr_addr = dma_addr;
+		rxd->read.hdr_addr = 0;
 		rxd->read.pkt_addr = dma_addr;
 		rxe[i].mbuf = mbuf;
 	}
diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
index 4923c7007f..cf25a53fcf 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
@@ -56,6 +56,8 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq)
 			RTE_PKTMBUF_HEADROOM);
 	__m128i dma_addr0, dma_addr1;
 
+	const __m128i hba_msk = _mm_set_epi64x(0, UINT64_MAX);
+
 	rxdp = rxq->rx_ring + rxq->rxrearm_start;
 
 	/* Pull 'n' more MBUFs into the software ring */
@@ -108,6 +110,10 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq)
 		dma_addr0 = _mm_add_epi64(dma_addr0, hdr_room);
 		dma_addr1 = _mm_add_epi64(dma_addr1, hdr_room);
 
+		/* set Header Buffer Address to zero */
+		dma_addr0 =  _mm_and_si128(dma_addr0, hba_msk);
+		dma_addr1 =  _mm_and_si128(dma_addr1, hba_msk);
+
 		/* flush desc with pa dma_addr */
 		_mm_store_si128((__m128i *)&rxdp++->read, dma_addr0);
 		_mm_store_si128((__m128i *)&rxdp++->read, dma_addr1);