From: Xuelin Shi <xuelin.shi@freescale.com>
Date: Thu, 12 Feb 2015 01:19:50 +0000 (+0800)
Subject: ixgbe: fix big endian access
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=3658eb95fe65bf42bdfb80b0a7ecd1e4d484bf5f;p=dpdk.git

ixgbe: fix big endian access

ixgbe is little endian, but cpu maybe not.
add necessary conversions.
    rte_cpu_to_le_32(...) for PCI write
    rte_le_to_cpu_32(...) for PCI read.

Signed-off-by: Xuelin Shi <xuelin.shi@freescale.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
---

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h
index 2d40bfdc26..f8bfb3fac5 100644
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_osdep.h
@@ -119,11 +119,11 @@ typedef int		bool;
 
 static inline uint32_t ixgbe_read_addr(volatile void* addr)
 {
-	return IXGBE_PCI_REG(addr);
+	return rte_le_to_cpu_32(IXGBE_PCI_REG(addr));
 }
 
 #define IXGBE_PCI_REG_WRITE(reg, value) do { \
-	IXGBE_PCI_REG((reg)) = (value); \
+	IXGBE_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \
 } while(0)
 
 #define IXGBE_PCI_REG_ADDR(hw, reg) \