From: Olga Shern Date: Thu, 17 Mar 2016 15:38:57 +0000 (+0100) Subject: mlx5: support HW packet padding X-Git-Tag: spdx-start~7202 X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=4d803a7246140555f91f9480261322880515ca28;p=dpdk.git mlx5: support HW packet padding Environment variable MLX5_PMD_ENABLE_PADDING enables HW packet padding in PCI bus transactions. When packet size is cache aligned and CRC stripping is enabled, 4 fewer bytes are written to the PCI bus. Enabling padding makes such packets aligned again. In cases where PCI bandwidth is the bottleneck, padding can improve performance by 10%. This is disabled by default since this can also decrease performance for unaligned packet sizes. Signed-off-by: Olga Shern fix packet padding macro check Signed-off-by: Adrien Mazarguil --- diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 2573bb4111..ee967706c3 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -151,6 +151,20 @@ Environment variables lower performance when there is no backpressure, it is not enabled by default. +- ``MLX5_PMD_ENABLE_PADDING`` + + Enables HW packet padding in PCI bus transactions. + + When packet size is cache aligned and CRC stripping is enabled, 4 fewer + bytes are written to the PCI bus. Enabling padding makes such packets + aligned again. + + In cases where PCI bandwidth is the bottleneck, padding can improve + performance by 10%. + + This is disabled by default since this can also decrease performance for + unaligned packet sizes. + Run-time configuration ~~~~~~~~~~~~~~~~~~~~~~ diff --git a/doc/guides/rel_notes/release_16_04.rst b/doc/guides/rel_notes/release_16_04.rst index 37e6407ec8..189b0ee18d 100644 --- a/doc/guides/rel_notes/release_16_04.rst +++ b/doc/guides/rel_notes/release_16_04.rst @@ -223,6 +223,13 @@ This section should contain new features added in this release. Sample format: Only available with Mellanox OFED >= 3.2. +* **Added mlx5 optional packet padding by HW.** + + Added an option to make PCI bus transactions rounded to multiple of a + cache line size for better alignment. + + Only available with Mellanox OFED >= 3.2. + * **Changed szedata2 type of driver from vdev to pdev.** Previously szedata2 device had to be added by ``--vdev`` option. diff --git a/drivers/net/mlx5/Makefile b/drivers/net/mlx5/Makefile index 0b749912dc..c1bc427397 100644 --- a/drivers/net/mlx5/Makefile +++ b/drivers/net/mlx5/Makefile @@ -136,6 +136,11 @@ mlx5_autoconf.h: $(RTE_SDK)/scripts/auto-config-h.sh infiniband/verbs.h \ enum IBV_EXP_CREATE_WQ_FLAG_SCATTER_FCS \ $(AUTOCONF_OUTPUT) + $Q sh -- '$<' '$@' \ + HAVE_VERBS_RX_END_PADDING \ + infiniband/verbs.h \ + enum IBV_EXP_CREATE_WQ_FLAG_RX_END_PADDING \ + $(AUTOCONF_OUTPUT) $(SRCS-$(CONFIG_RTE_LIBRTE_MLX5_PMD):.c=.o): mlx5_autoconf.h diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 02ff3626b6..5dc9f26f8f 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -67,6 +67,25 @@ #include "mlx5_autoconf.h" #include "mlx5_defs.h" +/** + * Retrieve integer value from environment variable. + * + * @param[in] name + * Environment variable name. + * + * @return + * Integer value, 0 if the variable is not set. + */ +int +mlx5_getenv_int(const char *name) +{ + const char *val = getenv(name); + + if (val == NULL) + return 0; + return atoi(val); +} + /** * DPDK callback to close the device. * @@ -333,6 +352,9 @@ mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS | #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */ +#ifdef HAVE_VERBS_RX_END_PADDING + IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN | +#endif /* HAVE_VERBS_RX_END_PADDING */ 0; #endif /* HAVE_EXP_QUERY_DEVICE */ @@ -425,6 +447,12 @@ mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) DEBUG("FCS stripping configuration is %ssupported", (priv->hw_fcs_strip ? "" : "not ")); +#ifdef HAVE_VERBS_RX_END_PADDING + priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align; +#endif /* HAVE_VERBS_RX_END_PADDING */ + DEBUG("hardware RX end alignment padding is %ssupported", + (priv->hw_padding ? "" : "not ")); + #else /* HAVE_EXP_QUERY_DEVICE */ priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE; #endif /* HAVE_EXP_QUERY_DEVICE */ diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 399f88558a..0a13272fbd 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -104,6 +104,7 @@ struct priv { unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */ unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */ unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */ + unsigned int hw_padding:1; /* End alignment padding is supported. */ unsigned int vf:1; /* This is a VF device. */ unsigned int pending_alarm:1; /* An alarm is pending. */ /* RX/TX queues. */ @@ -160,6 +161,10 @@ priv_unlock(struct priv *priv) rte_spinlock_unlock(&priv->lock); } +/* mlx5.c */ + +int mlx5_getenv_int(const char *); + /* mlx5_ethdev.c */ struct priv *mlx5_get_priv(struct rte_eth_dev *dev); diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 19a1119199..c8af77f477 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1282,6 +1282,21 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc, tmpl.crc_present << 2); #endif /* HAVE_VERBS_FCS */ +#ifdef HAVE_VERBS_RX_END_PADDING + if (!mlx5_getenv_int("MLX5_PMD_ENABLE_PADDING")) + ; /* Nothing else to do. */ + else if (priv->hw_padding) { + INFO("%p: enabling packet padding on queue %p", + (void *)dev, (void *)rxq); + attr.wq.flags |= IBV_EXP_CREATE_WQ_FLAG_RX_END_PADDING; + attr.wq.comp_mask |= IBV_EXP_CREATE_WQ_FLAGS; + } else + WARN("%p: packet padding has been requested but is not" + " supported, make sure MLNX_OFED and firmware are" + " up to date", + (void *)dev); +#endif /* HAVE_VERBS_RX_END_PADDING */ + tmpl.wq = ibv_exp_create_wq(priv->ctx, &attr.wq); if (tmpl.wq == NULL) { ret = (errno ? errno : EINVAL);