From: Bruce Richardson Date: Fri, 28 Apr 2017 13:10:14 +0000 (+0100) Subject: mbuf: fix 64-bit address alignment in 32-bit builds X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=586ec205bcbbb0a0aeecdfbc1b94741b98b04b09;p=dpdk.git mbuf: fix 64-bit address alignment in 32-bit builds On i686 builds, the uin64_t type is 64-bits in size but is aligned to 32-bits only. This causes mbuf fields for rearm_data to not be 16-byte aligned on 32-bit builds, which causes errors with some vector PMDs which expect the rearm data to be aligned as on 64-bit. Given that we cannot use the extra space in the data structures anyway, as it's already used on 64-bit builds, we can just force alignment of the physical address in the mbuf to 8-bytes in all cases. This has no effect on 64-bit systems, but fixes the updated PMDs on 32-bit. Fixes: f4356d7ca168 ("net/i40e: eliminate mbuf write on rearm") Fixes: f160666a1073 ("net/ixgbe: eliminate mbuf write on rearm") Signed-off-by: Bruce Richardson --- diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h index 9dd8e807e2..466ec0033e 100644 --- a/lib/librte_mbuf/rte_mbuf.h +++ b/lib/librte_mbuf/rte_mbuf.h @@ -403,7 +403,13 @@ struct rte_mbuf { MARKER cacheline0; void *buf_addr; /**< Virtual address of segment buffer. */ - phys_addr_t buf_physaddr; /**< Physical address of segment buffer. */ + /** + * Physical address of segment buffer. + * Force alignment to 8-bytes, so as to ensure we have the exact + * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes + * working on vector drivers easier. + */ + phys_addr_t buf_physaddr __rte_aligned(sizeof(phys_addr_t)); /* next 8 bytes are initialised on RX descriptor rearm */ MARKER64 rearm_data;