From: Jasvinder Singh <jasvinder.singh@intel.com>
Date: Sun, 12 Jun 2016 12:42:47 +0000 (+0100)
Subject: examples/ip_pipeline: fix false cacheline sharing among threads
X-Git-Tag: spdx-start~6756
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=5f0c5de435b391eaf7a5c362213e91f2c795c4a2;p=dpdk.git

examples/ip_pipeline: fix false cacheline sharing among threads

In ip_pipeline app, the structure app_thread_data needs to be aligned to
the cache line boundary as threads on different cpu cores are accessing
fields of the app->thread_data and having this structure not aligned on
cacheline boundary leads to false cacheline sharing.

Fixes: 7f64b9c004aa ("examples/ip_pipeline: rework config file syntax")

Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---

diff --git a/examples/ip_pipeline/app.h b/examples/ip_pipeline/app.h
index 848244a66d..761134135c 100644
--- a/examples/ip_pipeline/app.h
+++ b/examples/ip_pipeline/app.h
@@ -300,7 +300,7 @@ struct app_thread_data {
 	uint64_t headroom_time;
 	uint64_t headroom_cycles;
 	double headroom_ratio;
-};
+} __rte_cache_aligned;
 
 #ifndef APP_MAX_LINKS
 #define APP_MAX_LINKS                            16