From: Arek Kusztal Date: Mon, 28 Jun 2021 16:34:24 +0000 (+0100) Subject: crypto/qat: support legacy GCM and CCM X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=6599d0931488671f34b2aefbb29f5d869ff49e3a;p=dpdk.git crypto/qat: support legacy GCM and CCM Add AES-GCM, AES-CCM algorithms in legacy mode. Signed-off-by: Arek Kusztal Acked-by: Fan Zhang Acked-by: Akhil Goyal --- diff --git a/drivers/crypto/qat/qat_sym_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h index aca528b991..fc8e667687 100644 --- a/drivers/crypto/qat/qat_sym_capabilities.h +++ b/drivers/crypto/qat/qat_sym_capabilities.h @@ -1084,6 +1084,66 @@ } \ }, } \ }, } \ + }, \ + { /* AES GCM */ \ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, \ + {.sym = { \ + .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD, \ + {.aead = { \ + .algo = RTE_CRYPTO_AEAD_AES_GCM, \ + .block_size = 16, \ + .key_size = { \ + .min = 16, \ + .max = 32, \ + .increment = 8 \ + }, \ + .digest_size = { \ + .min = 8, \ + .max = 16, \ + .increment = 4 \ + }, \ + .aad_size = { \ + .min = 0, \ + .max = 240, \ + .increment = 1 \ + }, \ + .iv_size = { \ + .min = 0, \ + .max = 12, \ + .increment = 12 \ + }, \ + }, } \ + }, } \ + }, \ + { /* AES CCM */ \ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, \ + {.sym = { \ + .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD, \ + {.aead = { \ + .algo = RTE_CRYPTO_AEAD_AES_CCM, \ + .block_size = 16, \ + .key_size = { \ + .min = 16, \ + .max = 16, \ + .increment = 0 \ + }, \ + .digest_size = { \ + .min = 4, \ + .max = 16, \ + .increment = 2 \ + }, \ + .aad_size = { \ + .min = 0, \ + .max = 224, \ + .increment = 1 \ + }, \ + .iv_size = { \ + .min = 7, \ + .max = 13, \ + .increment = 1 \ + }, \ + }, } \ + }, } \ } \ diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c index 5d8599b0e5..86e2f2641a 100644 --- a/drivers/crypto/qat/qat_sym_session.c +++ b/drivers/crypto/qat/qat_sym_session.c @@ -287,13 +287,8 @@ qat_sym_session_configure_cipher(struct rte_cryptodev *dev, goto error_out; } session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE; - if (qat_dev_gen == QAT_GEN4) { - /* TODO: Filter WCP */ - ICP_QAT_FW_LA_SLICE_TYPE_SET( - session->fw_req.comn_hdr.serv_specif_flags, - ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE); + if (qat_dev_gen == QAT_GEN4) session->is_ucs = 1; - } break; case RTE_CRYPTO_CIPHER_SNOW3G_UEA2: if (qat_sym_validate_snow3g_key(cipher_xform->key.length, @@ -918,14 +913,15 @@ qat_sym_session_configure_aead(struct rte_cryptodev *dev, } session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE; session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128; - if (qat_dev_gen > QAT_GEN2 && aead_xform->iv.length == + if (qat_dev_gen == QAT_GEN3 && aead_xform->iv.length == QAT_AES_GCM_SPC_IV_SIZE) { return qat_sym_session_handle_single_pass(session, aead_xform); } if (session->cipher_iv.length == 0) session->cipher_iv.length = AES_GCM_J0_LEN; - + if (qat_dev_gen == QAT_GEN4) + session->is_ucs = 1; break; case RTE_CRYPTO_AEAD_AES_CCM: if (qat_sym_validate_aes_key(aead_xform->key.length, @@ -935,6 +931,8 @@ qat_sym_session_configure_aead(struct rte_cryptodev *dev, } session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE; session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC; + if (qat_dev_gen == QAT_GEN4) + session->is_ucs = 1; break; case RTE_CRYPTO_AEAD_CHACHA20_POLY1305: if (aead_xform->key.length != ICP_QAT_HW_CHACHAPOLY_KEY_SZ) @@ -1472,7 +1470,8 @@ static int qat_sym_do_precomputes(enum icp_qat_hw_auth_algo hash_alg, } static void -qat_sym_session_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header, +qat_sym_session_init_common_hdr(struct qat_sym_session *session, + struct icp_qat_fw_comn_req_hdr *header, enum qat_sym_proto_flag proto_flags) { header->hdr_flags = @@ -1513,6 +1512,12 @@ qat_sym_session_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header, ICP_QAT_FW_LA_NO_UPDATE_STATE); ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(header->serv_specif_flags, ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER); + + if (session->is_ucs) { + ICP_QAT_FW_LA_SLICE_TYPE_SET( + session->fw_req.comn_hdr.serv_specif_flags, + ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE); + } } /* @@ -1642,7 +1647,7 @@ int qat_sym_cd_cipher_set(struct qat_sym_session *cdesc, cipher_cd_ctrl->cipher_cfg_offset = cipher_offset >> 3; header->service_cmd_id = cdesc->qat_cmd; - qat_sym_session_init_common_hdr(header, qat_proto_flag); + qat_sym_session_init_common_hdr(cdesc, header, qat_proto_flag); cipher = (struct icp_qat_hw_cipher_algo_blk *)cdesc->cd_cur_ptr; cipher20 = (struct icp_qat_hw_cipher_algo_blk20 *)cdesc->cd_cur_ptr; @@ -2035,7 +2040,7 @@ int qat_sym_cd_auth_set(struct qat_sym_session *cdesc, } /* Request template setup */ - qat_sym_session_init_common_hdr(header, qat_proto_flag); + qat_sym_session_init_common_hdr(cdesc, header, qat_proto_flag); header->service_cmd_id = cdesc->qat_cmd; /* Auth CD config setup */ diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h index 5d28e5a089..e003a34f7f 100644 --- a/drivers/crypto/qat/qat_sym_session.h +++ b/drivers/crypto/qat/qat_sym_session.h @@ -128,7 +128,8 @@ unsigned int qat_sym_session_get_private_size(struct rte_cryptodev *dev); void -qat_sym_sesssion_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header, +qat_sym_sesssion_init_common_hdr(struct qat_sym_session *session, + struct icp_qat_fw_comn_req_hdr *header, enum qat_sym_proto_flag proto_flags); int qat_sym_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);