From: Rasesh Mody Date: Mon, 23 Jan 2017 05:02:38 +0000 (-0800) Subject: net/qede/base: fix FreeBSD build X-Git-Tag: spdx-start~4611 X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=679fe2e4262add3e92a043b7fe6e738c7339394b;p=dpdk.git net/qede/base: fix FreeBSD build This patch addresses compilation errors on FreeBSD with clang 3.8.0. drivers/net/qede/base/ecore_cxt.c:1257:2: error: shifting a negative signed value is undefined SET_FIELD(cdu_params, CDUC_NCIB, elems_per_page); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/net/qede/base/ecore.h:82:27: note: expanded from macro 'SET_FIELD' (value) &= ~(name##_MASK << name##_SHIFT); ~~~~~~~~~~~ ^ Fixes: ec94dbc57362 ("qede: add base driver") Cc: stable@dpdk.org Signed-off-by: Rasesh Mody Tested-by: Andrew Rybchenko --- diff --git a/drivers/net/qede/base/ecore_init_fw_funcs.c b/drivers/net/qede/base/ecore_init_fw_funcs.c index a5437b55c2..77f915267f 100644 --- a/drivers/net/qede/base/ecore_init_fw_funcs.c +++ b/drivers/net/qede/base/ecore_init_fw_funcs.c @@ -89,7 +89,7 @@ voq * (PBF_REG_YCMD_QS_NUM_LINES_VOQ1_RT_OFFSET \ #define QM_STOP_CMD_STRUCT_SIZE 2 #define QM_STOP_CMD_PAUSE_MASK_OFFSET 0 #define QM_STOP_CMD_PAUSE_MASK_SHIFT 0 -#define QM_STOP_CMD_PAUSE_MASK_MASK -1 +#define QM_STOP_CMD_PAUSE_MASK_MASK 0xffffffff /* @DPDK */ #define QM_STOP_CMD_GROUP_ID_OFFSET 1 #define QM_STOP_CMD_GROUP_ID_SHIFT 16 #define QM_STOP_CMD_GROUP_ID_MASK 15 diff --git a/drivers/net/qede/base/reg_addr.h b/drivers/net/qede/base/reg_addr.h index ab886716a3..3c369aa543 100644 --- a/drivers/net/qede/base/reg_addr.h +++ b/drivers/net/qede/base/reg_addr.h @@ -30,7 +30,7 @@ 24 #define CDU_REG_CID_ADDR_PARAMS_NCIB ( \ - 0xff << 24) + 0xffUL << 24) /* @DPDK */ #define XSDM_REG_OPERATION_GEN \ 0xf80408UL @@ -436,11 +436,11 @@ #define NIG_REG_LLH_FUNC_FILTER_VALUE 0x501a00UL #define XMAC_REG_CTRL_TX_EN (0x1 << 0) #define XMAC_REG_CTRL_RX_EN (0x1 << 1) -#define CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE (0xff << 24) +#define CDU_REG_SEGMENT0_PARAMS_T0_TID_SIZE (0xffUL << 24) /* @DPDK */ #define CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE (0xff << 16) #define CDU_REG_SEGMENT0_PARAMS_T0_TID_BLOCK_WASTE_SHIFT 16 #define CDU_REG_SEGMENT1_PARAMS_T1_TID_BLOCK_WASTE (0xff << 16) -#define CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE (0xff << 24) +#define CDU_REG_SEGMENT1_PARAMS_T1_TID_SIZE (0xffUL << 24) /* @DPDK */ #define CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK (0xfff << 0) #define CDU_REG_SEGMENT1_PARAMS_T1_NUM_TIDS_IN_BLOCK_SHIFT 0 #define CDU_REG_SEGMENT0_PARAMS_T0_NUM_TIDS_IN_BLOCK (0xfff << 0)