From: Maxime Coquelin Date: Tue, 26 Jan 2021 10:16:17 +0000 (+0100) Subject: net/virtio: make interrupt handling more generic X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=6a504290a7838a40223f8da3ab8144ff8f78c731;p=dpdk.git net/virtio: make interrupt handling more generic This patch aims at isolating MSIX notion into PCI layer. Signed-off-by: Maxime Coquelin Reviewed-by: David Marchand --- diff --git a/drivers/net/virtio/virtio.c b/drivers/net/virtio/virtio.c index ba3203e68b..7e1e77797f 100644 --- a/drivers/net/virtio/virtio.c +++ b/drivers/net/virtio/virtio.c @@ -63,3 +63,9 @@ virtio_get_status(struct virtio_hw *hw) { return VIRTIO_OPS(hw)->get_status(hw); } + +uint8_t +virtio_get_isr(struct virtio_hw *hw) +{ + return VIRTIO_OPS(hw)->get_isr(hw); +} diff --git a/drivers/net/virtio/virtio.h b/drivers/net/virtio/virtio.h index 0ac5328c57..a7629ad16b 100644 --- a/drivers/net/virtio/virtio.h +++ b/drivers/net/virtio/virtio.h @@ -124,6 +124,13 @@ #define VIRTIO_CONFIG_STATUS_DEV_NEED_RESET 0x40 #define VIRTIO_CONFIG_STATUS_FAILED 0x80 +/* The bit of the ISR which indicates a device has an interrupt. */ +#define VIRTIO_ISR_INTR 0x1 +/* The bit of the ISR which indicates a device configuration change. */ +#define VIRTIO_ISR_CONFIG 0x2 +/* Vector value used to disable MSI for queue. */ +#define VIRTIO_MSI_NO_VECTOR 0xFFFF + /* * This structure is just a reference to read net device specific * config space; it is just a shadow structure. @@ -168,7 +175,7 @@ struct virtio_hw { uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; uint32_t speed; /* link speed in MB */ uint8_t duplex; - uint8_t use_msix; + uint8_t intr_lsc; uint16_t max_mtu; /* * App management thread and virtio interrupt handler thread @@ -232,5 +239,5 @@ void virtio_write_dev_config(struct virtio_hw *hw, size_t offset, const void *sr void virtio_read_dev_config(struct virtio_hw *hw, size_t offset, void *dst, int length); void virtio_reset(struct virtio_hw *hw); void virtio_reinit_complete(struct virtio_hw *hw); - +uint8_t virtio_get_isr(struct virtio_hw *hw); #endif /* _VIRTIO_H_ */ diff --git a/drivers/net/virtio/virtio_ethdev.c b/drivers/net/virtio/virtio_ethdev.c index 9e99e6a9e3..d8c0435fc2 100644 --- a/drivers/net/virtio/virtio_ethdev.c +++ b/drivers/net/virtio/virtio_ethdev.c @@ -1455,13 +1455,13 @@ virtio_interrupt_handler(void *param) uint16_t status; /* Read interrupt status which clears interrupt */ - isr = vtpci_isr(hw); + isr = virtio_get_isr(hw); PMD_DRV_LOG(INFO, "interrupt status = %#x", isr); if (virtio_intr_unmask(dev) < 0) PMD_DRV_LOG(ERR, "interrupt enable failed"); - if (isr & VIRTIO_PCI_ISR_CONFIG) { + if (isr & VIRTIO_ISR_CONFIG) { if (virtio_dev_link_update(dev, 0) == 0) rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, @@ -1668,8 +1668,7 @@ virtio_init_device(struct rte_eth_dev *eth_dev, uint64_t req_features) hw->weak_barriers = !virtio_with_feature(hw, VIRTIO_F_ORDER_PLATFORM); /* If host does not support both status and MSI-X then disable LSC */ - if (virtio_with_feature(hw, VIRTIO_NET_F_STATUS) && - hw->use_msix != VIRTIO_MSIX_NONE) + if (virtio_with_feature(hw, VIRTIO_NET_F_STATUS) && hw->intr_lsc) eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; else eth_dev->data->dev_flags &= ~RTE_ETH_DEV_INTR_LSC; diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c index baadc79c43..905534ac72 100644 --- a/drivers/net/virtio/virtio_pci.c +++ b/drivers/net/virtio/virtio_pci.c @@ -28,8 +28,8 @@ * The remaining space is defined by each driver as the per-driver * configuration space. */ -#define VIRTIO_PCI_CONFIG(hw) \ - (((hw)->use_msix == VIRTIO_MSIX_ENABLED) ? 24 : 20) +#define VIRTIO_PCI_CONFIG(dev) \ + (((dev)->msix_status == VIRTIO_MSIX_ENABLED) ? 24 : 20) struct virtio_pci_internal { @@ -121,6 +121,7 @@ static void legacy_read_dev_config(struct virtio_hw *hw, size_t offset, void *dst, int length) { + struct virtio_pci_dev *dev = virtio_pci_get_dev(hw); #ifdef RTE_ARCH_PPC_64 int size; @@ -128,17 +129,17 @@ legacy_read_dev_config(struct virtio_hw *hw, size_t offset, if (length >= 4) { size = 4; rte_pci_ioport_read(VTPCI_IO(hw), dst, size, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); *(uint32_t *)dst = rte_be_to_cpu_32(*(uint32_t *)dst); } else if (length >= 2) { size = 2; rte_pci_ioport_read(VTPCI_IO(hw), dst, size, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); *(uint16_t *)dst = rte_be_to_cpu_16(*(uint16_t *)dst); } else { size = 1; rte_pci_ioport_read(VTPCI_IO(hw), dst, size, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); } dst = (char *)dst + size; @@ -147,7 +148,7 @@ legacy_read_dev_config(struct virtio_hw *hw, size_t offset, } #else rte_pci_ioport_read(VTPCI_IO(hw), dst, length, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); #endif } @@ -155,6 +156,7 @@ static void legacy_write_dev_config(struct virtio_hw *hw, size_t offset, const void *src, int length) { + struct virtio_pci_dev *dev = virtio_pci_get_dev(hw); #ifdef RTE_ARCH_PPC_64 union { uint32_t u32; @@ -167,16 +169,16 @@ legacy_write_dev_config(struct virtio_hw *hw, size_t offset, size = 4; tmp.u32 = rte_cpu_to_be_32(*(const uint32_t *)src); rte_pci_ioport_write(VTPCI_IO(hw), &tmp.u32, size, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); } else if (length >= 2) { size = 2; tmp.u16 = rte_cpu_to_be_16(*(const uint16_t *)src); rte_pci_ioport_write(VTPCI_IO(hw), &tmp.u16, size, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); } else { size = 1; rte_pci_ioport_write(VTPCI_IO(hw), src, size, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); } src = (const char *)src + size; @@ -185,7 +187,7 @@ legacy_write_dev_config(struct virtio_hw *hw, size_t offset, } #else rte_pci_ioport_write(VTPCI_IO(hw), src, length, - VIRTIO_PCI_CONFIG(hw) + offset); + VIRTIO_PCI_CONFIG(dev) + offset); #endif } @@ -311,7 +313,8 @@ legacy_intr_detect(struct virtio_hw *hw) { struct virtio_pci_dev *dev = virtio_pci_get_dev(hw); - hw->use_msix = vtpci_msix_detect(dev->pci_dev); + dev->msix_status = vtpci_msix_detect(dev->pci_dev); + hw->intr_lsc = !!dev->msix_status; } static int @@ -571,7 +574,8 @@ modern_intr_detect(struct virtio_hw *hw) { struct virtio_pci_dev *dev = virtio_pci_get_dev(hw); - hw->use_msix = vtpci_msix_detect(dev->pci_dev); + dev->msix_status = vtpci_msix_detect(dev->pci_dev); + hw->intr_lsc = !!dev->msix_status; } static int @@ -603,12 +607,6 @@ const struct virtio_ops modern_ops = { .dev_close = modern_dev_close, }; -uint8_t -vtpci_isr(struct virtio_hw *hw) -{ - return VIRTIO_OPS(hw)->get_isr(hw); -} - static void * get_cfg_addr(struct rte_pci_device *dev, struct virtio_pci_cap *cap) { @@ -691,9 +689,9 @@ virtio_read_caps(struct rte_pci_device *pci_dev, struct virtio_hw *hw) } if (flags & PCI_MSIX_ENABLE) - hw->use_msix = VIRTIO_MSIX_ENABLED; + dev->msix_status = VIRTIO_MSIX_ENABLED; else - hw->use_msix = VIRTIO_MSIX_DISABLED; + dev->msix_status = VIRTIO_MSIX_DISABLED; } if (cap.cap_vndr != PCI_CAP_ID_VNDR) { diff --git a/drivers/net/virtio/virtio_pci.h b/drivers/net/virtio/virtio_pci.h index b128277901..7d2f8aa495 100644 --- a/drivers/net/virtio/virtio_pci.h +++ b/drivers/net/virtio/virtio_pci.h @@ -42,13 +42,6 @@ struct virtnet_ctl; #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications (16, RW) */ -/* The bit of the ISR which indicates a device has an interrupt. */ -#define VIRTIO_PCI_ISR_INTR 0x1 -/* The bit of the ISR which indicates a device configuration change. */ -#define VIRTIO_PCI_ISR_CONFIG 0x2 -/* Vector value used to disable MSI for queue. */ -#define VIRTIO_MSI_NO_VECTOR 0xFFFF - /* Common configuration */ #define VIRTIO_PCI_CAP_COMMON_CFG 1 /* Notifications */ @@ -103,11 +96,18 @@ struct virtio_pci_common_cfg { uint32_t queue_used_hi; /* read-write */ }; +enum virtio_msix_status { + VIRTIO_MSIX_NONE = 0, + VIRTIO_MSIX_DISABLED = 1, + VIRTIO_MSIX_ENABLED = 2 +}; + struct virtio_pci_dev { struct virtio_hw hw; struct rte_pci_device *pci_dev; struct virtio_pci_common_cfg *common_cfg; struct virtio_net_config *dev_cfg; + enum virtio_msix_status msix_status; uint8_t *isr; uint16_t *notify_base; uint32_t notify_off_multiplier; @@ -125,20 +125,10 @@ struct virtio_pci_dev { /* The alignment to use between consumer and producer parts of vring. */ #define VIRTIO_PCI_VRING_ALIGN 4096 -enum virtio_msix_status { - VIRTIO_MSIX_NONE = 0, - VIRTIO_MSIX_DISABLED = 1, - VIRTIO_MSIX_ENABLED = 2 -}; - - /* * Function declaration from virtio_pci.c */ int vtpci_init(struct rte_pci_device *pci_dev, struct virtio_pci_dev *dev); - -uint8_t vtpci_isr(struct virtio_hw *); - void vtpci_legacy_ioport_unmap(struct virtio_hw *hw); int vtpci_legacy_ioport_map(struct virtio_hw *hw); diff --git a/drivers/net/virtio/virtio_user_ethdev.c b/drivers/net/virtio/virtio_user_ethdev.c index e25ada790e..add97746f2 100644 --- a/drivers/net/virtio/virtio_user_ethdev.c +++ b/drivers/net/virtio/virtio_user_ethdev.c @@ -339,7 +339,7 @@ virtio_user_get_isr(struct virtio_hw *hw __rte_unused) /* rxq interrupts and config interrupt are separated in virtio-user, * here we only report config change. */ - return VIRTIO_PCI_ISR_CONFIG; + return VIRTIO_ISR_CONFIG; } static uint16_t @@ -636,11 +636,8 @@ virtio_user_eth_dev_alloc(struct rte_vdev_device *vdev) hw->port_id = data->port_id; dev->port_id = data->port_id; VIRTIO_OPS(hw) = &virtio_user_ops; - /* - * MSIX is required to enable LSC (see virtio_init_device). - * Here just pretend that we support msix. - */ - hw->use_msix = 1; + + hw->intr_lsc = 1; hw->use_vec_rx = 0; hw->use_vec_tx = 0; hw->use_inorder_rx = 0;