From: Haiyue Wang <haiyue.wang@intel.com>
Date: Tue, 15 Oct 2019 07:51:31 +0000 (+0800)
Subject: net/i40e: support Rx/Tx burst mode info
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=6b6609f68ccd;p=dpdk.git

net/i40e: support Rx/Tx burst mode info

Retrieve burst mode options according to the selected Rx/Tx burst
function name.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
---

diff --git a/doc/guides/nics/features/i40e.ini b/doc/guides/nics/features/i40e.ini
index 980bcc5b28..e5ae6ded08 100644
--- a/doc/guides/nics/features/i40e.ini
+++ b/doc/guides/nics/features/i40e.ini
@@ -11,6 +11,7 @@ Rx interrupt         = Y
 Queue start/stop     = Y
 Runtime Rx queue setup = Y
 Runtime Tx queue setup = Y
+Burst mode info      = Y
 Jumbo frame          = Y
 Scattered Rx         = Y
 TSO                  = Y
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2ca14da3b1..77a46832ce 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -502,6 +502,8 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
 	.filter_ctrl                  = i40e_dev_filter_ctrl,
 	.rxq_info_get                 = i40e_rxq_info_get,
 	.txq_info_get                 = i40e_txq_info_get,
+	.rx_burst_mode_get            = i40e_rx_burst_mode_get,
+	.tx_burst_mode_get            = i40e_tx_burst_mode_get,
 	.mirror_rule_set              = i40e_mirror_rule_set,
 	.mirror_rule_reset            = i40e_mirror_rule_reset,
 	.timesync_enable              = i40e_timesync_enable,
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 261954b9a0..2ddaffbeb5 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -1209,6 +1209,10 @@ void i40e_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 	struct rte_eth_rxq_info *qinfo);
 void i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 	struct rte_eth_txq_info *qinfo);
+int i40e_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+			   struct rte_eth_burst_mode *mode);
+int i40e_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+			   struct rte_eth_burst_mode *mode);
 struct i40e_ethertype_filter *
 i40e_sw_ethertype_filter_lookup(struct i40e_ethertype_rule *ethertype_rule,
 			const struct i40e_ethertype_filter_input *input);
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index bfe161f2c5..09c01f67ce 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -3022,6 +3022,51 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
 	}
 }
 
+int
+i40e_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
+		       struct rte_eth_burst_mode *mode)
+{
+	eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
+	uint64_t options;
+
+	if (pkt_burst == i40e_recv_scattered_pkts)
+		options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
+	else if (pkt_burst == i40e_recv_pkts_bulk_alloc)
+		options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_BULK_ALLOC;
+	else if (pkt_burst == i40e_recv_pkts)
+		options = RTE_ETH_BURST_SCALAR;
+#ifdef RTE_ARCH_X86
+	else if (pkt_burst == i40e_recv_scattered_pkts_vec_avx2)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2 |
+			  RTE_ETH_BURST_SCATTERED;
+	else if (pkt_burst == i40e_recv_pkts_vec_avx2)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
+	else if (pkt_burst == i40e_recv_scattered_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE |
+			  RTE_ETH_BURST_SCATTERED;
+	else if (pkt_burst == i40e_recv_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
+#elif defined(RTE_ARCH_ARM64)
+	else if (pkt_burst == i40e_recv_scattered_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON |
+			  RTE_ETH_BURST_SCATTERED;
+	else if (pkt_burst == i40e_recv_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+#elif defined(RTE_ARCH_PPC_64)
+	else if (pkt_burst == i40e_recv_scattered_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC |
+			  RTE_ETH_BURST_SCATTERED;
+	else if (pkt_burst == i40e_recv_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC;
+#endif
+	else
+		options = 0;
+
+	mode->options = options;
+
+	return options != 0 ? 0 : -EINVAL;
+}
+
 void __attribute__((cold))
 i40e_set_tx_function_flag(struct rte_eth_dev *dev, struct i40e_tx_queue *txq)
 {
@@ -3115,6 +3160,37 @@ i40e_set_tx_function(struct rte_eth_dev *dev)
 	}
 }
 
+int
+i40e_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
+		       struct rte_eth_burst_mode *mode)
+{
+	eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
+	uint64_t options;
+
+	if (pkt_burst == i40e_xmit_pkts_simple)
+		options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SIMPLE;
+	else if (pkt_burst == i40e_xmit_pkts)
+		options = RTE_ETH_BURST_SCALAR;
+#ifdef RTE_ARCH_X86
+	else if (pkt_burst == i40e_xmit_pkts_vec_avx2)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
+	else if (pkt_burst == i40e_xmit_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
+#elif defined(RTE_ARCH_ARM64)
+	else if (pkt_burst == i40e_xmit_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+#elif defined(RTE_ARCH_PPC_64)
+	else if (pkt_burst == i40e_xmit_pkts_vec)
+		options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC;
+#endif
+	else
+		options = 0;
+
+	mode->options = options;
+
+	return options != 0 ? 0 : -EINVAL;
+}
+
 void __attribute__((cold))
 i40e_set_default_ptype_table(struct rte_eth_dev *dev)
 {