From: Bing Zhao <bingz@nvidia.com>
Date: Tue, 27 Oct 2020 14:46:53 +0000 (+0800)
Subject: common/mlx5: add glue function for domain sync
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=6e0cd74a56e4dc204ba44c3b4943192c74d6e6a7;p=dpdk.git

common/mlx5: add glue function for domain sync

In rdma-core, the "mlx5dv_dr_domain_sync" function was already
provided. It is used to flush the rule submission queue. The wrapper
function in the glue layer is added for using this.
It only supports DR flows right now the same as domain creating and
destroying functions.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---

diff --git a/drivers/common/mlx5/linux/mlx5_glue.c b/drivers/common/mlx5/linux/mlx5_glue.c
index 47b7e988a1..4a76902593 100644
--- a/drivers/common/mlx5/linux/mlx5_glue.c
+++ b/drivers/common/mlx5/linux/mlx5_glue.c
@@ -494,6 +494,19 @@ mlx5_glue_dr_destroy_domain(void *domain)
 #endif
 }
 
+static int
+mlx5_glue_dr_sync_domain(void *domain, uint32_t flags)
+{
+#ifdef HAVE_MLX5DV_DR
+	return mlx5dv_dr_domain_sync(domain, flags);
+#else
+	(void)domain;
+	(void)flags;
+	errno = ENOTSUP;
+	return errno;
+#endif
+}
+
 static struct ibv_cq_ex *
 mlx5_glue_dv_create_cq(struct ibv_context *context,
 		       struct ibv_cq_init_attr_ex *cq_attr,
@@ -1331,6 +1344,7 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {
 	.dr_destroy_flow_tbl = mlx5_glue_dr_destroy_flow_tbl,
 	.dr_create_domain = mlx5_glue_dr_create_domain,
 	.dr_destroy_domain = mlx5_glue_dr_destroy_domain,
+	.dr_sync_domain = mlx5_glue_dr_sync_domain,
 	.dv_create_cq = mlx5_glue_dv_create_cq,
 	.dv_create_wq = mlx5_glue_dv_create_wq,
 	.dv_query_device = mlx5_glue_dv_query_device,
diff --git a/drivers/common/mlx5/linux/mlx5_glue.h b/drivers/common/mlx5/linux/mlx5_glue.h
index 42b2f61523..a5e7fb3862 100644
--- a/drivers/common/mlx5/linux/mlx5_glue.h
+++ b/drivers/common/mlx5/linux/mlx5_glue.h
@@ -224,6 +224,7 @@ struct mlx5_glue {
 	void *(*dr_create_domain)(struct ibv_context *ctx,
 				  enum mlx5dv_dr_domain_type domain);
 	int (*dr_destroy_domain)(void *domain);
+	int (*dr_sync_domain)(void *domain, uint32_t flags);
 	struct ibv_cq_ex *(*dv_create_cq)
 		(struct ibv_context *context,
 		 struct ibv_cq_init_attr_ex *cq_attr,
diff --git a/drivers/common/mlx5/mlx5_malloc.c b/drivers/common/mlx5/mlx5_malloc.c
index f64c15fceb..5a3267f730 100644
--- a/drivers/common/mlx5/mlx5_malloc.c
+++ b/drivers/common/mlx5/mlx5_malloc.c
@@ -187,7 +187,7 @@ mlx5_malloc(uint32_t flags, size_t size, unsigned int align, int socket)
 		mlx5_mem_update_msl(addr);
 #ifdef RTE_LIBRTE_MLX5_DEBUG
 		if (addr)
-			__atomic_add_fetch(&mlx5_sys_mem->malloc_rte, 1,
+			__atomic_add_fetch(&mlx5_sys_mem.malloc_rte, 1,
 					   __ATOMIC_RELAXED);
 #endif
 		return addr;
@@ -201,7 +201,7 @@ mlx5_malloc(uint32_t flags, size_t size, unsigned int align, int socket)
 		addr = malloc(size);
 #ifdef RTE_LIBRTE_MLX5_DEBUG
 	if (addr)
-		__atomic_add_fetch(&mlx5_sys_mem->malloc_sys, 1,
+		__atomic_add_fetch(&mlx5_sys_mem.malloc_sys, 1,
 				   __ATOMIC_RELAXED);
 #endif
 	return addr;
@@ -235,7 +235,7 @@ mlx5_realloc(void *addr, uint32_t flags, size_t size, unsigned int align,
 		mlx5_mem_update_msl(new_addr);
 #ifdef RTE_LIBRTE_MLX5_DEBUG
 		if (new_addr)
-			__atomic_add_fetch(&mlx5_sys_mem->realloc_rte, 1,
+			__atomic_add_fetch(&mlx5_sys_mem.realloc_rte, 1,
 					   __ATOMIC_RELAXED);
 #endif
 		return new_addr;
@@ -248,7 +248,7 @@ mlx5_realloc(void *addr, uint32_t flags, size_t size, unsigned int align,
 	new_addr = realloc(addr, size);
 #ifdef RTE_LIBRTE_MLX5_DEBUG
 	if (new_addr)
-		__atomic_add_fetch(&mlx5_sys_mem->realloc_sys, 1,
+		__atomic_add_fetch(&mlx5_sys_mem.realloc_sys, 1,
 				   __ATOMIC_RELAXED);
 #endif
 	return new_addr;
@@ -261,13 +261,13 @@ mlx5_free(void *addr)
 		return;
 	if (!mlx5_mem_is_rte(addr)) {
 #ifdef RTE_LIBRTE_MLX5_DEBUG
-		__atomic_add_fetch(&mlx5_sys_mem->free_sys, 1,
+		__atomic_add_fetch(&mlx5_sys_mem.free_sys, 1,
 				   __ATOMIC_RELAXED);
 #endif
 		free(addr);
 	} else {
 #ifdef RTE_LIBRTE_MLX5_DEBUG
-		__atomic_add_fetch(&mlx5_sys_mem->free_rte, 1,
+		__atomic_add_fetch(&mlx5_sys_mem.free_rte, 1,
 				   __ATOMIC_RELAXED);
 #endif
 		rte_free(addr);