From: Andrew Rybchenko <arybchenko@solarflare.com>
Date: Tue, 13 Oct 2020 13:45:27 +0000 (+0100)
Subject: net/sfc: support EF100
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=714f508eafce893b9131cd5e51d914077ab94867;p=dpdk.git

net/sfc: support EF100

Riverhead is the first NIC of the EF100 architecture.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---

diff --git a/drivers/common/sfc_efx/efsys.h b/drivers/common/sfc_efx/efsys.h
index 8584cd1a40..530dd7097d 100644
--- a/drivers/common/sfc_efx/efsys.h
+++ b/drivers/common/sfc_efx/efsys.h
@@ -104,8 +104,8 @@ prefetch_read_once(const volatile void *addr)
 #define EFSYS_OPT_MEDFORD 1
 /* Enable SFN2xxx support */
 #define EFSYS_OPT_MEDFORD2 1
-/* Disable Riverhead support */
-#define EFSYS_OPT_RIVERHEAD 0
+/* Enable Riverhead support */
+#define EFSYS_OPT_RIVERHEAD 1
 
 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 #define EFSYS_OPT_CHECK_REG 1
diff --git a/drivers/net/sfc/sfc_dp.h b/drivers/net/sfc/sfc_dp.h
index 0c11cb09d0..47487d1f1f 100644
--- a/drivers/net/sfc/sfc_dp.h
+++ b/drivers/net/sfc/sfc_dp.h
@@ -83,6 +83,7 @@ struct sfc_dp {
 #define SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER		0x2
 #define SFC_DP_HW_FW_CAP_RX_EFX				0x4
 #define SFC_DP_HW_FW_CAP_TX_EFX				0x8
+#define SFC_DP_HW_FW_CAP_EF100				0x10
 };
 
 /** List of datapath variants */
diff --git a/drivers/net/sfc/sfc_ethdev.c b/drivers/net/sfc/sfc_ethdev.c
index 2140ac5d98..ae668face0 100644
--- a/drivers/net/sfc/sfc_ethdev.c
+++ b/drivers/net/sfc/sfc_ethdev.c
@@ -1927,6 +1927,9 @@ sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
 		avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX;
 		avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX;
 		break;
+	case EFX_FAMILY_RIVERHEAD:
+		avail_caps |= SFC_DP_HW_FW_CAP_EF100;
+		break;
 	default:
 		break;
 	}
@@ -2302,6 +2305,7 @@ static const struct rte_pci_id pci_id_sfc_efx_map[] = {
 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) },
 	{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) },
+	{ RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) },
 	{ .vendor_id = 0 /* sentinel */ }
 };