From: Haifeng Lin <haifeng.lin@huawei.com>
Date: Thu, 12 Mar 2020 01:08:33 +0000 (+0000)
Subject: eal/arm64: fix precise TSC
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=754b6166f522f3fab2c6dd7949c9d1180aa1c7a9;p=dpdk.git

eal/arm64: fix precise TSC

In order to get more accurate the cntvct_el0 reading,
SW must invoke isb.

Fixes: ccad39ea0712 ("eal/arm: add cpu cycle operations for ARMv8")
Cc: stable@dpdk.org

Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Haifeng Lin <haifeng.lin@huawei.com>
---

diff --git a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
index 68e7c73384..da557b6a10 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
@@ -62,7 +62,7 @@ rte_rdtsc(void)
 static inline uint64_t
 rte_rdtsc_precise(void)
 {
-	rte_mb();
+	asm volatile("isb" : : : "memory");
 	return rte_rdtsc();
 }