From: Anoob Joseph Date: Thu, 8 Jul 2021 09:44:37 +0000 (+0530) Subject: crypto/cnxk: reset feature flags on reconfigure X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=760eedf38d15aec0200f8e58fcba95b3ade30166;p=dpdk.git crypto/cnxk: reset feature flags on reconfigure Feature flag in dev would be updated during config. On reconfigure, the field need to be set again to original value. Signed-off-by: Anoob Joseph Acked-by: Akhil Goyal --- diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c b/drivers/crypto/cnxk/cn10k_cryptodev.c index 10a621f721..db7b5aa7c6 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev.c @@ -90,19 +90,7 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, dev->dev_ops = &cn10k_cpt_ops; dev->driver_id = cn10k_cryptodev_driver_id; - - dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | - RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | - RTE_CRYPTODEV_FF_HW_ACCELERATED | - RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT | - RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | - RTE_CRYPTODEV_FF_IN_PLACE_SGL | - RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | - RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | - RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | - RTE_CRYPTODEV_FF_SYM_SESSIONLESS | - RTE_CRYPTODEV_FF_SECURITY | - RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED; + dev->feature_flags = cnxk_cpt_default_ff_get(); cn10k_cpt_set_enqdeq_fns(dev); cn10k_sec_ops_override(); diff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c b/drivers/crypto/cnxk/cn9k_cryptodev.c index 71d144fea1..9ff2383d98 100644 --- a/drivers/crypto/cnxk/cn9k_cryptodev.c +++ b/drivers/crypto/cnxk/cn9k_cryptodev.c @@ -81,21 +81,10 @@ cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, dev->dev_ops = &cn9k_cpt_ops; dev->driver_id = cn9k_cryptodev_driver_id; + dev->feature_flags = cnxk_cpt_default_ff_get(); cnxk_cpt_caps_populate(vf); - dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | - RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | - RTE_CRYPTODEV_FF_HW_ACCELERATED | - RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | - RTE_CRYPTODEV_FF_IN_PLACE_SGL | - RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | - RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | - RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | - RTE_CRYPTODEV_FF_SYM_SESSIONLESS | - RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED | - RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT; - cn9k_cpt_set_enqdeq_fns(dev); return 0; diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.c b/drivers/crypto/cnxk/cnxk_cryptodev.c index 0ffe9d010f..9c7dc6297a 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev.c @@ -2,10 +2,33 @@ * Copyright(C) 2021 Marvell. */ +#include + #include "roc_cpt.h" #include "cnxk_cryptodev.h" +uint64_t +cnxk_cpt_default_ff_get(void) +{ + uint64_t ff = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | + RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | + RTE_CRYPTODEV_FF_HW_ACCELERATED | + RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT | + RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | + RTE_CRYPTODEV_FF_IN_PLACE_SGL | + RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | + RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | + RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | + RTE_CRYPTODEV_FF_SYM_SESSIONLESS | + RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED; + + if (roc_model_is_cn10k()) + ff |= RTE_CRYPTODEV_FF_SECURITY; + + return ff; +} + int cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt) { diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h index 5e38933f66..ff46d16e58 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev.h +++ b/drivers/crypto/cnxk/cnxk_cryptodev.h @@ -27,6 +27,7 @@ struct cnxk_cpt_vf { struct roc_ae_ec_group *ec_grp[CNXK_AE_EC_ID_MAX]; }; +uint64_t cnxk_cpt_default_ff_get(void); int cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt); #endif /* _CNXK_CRYPTODEV_H_ */ diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index db7b356e10..440dbc3adb 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -58,7 +58,7 @@ cnxk_cpt_dev_config(struct rte_cryptodev *dev, uint16_t nb_lf_avail, nb_lf; int ret; - dev->feature_flags &= ~conf->ff_disable; + dev->feature_flags = cnxk_cpt_default_ff_get() & ~conf->ff_disable; nb_lf_avail = roc_cpt->nb_lf_avail; nb_lf = conf->nb_queue_pairs; @@ -151,7 +151,7 @@ cnxk_cpt_dev_info_get(struct rte_cryptodev *dev, struct roc_cpt *roc_cpt = &vf->cpt; info->max_nb_queue_pairs = roc_cpt->nb_lf_avail; - info->feature_flags = dev->feature_flags; + info->feature_flags = cnxk_cpt_default_ff_get(); info->capabilities = cnxk_crypto_capabilities_get(vf); info->sym.max_nb_sessions = 0; info->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;