From: Kishore Padmanabha Date: Fri, 12 Jun 2020 12:50:13 +0000 (+0530) Subject: net/bnxt: support VXLAN encap/decap templates X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=777ee9e4e0420511620b038007e295c8ec0fc4a3;p=dpdk.git net/bnxt: support VXLAN encap/decap templates Two templates are added to ulp template db, an ingress rule for vxlan decap and an egress rule for vxlan encap. Signed-off-by: Kishore Padmanabha Signed-off-by: Somnath Kotur Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c index 809bc7538e..aeed56105f 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.c @@ -521,18 +521,20 @@ struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = { }; uint32_t bnxt_ulp_encap_vtag_map[] = { - [0] = BNXT_ULP_ENCAP_VTAG_ENCODING_NOP, - [1] = BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI, - [2] = BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI + [0] = BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP, + [1] = BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, + [2] = BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI }; uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = { - [BNXT_ULP_CLASS_HID_0013] = 1 + [BNXT_ULP_CLASS_HID_0080] = 1, + [BNXT_ULP_CLASS_HID_0000] = 2, + [BNXT_ULP_CLASS_HID_0087] = 3 }; struct bnxt_ulp_class_match_info ulp_class_match_list[] = { [1] = { - .class_hid = BNXT_ULP_CLASS_HID_0013, + .class_hid = BNXT_ULP_CLASS_HID_0080, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | @@ -547,22 +549,79 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .class_tid = 0, .act_vnic = 0, .wc_pri = 0 + }, + [2] = { + .class_hid = BNXT_ULP_CLASS_HID_0000, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .field_sig = { .bits = + BNXT_ULP_HF1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF1_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_MATCH_TYPE_BITMASK_EM }, + .class_tid = 1, + .act_vnic = 0, + .wc_pri = 0 + }, + [3] = { + .class_hid = BNXT_ULP_CLASS_HID_0087, + .hdr_sig = { .bits = + BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_T_VXLAN | + BNXT_ULP_HDR_BIT_I_ETH | + BNXT_ULP_HDR_BIT_I_IPV4 | + BNXT_ULP_HDR_BIT_I_UDP | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .field_sig = { .bits = + BNXT_ULP_HF2_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF2_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF2_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF2_BITMASK_I_UDP_DST_PORT | + BNXT_ULP_MATCH_TYPE_BITMASK_EM }, + .class_tid = 2, + .act_vnic = 0, + .wc_pri = 0 } }; uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = { - [BNXT_ULP_ACT_HID_0029] = 1 + [BNXT_ULP_ACT_HID_00a1] = 1, + [BNXT_ULP_ACT_HID_0040] = 2, + [BNXT_ULP_ACT_HID_0029] = 3 }; struct bnxt_ulp_act_match_info ulp_act_match_list[] = { [1] = { + .act_hid = BNXT_ULP_ACT_HID_00a1, + .act_sig = { .bits = + BNXT_ULP_ACTION_BIT_VXLAN_DECAP | + BNXT_ULP_ACTION_BIT_MARK | + BNXT_ULP_ACTION_BIT_VNIC | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 0 + }, + [2] = { + .act_hid = BNXT_ULP_ACT_HID_0040, + .act_sig = { .bits = + BNXT_ULP_ACTION_BIT_VPORT | + BNXT_ULP_ACTION_BIT_VXLAN_ENCAP | + BNXT_ULP_FLOW_DIR_BITMASK_EGR }, + .act_tid = 1 + }, + [3] = { .act_hid = BNXT_ULP_ACT_HID_0029, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | BNXT_ULP_ACTION_BIT_RSS | BNXT_ULP_ACTION_BIT_VNIC | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 0 + .act_tid = 2 } }; @@ -572,6 +631,18 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 0 + }, + [((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) | + BNXT_ULP_DEVICE_ID_WH_PLUS)] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 5, + .start_tbl_idx = 5 + }, + [((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) | + BNXT_ULP_DEVICE_ID_WH_PLUS)] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 5, + .start_tbl_idx = 10 } }; @@ -685,6 +756,226 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .mark_enable = BNXT_ULP_MARK_ENABLE_YES, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_NOT_USED, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 71, + .blob_key_bit_size = 12, + .key_bit_size = 12, + .key_num_fields = 2, + .result_start_idx = 32, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 2, + .ident_nums = 1, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 73, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 33, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 3, + .ident_nums = 0, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_NOT_USED, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 86, + .blob_key_bit_size = 16, + .key_bit_size = 16, + .key_num_fields = 3, + .result_start_idx = 46, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 3, + .ident_nums = 1, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 89, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 42, + .result_start_idx = 47, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 4, + .ident_nums = 0, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_MEM_EXTERNAL, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_NOT_USED, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 131, + .blob_key_bit_size = 448, + .key_bit_size = 448, + .key_num_fields = 11, + .result_start_idx = 55, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0, + .ident_start_idx = 4, + .ident_nums = 0, + .mark_enable = BNXT_ULP_MARK_ENABLE_YES, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + .direction = TF_DIR_RX, + .priority = BNXT_ULP_PRIORITY_NOT_USED, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 142, + .blob_key_bit_size = 12, + .key_bit_size = 12, + .key_num_fields = 2, + .result_start_idx = 64, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 4, + .ident_nums = 1, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED, + .direction = TF_DIR_RX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 144, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 65, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 5, + .ident_nums = 0, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .priority = BNXT_ULP_PRIORITY_NOT_USED, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 157, + .blob_key_bit_size = 16, + .key_bit_size = 16, + .key_num_fields = 3, + .result_start_idx = 78, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 5, + .ident_nums = 1, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 160, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 42, + .result_start_idx = 79, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 6, + .ident_nums = 0, + .mark_enable = BNXT_ULP_MARK_ENABLE_NO, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE, + .resource_type = TF_MEM_EXTERNAL, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED, + .direction = TF_DIR_RX, + .priority = BNXT_ULP_PRIORITY_NOT_USED, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 202, + .blob_key_bit_size = 448, + .key_bit_size = 448, + .key_num_fields = 11, + .result_start_idx = 87, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0, + .ident_start_idx = 6, + .ident_nums = 0, + .mark_enable = BNXT_ULP_MARK_ENABLE_YES, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED } }; @@ -695,7 +986,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, - .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff, BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -706,7 +998,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -740,12 +1033,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD, - .mask_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff, + .mask_operand = { + (BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff, BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, - .spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff, BNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -810,7 +1105,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -837,12 +1133,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 7, @@ -862,7 +1155,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, - .spec_operand = {(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -870,20 +1164,24 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 1, .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 4, .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, - .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -891,8 +1189,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -900,8 +1200,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -909,8 +1211,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -918,8 +1222,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -927,8 +1233,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 4, @@ -936,7 +1244,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_TYPE_IPV4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -946,8 +1255,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -955,8 +1266,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -964,8 +1277,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -973,8 +1288,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -982,8 +1299,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -991,7 +1310,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_TYPE_DIX, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -1001,8 +1321,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1010,8 +1332,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 3, @@ -1019,8 +1343,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 4, @@ -1028,7 +1354,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -1038,17 +1365,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1056,8 +1387,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 4, @@ -1065,7 +1398,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -1075,8 +1409,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1084,8 +1420,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1093,8 +1431,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1102,8 +1442,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1111,8 +1453,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 4, @@ -1120,18 +1464,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1139,8 +1486,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1148,8 +1497,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1157,8 +1508,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -1166,8 +1519,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -1175,7 +1530,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_TL2_HDR_TYPE_DIX, + .spec_operand = { + BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -1185,8 +1541,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_TL2_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1194,8 +1552,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_HREC_NEXT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 9, @@ -1203,8 +1563,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + (BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff, + BNXT_ULP_SYM_RESERVED_IGNORE & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 7, @@ -1224,8 +1587,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_AGG_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -1233,8 +1598,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_operand = { + BNXT_ULP_SYM_RECYCLE_CNT_ZERO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 4, @@ -1242,7 +1609,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2, + .spec_operand = { + BNXT_ULP_SYM_PKT_TYPE_L2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -1279,7 +1647,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, - .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff, BNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1290,7 +1659,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, - .spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff, BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1301,7 +1671,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, - .spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP, + .spec_operand = { + BNXT_ULP_SYM_IP_PROTO_UDP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -1311,7 +1682,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, - .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1322,7 +1694,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, - .spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1351,7 +1724,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, - .spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1362,74 +1736,2405 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, - .spec_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - } -}; - -struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { - { - .field_bit_size = 10, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, - .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 10, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, - .result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 7, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 1, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 4, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 8, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 3, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 6, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 3, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_TYPE_IPV4, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_TYPE_DIX, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_HDR_VALID_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_HREC_NEXT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 9, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + (BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff, + BNXT_ULP_SYM_RESERVED_IGNORE & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_AGG_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_RECYCLE_CNT_ZERO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_PKT_TYPE_L2, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 251, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF1_IDX_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF1_IDX_O_UDP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF1_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF1_IDX_O_UDP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_IP_PROTO_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 24, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_TYPE_IPV4, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_TYPE_DIX, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_ERROR_NO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_HDR_TYPE_DIX, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_HREC_NEXT_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 9, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + (BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff, + BNXT_ULP_SYM_RESERVED_IGNORE & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_AGG_ERROR_IGNORE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_RECYCLE_CNT_ZERO, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_PKT_TYPE_L2, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 251, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF2_IDX_I_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF2_IDX_I_UDP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF2_IDX_I_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF2_IDX_I_UDP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_IP_PROTO_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 24, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT, + .spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT, + .mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } +}; + +struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE, + .result_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 6, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x00f9 >> 8) & 0xff, + 0x00f9 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 33, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 9, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x00c5 >> 8) & 0xff, + 0x00c5 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 11, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE, + .result_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 6, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x00f9 >> 8) & 0xff, + 0x00f9 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 33, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 9, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x00c5 >> 8) & 0xff, + 0x00c5 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 11, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE, + .result_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 6, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x00f9 >> 8) & 0xff, + 0x00f9 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 33, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 9, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x00c5 >> 8) & 0xff, + 0x00c5 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 11, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } +}; + +struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = { + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_L2_CTXT, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_EM_PROF, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_L2_CTXT, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_EM_PROF, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_L2_CTXT, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_EM_PROF, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + } +}; + +struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = { + [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) | + BNXT_ULP_DEVICE_ID_WH_PLUS)] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 1, + .start_tbl_idx = 0 + }, + [((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) | + BNXT_ULP_DEVICE_ID_WH_PLUS)] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 1, + .start_tbl_idx = 1 + }, + [((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) | + BNXT_ULP_DEVICE_ID_WH_PLUS)] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 1, + .start_tbl_idx = 2 + } +}; + +struct bnxt_ulp_mapper_tbl_info ulp_act_tbl_list[] = { + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EXT, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + .direction = TF_DIR_RX, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .result_start_idx = 0, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EXT, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + .direction = TF_DIR_TX, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .result_start_idx = 26, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 12, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_EXT, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + .direction = TF_DIR_RX, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .result_start_idx = 64, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + } +}; + +struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { + { + .field_bit_size = 14, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 11, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -1438,19 +4143,36 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 16, + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 2, + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1461,23 +4183,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - { - .field_bit_size = 10, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, - .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 4, + .field_bit_size = 14, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 8, + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1489,31 +4208,33 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 10, + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {(0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 5, + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, - .result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { @@ -1523,17 +4244,45 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 33, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE, - .result_operand = {(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_bit_size = 11, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { @@ -1543,21 +4292,48 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 5, + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 9, + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {(0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + BNXT_ULP_SYM_DECAP_FUNC_NONE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 11, + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1565,7 +4341,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { { .field_bit_size = 2, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { @@ -1575,56 +4351,108 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = { + BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { .field_bit_size = 1, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - } -}; - -struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = { + }, { - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .field_bit_size = 4, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 - } -}; - -struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = { - [((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) | - BNXT_ULP_DEVICE_ID_WH_PLUS)] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 1, - .start_tbl_idx = 0 - } -}; - -struct bnxt_ulp_mapper_tbl_info ulp_act_tbl_list[] = { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, { - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .result_start_idx = 0, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - } -}; - -struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 48, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 0, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff, + (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 0, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff, + (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 32, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 0, + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff, + (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, { .field_bit_size = 14, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, @@ -1748,14 +4576,16 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { { .field_bit_size = 4, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, - .result_operand = {BNXT_ULP_SYM_DECAP_FUNC_NONE, + .result_operand = { + BNXT_ULP_SYM_DECAP_FUNC_NONE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 12, .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP, - .result_operand = {(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + .result_operand = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -1768,17 +4598,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { }, { .field_bit_size = 1, - .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT, + .result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h index 8acf76ec9a..881586a1ee 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.h @@ -12,14 +12,14 @@ #define BNXT_ULP_LOG2_MAX_NUM_DEV 2 #define BNXT_ULP_CACHE_TBL_MAX_SZ 4 #define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 256 -#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 2 +#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 4 #define BNXT_ULP_CLASS_HID_LOW_PRIME 7919 -#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7919 -#define BNXT_ULP_CLASS_HID_SHFTR 0 +#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907 +#define BNXT_ULP_CLASS_HID_SHFTR 16 #define BNXT_ULP_CLASS_HID_SHFTL 23 #define BNXT_ULP_CLASS_HID_MASK 255 #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 256 -#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 2 +#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 4 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919 #define BNXT_ULP_ACT_HID_HIGH_PRIME 7919 #define BNXT_ULP_ACT_HID_SHFTR 0 @@ -233,6 +233,12 @@ enum bnxt_ulp_spec_opc { BNXT_ULP_SPEC_OPC_LAST = 6 }; +enum bnxt_ulp_vfr_flag { + BNXT_ULP_VFR_FLAG_NO = 0, + BNXT_ULP_VFR_FLAG_YES = 1, + BNXT_ULP_VFR_FLAG_LAST = 2 +}; + enum bnxt_ulp_encap_vtag_encoding { BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI = 4, BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_REMAP_DIFFSERV = 5, @@ -296,6 +302,9 @@ enum bnxt_ulp_resource_sub_type { }; enum bnxt_ulp_sym { + BNXT_ULP_SYM_AGG_ERROR_IGNORE = 0, + BNXT_ULP_SYM_AGG_ERROR_NO = 0, + BNXT_ULP_SYM_AGG_ERROR_YES = 1, BNXT_ULP_SYM_BIG_ENDIAN = 0, BNXT_ULP_SYM_DECAP_FUNC_NONE = 0, BNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11, @@ -327,42 +336,160 @@ enum bnxt_ulp_sym { BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2, BNXT_ULP_SYM_ECV_VALID_NO = 0, BNXT_ULP_SYM_ECV_VALID_YES = 1, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4, + BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5, + BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP = 0, + BNXT_ULP_SYM_HREC_NEXT_IGNORE = 0, + BNXT_ULP_SYM_HREC_NEXT_NO = 0, + BNXT_ULP_SYM_HREC_NEXT_YES = 1, + BNXT_ULP_SYM_IP_PROTO_ICMP = 1, + BNXT_ULP_SYM_IP_PROTO_IGMP = 2, + BNXT_ULP_SYM_IP_PROTO_IP_IN_IP = 4, + BNXT_ULP_SYM_IP_PROTO_TCP = 6, BNXT_ULP_SYM_IP_PROTO_UDP = 17, + BNXT_ULP_SYM_L2_HDR_ERROR_IGNORE = 0, + BNXT_ULP_SYM_L2_HDR_ERROR_NO = 0, + BNXT_ULP_SYM_L2_HDR_ERROR_YES = 1, BNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0, + BNXT_ULP_SYM_L2_HDR_TYPE_IGNORE = 0, BNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2, BNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1, + BNXT_ULP_SYM_L2_HDR_VALID_IGNORE = 0, + BNXT_ULP_SYM_L2_HDR_VALID_NO = 0, + BNXT_ULP_SYM_L2_HDR_VALID_YES = 1, + BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE = 0, + BNXT_ULP_SYM_L2_TWO_VTAGS_NO = 0, + BNXT_ULP_SYM_L2_TWO_VTAGS_YES = 1, + BNXT_ULP_SYM_L2_UC_MC_BC_BC = 3, + BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE = 0, + BNXT_ULP_SYM_L2_UC_MC_BC_MC = 2, + BNXT_ULP_SYM_L2_UC_MC_BC_UC = 0, + BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE = 0, + BNXT_ULP_SYM_L2_VTAG_PRESENT_NO = 0, + BNXT_ULP_SYM_L2_VTAG_PRESENT_YES = 1, + BNXT_ULP_SYM_L3_HDR_ERROR_IGNORE = 0, + BNXT_ULP_SYM_L3_HDR_ERROR_NO = 0, + BNXT_ULP_SYM_L3_HDR_ERROR_YES = 1, + BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE = 0, + BNXT_ULP_SYM_L3_HDR_ISIP_NO = 0, + BNXT_ULP_SYM_L3_HDR_ISIP_YES = 1, BNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2, BNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4, BNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6, + BNXT_ULP_SYM_L3_HDR_TYPE_IGNORE = 0, BNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0, BNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1, BNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3, BNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5, BNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7, BNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8, + BNXT_ULP_SYM_L3_HDR_VALID_IGNORE = 0, + BNXT_ULP_SYM_L3_HDR_VALID_NO = 0, + BNXT_ULP_SYM_L3_HDR_VALID_YES = 1, + BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE = 0, + BNXT_ULP_SYM_L3_IPV6_CMP_DST_NO = 0, + BNXT_ULP_SYM_L3_IPV6_CMP_DST_YES = 1, + BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE = 0, + BNXT_ULP_SYM_L3_IPV6_CMP_SRC_NO = 0, + BNXT_ULP_SYM_L3_IPV6_CMP_SRC_YES = 1, + BNXT_ULP_SYM_L4_HDR_ERROR_IGNORE = 0, + BNXT_ULP_SYM_L4_HDR_ERROR_NO = 0, + BNXT_ULP_SYM_L4_HDR_ERROR_YES = 1, + BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0, + BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_NO = 0, + BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_YES = 1, BNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5, BNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2, + BNXT_ULP_SYM_L4_HDR_TYPE_IGNORE = 0, BNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0, BNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1, BNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3, BNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4, + BNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0, + BNXT_ULP_SYM_L4_HDR_VALID_NO = 0, + BNXT_ULP_SYM_L4_HDR_VALID_YES = 1, BNXT_ULP_SYM_LITTLE_ENDIAN = 1, BNXT_ULP_SYM_MATCH_TYPE_EM = 0, BNXT_ULP_SYM_MATCH_TYPE_WM = 1, BNXT_ULP_SYM_NO = 0, + BNXT_ULP_SYM_PKT_TYPE_IGNORE = 0, BNXT_ULP_SYM_PKT_TYPE_L2 = 0, BNXT_ULP_SYM_POP_VLAN_NO = 0, BNXT_ULP_SYM_POP_VLAN_YES = 1, + BNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0, + BNXT_ULP_SYM_RECYCLE_CNT_ONE = 1, + BNXT_ULP_SYM_RECYCLE_CNT_THREE = 3, + BNXT_ULP_SYM_RECYCLE_CNT_TWO = 2, + BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0, + BNXT_ULP_SYM_RESERVED_IGNORE = 0, BNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3, BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 3, BNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3, BNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0, + BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0, + BNXT_ULP_SYM_TL2_HDR_VALID_IGNORE = 0, + BNXT_ULP_SYM_TL2_HDR_VALID_NO = 0, + BNXT_ULP_SYM_TL2_HDR_VALID_YES = 1, + BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE = 0, + BNXT_ULP_SYM_TL2_TWO_VTAGS_NO = 0, + BNXT_ULP_SYM_TL2_TWO_VTAGS_YES = 1, + BNXT_ULP_SYM_TL2_UC_MC_BC_BC = 3, + BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE = 0, + BNXT_ULP_SYM_TL2_UC_MC_BC_MC = 2, + BNXT_ULP_SYM_TL2_UC_MC_BC_UC = 0, + BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE = 0, + BNXT_ULP_SYM_TL2_VTAG_PRESENT_NO = 0, + BNXT_ULP_SYM_TL2_VTAG_PRESENT_YES = 1, + BNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE = 0, + BNXT_ULP_SYM_TL3_HDR_ERROR_NO = 0, + BNXT_ULP_SYM_TL3_HDR_ERROR_YES = 1, + BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE = 0, + BNXT_ULP_SYM_TL3_HDR_ISIP_NO = 0, + BNXT_ULP_SYM_TL3_HDR_ISIP_YES = 1, + BNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE = 0, BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0, BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1, + BNXT_ULP_SYM_TL3_HDR_VALID_IGNORE = 0, + BNXT_ULP_SYM_TL3_HDR_VALID_NO = 0, + BNXT_ULP_SYM_TL3_HDR_VALID_YES = 1, + BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE = 0, + BNXT_ULP_SYM_TL3_IPV6_CMP_DST_NO = 0, + BNXT_ULP_SYM_TL3_IPV6_CMP_DST_YES = 1, + BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0, + BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_NO = 0, + BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_YES = 1, + BNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE = 0, + BNXT_ULP_SYM_TL4_HDR_ERROR_NO = 0, + BNXT_ULP_SYM_TL4_HDR_ERROR_YES = 1, + BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0, + BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_NO = 0, + BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_YES = 1, + BNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE = 0, BNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0, BNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1, + BNXT_ULP_SYM_TL4_HDR_VALID_IGNORE = 0, + BNXT_ULP_SYM_TL4_HDR_VALID_NO = 0, + BNXT_ULP_SYM_TL4_HDR_VALID_YES = 1, + BNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE = 0, + BNXT_ULP_SYM_TUN_HDR_ERROR_NO = 0, + BNXT_ULP_SYM_TUN_HDR_ERROR_YES = 1, + BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE = 0, BNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1, BNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3, + BNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE = 0, BNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4, BNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5, BNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7, @@ -372,6 +499,9 @@ enum bnxt_ulp_sym { BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8, BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9, BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0, + BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0, + BNXT_ULP_SYM_TUN_HDR_VALID_NO = 0, + BNXT_ULP_SYM_TUN_HDR_VALID_YES = 1, BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 3, BNXT_ULP_SYM_YES = 1 }; @@ -465,10 +595,14 @@ enum bnxt_ulp_act_prop_idx { }; enum bnxt_ulp_class_hid { - BNXT_ULP_CLASS_HID_0013 = 0x0013 + BNXT_ULP_CLASS_HID_0080 = 0x0080, + BNXT_ULP_CLASS_HID_0000 = 0x0000, + BNXT_ULP_CLASS_HID_0087 = 0x0087 }; enum bnxt_ulp_act_hid { + BNXT_ULP_ACT_HID_00a1 = 0x00a1, + BNXT_ULP_ACT_HID_0040 = 0x0040, BNXT_ULP_ACT_HID_0029 = 0x0029 }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h index 2655b83076..f69082da8a 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h @@ -33,6 +33,87 @@ enum bnxt_ulp_hf0 { BNXT_ULP_HF0_IDX_O_UDP_CSUM = 23 }; +enum bnxt_ulp_hf1 { + BNXT_ULP_HF1_IDX_SVIF_INDEX = 0, + BNXT_ULP_HF1_IDX_O_ETH_DMAC = 1, + BNXT_ULP_HF1_IDX_O_ETH_SMAC = 2, + BNXT_ULP_HF1_IDX_O_ETH_TYPE = 3, + BNXT_ULP_HF1_IDX_OO_VLAN_CFI_PRI = 4, + BNXT_ULP_HF1_IDX_OO_VLAN_VID = 5, + BNXT_ULP_HF1_IDX_OO_VLAN_TYPE = 6, + BNXT_ULP_HF1_IDX_OI_VLAN_CFI_PRI = 7, + BNXT_ULP_HF1_IDX_OI_VLAN_VID = 8, + BNXT_ULP_HF1_IDX_OI_VLAN_TYPE = 9, + BNXT_ULP_HF1_IDX_O_IPV4_VER = 10, + BNXT_ULP_HF1_IDX_O_IPV4_TOS = 11, + BNXT_ULP_HF1_IDX_O_IPV4_LEN = 12, + BNXT_ULP_HF1_IDX_O_IPV4_FRAG_ID = 13, + BNXT_ULP_HF1_IDX_O_IPV4_FRAG_OFF = 14, + BNXT_ULP_HF1_IDX_O_IPV4_TTL = 15, + BNXT_ULP_HF1_IDX_O_IPV4_NEXT_PID = 16, + BNXT_ULP_HF1_IDX_O_IPV4_CSUM = 17, + BNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR = 18, + BNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR = 19, + BNXT_ULP_HF1_IDX_O_UDP_SRC_PORT = 20, + BNXT_ULP_HF1_IDX_O_UDP_DST_PORT = 21, + BNXT_ULP_HF1_IDX_O_UDP_LENGTH = 22, + BNXT_ULP_HF1_IDX_O_UDP_CSUM = 23 +}; + +enum bnxt_ulp_hf2 { + BNXT_ULP_HF2_IDX_SVIF_INDEX = 0, + BNXT_ULP_HF2_IDX_O_ETH_DMAC = 1, + BNXT_ULP_HF2_IDX_O_ETH_SMAC = 2, + BNXT_ULP_HF2_IDX_O_ETH_TYPE = 3, + BNXT_ULP_HF2_IDX_OO_VLAN_CFI_PRI = 4, + BNXT_ULP_HF2_IDX_OO_VLAN_VID = 5, + BNXT_ULP_HF2_IDX_OO_VLAN_TYPE = 6, + BNXT_ULP_HF2_IDX_OI_VLAN_CFI_PRI = 7, + BNXT_ULP_HF2_IDX_OI_VLAN_VID = 8, + BNXT_ULP_HF2_IDX_OI_VLAN_TYPE = 9, + BNXT_ULP_HF2_IDX_O_IPV4_VER = 10, + BNXT_ULP_HF2_IDX_O_IPV4_TOS = 11, + BNXT_ULP_HF2_IDX_O_IPV4_LEN = 12, + BNXT_ULP_HF2_IDX_O_IPV4_FRAG_ID = 13, + BNXT_ULP_HF2_IDX_O_IPV4_FRAG_OFF = 14, + BNXT_ULP_HF2_IDX_O_IPV4_TTL = 15, + BNXT_ULP_HF2_IDX_O_IPV4_NEXT_PID = 16, + BNXT_ULP_HF2_IDX_O_IPV4_CSUM = 17, + BNXT_ULP_HF2_IDX_O_IPV4_SRC_ADDR = 18, + BNXT_ULP_HF2_IDX_O_IPV4_DST_ADDR = 19, + BNXT_ULP_HF2_IDX_O_UDP_SRC_PORT = 20, + BNXT_ULP_HF2_IDX_O_UDP_DST_PORT = 21, + BNXT_ULP_HF2_IDX_O_UDP_LENGTH = 22, + BNXT_ULP_HF2_IDX_O_UDP_CSUM = 23, + BNXT_ULP_HF2_IDX_T_VXLAN_FLAGS = 24, + BNXT_ULP_HF2_IDX_T_VXLAN_RSVD0 = 25, + BNXT_ULP_HF2_IDX_T_VXLAN_VNI = 26, + BNXT_ULP_HF2_IDX_T_VXLAN_RSVD1 = 27, + BNXT_ULP_HF2_IDX_I_ETH_DMAC = 28, + BNXT_ULP_HF2_IDX_I_ETH_SMAC = 29, + BNXT_ULP_HF2_IDX_I_ETH_TYPE = 30, + BNXT_ULP_HF2_IDX_IO_VLAN_CFI_PRI = 31, + BNXT_ULP_HF2_IDX_IO_VLAN_VID = 32, + BNXT_ULP_HF2_IDX_IO_VLAN_TYPE = 33, + BNXT_ULP_HF2_IDX_II_VLAN_CFI_PRI = 34, + BNXT_ULP_HF2_IDX_II_VLAN_VID = 35, + BNXT_ULP_HF2_IDX_II_VLAN_TYPE = 36, + BNXT_ULP_HF2_IDX_I_IPV4_VER = 37, + BNXT_ULP_HF2_IDX_I_IPV4_TOS = 38, + BNXT_ULP_HF2_IDX_I_IPV4_LEN = 39, + BNXT_ULP_HF2_IDX_I_IPV4_FRAG_ID = 40, + BNXT_ULP_HF2_IDX_I_IPV4_FRAG_OFF = 41, + BNXT_ULP_HF2_IDX_I_IPV4_TTL = 42, + BNXT_ULP_HF2_IDX_I_IPV4_NEXT_PID = 43, + BNXT_ULP_HF2_IDX_I_IPV4_CSUM = 44, + BNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR = 45, + BNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR = 46, + BNXT_ULP_HF2_IDX_I_UDP_SRC_PORT = 47, + BNXT_ULP_HF2_IDX_I_UDP_DST_PORT = 48, + BNXT_ULP_HF2_IDX_I_UDP_LENGTH = 49, + BNXT_ULP_HF2_IDX_I_UDP_CSUM = 50 +}; + enum bnxt_ulp_hf_bitmask0 { BNXT_ULP_HF0_BITMASK_SVIF_INDEX = 0x8000000000000000, BNXT_ULP_HF0_BITMASK_O_ETH_DMAC = 0x4000000000000000, @@ -59,5 +140,85 @@ enum bnxt_ulp_hf_bitmask0 { BNXT_ULP_HF0_BITMASK_O_UDP_LENGTH = 0x0000020000000000, BNXT_ULP_HF0_BITMASK_O_UDP_CSUM = 0x0000010000000000 }; +enum bnxt_ulp_hf_bitmask1 { + BNXT_ULP_HF1_BITMASK_SVIF_INDEX = 0x8000000000000000, + BNXT_ULP_HF1_BITMASK_O_ETH_DMAC = 0x4000000000000000, + BNXT_ULP_HF1_BITMASK_O_ETH_SMAC = 0x2000000000000000, + BNXT_ULP_HF1_BITMASK_O_ETH_TYPE = 0x1000000000000000, + BNXT_ULP_HF1_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, + BNXT_ULP_HF1_BITMASK_OO_VLAN_VID = 0x0400000000000000, + BNXT_ULP_HF1_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, + BNXT_ULP_HF1_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, + BNXT_ULP_HF1_BITMASK_OI_VLAN_VID = 0x0080000000000000, + BNXT_ULP_HF1_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_VER = 0x0020000000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_TOS = 0x0010000000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_LEN = 0x0008000000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_TTL = 0x0001000000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_NEXT_PID = 0x0000800000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_CSUM = 0x0000400000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, + BNXT_ULP_HF1_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, + BNXT_ULP_HF1_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF1_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF1_BITMASK_O_UDP_LENGTH = 0x0000020000000000, + BNXT_ULP_HF1_BITMASK_O_UDP_CSUM = 0x0000010000000000 +}; + +enum bnxt_ulp_hf_bitmask2 { + BNXT_ULP_HF2_BITMASK_SVIF_INDEX = 0x8000000000000000, + BNXT_ULP_HF2_BITMASK_O_ETH_DMAC = 0x4000000000000000, + BNXT_ULP_HF2_BITMASK_O_ETH_SMAC = 0x2000000000000000, + BNXT_ULP_HF2_BITMASK_O_ETH_TYPE = 0x1000000000000000, + BNXT_ULP_HF2_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, + BNXT_ULP_HF2_BITMASK_OO_VLAN_VID = 0x0400000000000000, + BNXT_ULP_HF2_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, + BNXT_ULP_HF2_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, + BNXT_ULP_HF2_BITMASK_OI_VLAN_VID = 0x0080000000000000, + BNXT_ULP_HF2_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_VER = 0x0020000000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_TOS = 0x0010000000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_LEN = 0x0008000000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_TTL = 0x0001000000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_NEXT_PID = 0x0000800000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_CSUM = 0x0000400000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, + BNXT_ULP_HF2_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, + BNXT_ULP_HF2_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF2_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF2_BITMASK_O_UDP_LENGTH = 0x0000020000000000, + BNXT_ULP_HF2_BITMASK_O_UDP_CSUM = 0x0000010000000000, + BNXT_ULP_HF2_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000, + BNXT_ULP_HF2_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000, + BNXT_ULP_HF2_BITMASK_T_VXLAN_VNI = 0x0000002000000000, + BNXT_ULP_HF2_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000, + BNXT_ULP_HF2_BITMASK_I_ETH_DMAC = 0x0000000800000000, + BNXT_ULP_HF2_BITMASK_I_ETH_SMAC = 0x0000000400000000, + BNXT_ULP_HF2_BITMASK_I_ETH_TYPE = 0x0000000200000000, + BNXT_ULP_HF2_BITMASK_IO_VLAN_CFI_PRI = 0x0000000100000000, + BNXT_ULP_HF2_BITMASK_IO_VLAN_VID = 0x0000000080000000, + BNXT_ULP_HF2_BITMASK_IO_VLAN_TYPE = 0x0000000040000000, + BNXT_ULP_HF2_BITMASK_II_VLAN_CFI_PRI = 0x0000000020000000, + BNXT_ULP_HF2_BITMASK_II_VLAN_VID = 0x0000000010000000, + BNXT_ULP_HF2_BITMASK_II_VLAN_TYPE = 0x0000000008000000, + BNXT_ULP_HF2_BITMASK_I_IPV4_VER = 0x0000000004000000, + BNXT_ULP_HF2_BITMASK_I_IPV4_TOS = 0x0000000002000000, + BNXT_ULP_HF2_BITMASK_I_IPV4_LEN = 0x0000000001000000, + BNXT_ULP_HF2_BITMASK_I_IPV4_FRAG_ID = 0x0000000000800000, + BNXT_ULP_HF2_BITMASK_I_IPV4_FRAG_OFF = 0x0000000000400000, + BNXT_ULP_HF2_BITMASK_I_IPV4_TTL = 0x0000000000200000, + BNXT_ULP_HF2_BITMASK_I_IPV4_NEXT_PID = 0x0000000000100000, + BNXT_ULP_HF2_BITMASK_I_IPV4_CSUM = 0x0000000000080000, + BNXT_ULP_HF2_BITMASK_I_IPV4_SRC_ADDR = 0x0000000000040000, + BNXT_ULP_HF2_BITMASK_I_IPV4_DST_ADDR = 0x0000000000020000, + BNXT_ULP_HF2_BITMASK_I_UDP_SRC_PORT = 0x0000000000010000, + BNXT_ULP_HF2_BITMASK_I_UDP_DST_PORT = 0x0000000000008000, + BNXT_ULP_HF2_BITMASK_I_UDP_LENGTH = 0x0000000000004000, + BNXT_ULP_HF2_BITMASK_I_UDP_CSUM = 0x0000000000002000 +}; #endif