From: Reshma Pattan <reshma.pattan@intel.com>
Date: Thu, 11 Apr 2019 11:13:36 +0000 (+0100)
Subject: examples/power: fix overflowed value
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=7e7b7a1f427013374f38e1b101969a1dbce5c9c1;p=dpdk.git

examples/power: fix overflowed value

Fix the data type of last_branches, last_branch_misses
from uint32_t to uint64_t, and for hits_diff, miss_diff
from int to int64_t respectively to fix possible
overflow or truncation.

Coverity issue: 337677
Fixes: 4b1a631b8a ("examples/vm_power: add oob monitoring functions")
Cc: stable@dpdk.org

Signed-off-by: Reshma Pattan <reshma.pattan@intel.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
---

diff --git a/examples/vm_power_manager/oob_monitor_x86.c b/examples/vm_power_manager/oob_monitor_x86.c
index 589c604e5c..ebd96b205f 100644
--- a/examples/vm_power_manager/oob_monitor_x86.c
+++ b/examples/vm_power_manager/oob_monitor_x86.c
@@ -33,10 +33,10 @@ static float
 apply_policy(int core)
 {
 	struct core_info *ci;
-	uint64_t counter;
+	uint64_t counter = 0;
 	uint64_t branches, branch_misses;
-	uint32_t last_branches, last_branch_misses;
-	int hits_diff, miss_diff;
+	uint64_t last_branches, last_branch_misses;
+	int64_t hits_diff, miss_diff;
 	float ratio;
 	int ret;
 
@@ -54,6 +54,7 @@ apply_policy(int core)
 				core);
 	branches = counter;
 
+	counter = 0;
 	ret = pread(ci->cd[core].msr_fd, &counter,
 			sizeof(counter), IA32_PERFCTR1);
 	if (ret < 0)
@@ -66,13 +67,25 @@ apply_policy(int core)
 	ci->cd[core].last_branches = branches;
 	ci->cd[core].last_branch_misses = branch_misses;
 
-	hits_diff = (int)branches - (int)last_branches;
+	/*
+	 * Intentional right shift to make MSB 0 to avoid
+	 * possible signed overflow or truncation.
+	 */
+	branches >>= 1;
+	last_branches >>= 1;
+	hits_diff = (int64_t)branches - (int64_t)last_branches;
 	if (hits_diff <= 0) {
 		/* Likely a counter overflow condition, skip this round */
 		return -1.0;
 	}
 
-	miss_diff = (int)branch_misses - (int)last_branch_misses;
+	/*
+	 * Intentional right shift to make MSB 0 to avoid
+	 * possible signed overflow or truncation.
+	 */
+	branch_misses >>= 1;
+	last_branch_misses >>= 1;
+	miss_diff = (int64_t)branch_misses - (int64_t)last_branch_misses;
 	if (miss_diff <= 0) {
 		/* Likely a counter overflow condition, skip this round */
 		return -1.0;