From: Ivan Malov Date: Thu, 24 Sep 2020 12:12:13 +0000 (+0100) Subject: common/sfc_efx/base: report restrictions for TSO version 3 X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=7ed3ac82a67c3d0c57188fa66f56481e4b89d34b;p=dpdk.git common/sfc_efx/base: report restrictions for TSO version 3 Riverhead puts a number of restrictions on TSO transactions. Reflect some of them in the NIC configuration structure. Signed-off-by: Ivan Malov Signed-off-by: Andrew Rybchenko Reviewed-by: Andrew Lee Reviewed-by: Andy Moreton --- diff --git a/drivers/common/sfc_efx/base/ef10_nic.c b/drivers/common/sfc_efx/base/ef10_nic.c index 43f3412f35..927af87e0d 100644 --- a/drivers/common/sfc_efx/base/ef10_nic.c +++ b/drivers/common/sfc_efx/base/ef10_nic.c @@ -2077,6 +2077,27 @@ ef10_nic_board_cfg( */ encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT; + /* EF10 TSO engine demands that packet header be contiguous. */ + encp->enc_tx_tso_max_header_ndescs = 1; + + /* The overall TSO header length is not limited. */ + encp->enc_tx_tso_max_header_length = UINT32_MAX; + + /* + * There are no specific limitations on the number of + * TSO payload descriptors. + */ + encp->enc_tx_tso_max_payload_ndescs = UINT32_MAX; + + /* TSO superframe payload length is not limited. */ + encp->enc_tx_tso_max_payload_length = UINT32_MAX; + + /* + * Limitation on the maximum number of outgoing packets per + * TSO transaction described in SF-108452-SW. + */ + encp->enc_tx_tso_max_nframes = 32767; + /* * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h index 08f7cddc95..a2c2e49bba 100644 --- a/drivers/common/sfc_efx/base/efx.h +++ b/drivers/common/sfc_efx/base/efx.h @@ -1466,6 +1466,16 @@ typedef struct efx_nic_cfg_s { * the hardware to apply TSO packet edits. */ uint32_t enc_tx_tso_tcp_header_offset_limit; + /* Maximum number of header DMA descriptors per TSO transaction. */ + uint32_t enc_tx_tso_max_header_ndescs; + /* Maximum header length acceptable by TSO transaction. */ + uint32_t enc_tx_tso_max_header_length; + /* Maximum number of payload DMA descriptors per TSO transaction. */ + uint32_t enc_tx_tso_max_payload_ndescs; + /* Maximum payload length per TSO transaction. */ + uint32_t enc_tx_tso_max_payload_length; + /* Maximum number of frames to be generated per TSO transaction. */ + uint32_t enc_tx_tso_max_nframes; boolean_t enc_fw_assisted_tso_enabled; boolean_t enc_fw_assisted_tso_v2_enabled; boolean_t enc_fw_assisted_tso_v2_encap_enabled; diff --git a/drivers/common/sfc_efx/base/rhead_nic.c b/drivers/common/sfc_efx/base/rhead_nic.c index b779b4f8e1..7fb28eae31 100644 --- a/drivers/common/sfc_efx/base/rhead_nic.c +++ b/drivers/common/sfc_efx/base/rhead_nic.c @@ -33,11 +33,26 @@ rhead_board_cfg( encp->enc_tx_dma_desc_boundary = 0; /* - * Maximum number of bytes into the frame the TCP header can start for - * firmware assisted TSO to work. - * FIXME Get from design parameter DP_TSO_MAX_HDR_LEN. + * Initialise design parameters to either a runtime value read from + * the design parameters area or the well known default value + * (see SF-119689-TC section 4.4 for details). + * FIXME: Read design parameters area values. */ - encp->enc_tx_tso_tcp_header_offset_limit = 0; + encp->enc_tx_tso_max_header_ndescs = + ESE_EF100_DP_GZ_TSO_MAX_HDR_NUM_SEGS_DEFAULT; + encp->enc_tx_tso_max_header_length = + ESE_EF100_DP_GZ_TSO_MAX_HDR_LEN_DEFAULT; + encp->enc_tx_tso_max_payload_ndescs = + ESE_EF100_DP_GZ_TSO_MAX_PAYLOAD_NUM_SEGS_DEFAULT; + encp->enc_tx_tso_max_payload_length = + ESE_EF100_DP_GZ_TSO_MAX_PAYLOAD_LEN_DEFAULT; + encp->enc_tx_tso_max_nframes = + ESE_EF100_DP_GZ_TSO_MAX_NUM_FRAMES_DEFAULT; + + /* + * Riverhead does not put any restrictions on TCP header offset limit. + */ + encp->enc_tx_tso_tcp_header_offset_limit = UINT32_MAX; /* * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use