From: Michael Wildt Date: Wed, 15 Apr 2020 08:18:41 +0000 (+0530) Subject: net/bnxt: add initial TruFlow core session open X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=8430a8b841c84a6a3cd84fb983013cf581c7d6a1;p=dpdk.git net/bnxt: add initial TruFlow core session open - Add infrastructure support - Add tf_core open session support Signed-off-by: Michael Wildt Signed-off-by: Venkat Duvvuru Reviewed-by: Randy Schacher Reviewed-by: Ajit Khaparde --- diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile index b77532b817..8a68059b0c 100644 --- a/drivers/net/bnxt/Makefile +++ b/drivers/net/bnxt/Makefile @@ -43,6 +43,14 @@ ifeq ($(CONFIG_RTE_ARCH_X86), y) SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_rxtx_vec_sse.c endif +ifeq ($(CONFIG_RTE_LIBRTE_BNXT_PMD), y) +CFLAGS += -I$(SRCDIR) -I$(SRCDIR)/tf_core +endif + +SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_core.c +SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_msg.c +SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tfp.c + # # Export include files # diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index aede112692..56886c2462 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -21,6 +21,8 @@ #include "bnxt_cpr.h" #include "bnxt_util.h" +#include "tf_core.h" + /* Vendor ID */ #define PCI_VENDOR_ID_BROADCOM 0x14E4 @@ -679,6 +681,8 @@ struct bnxt { /* TCAM and EM should be 16-bit only. Other modes not supported. */ #define BNXT_FLOW_ID_MASK 0x0000ffff struct bnxt_mark_info *mark_table; + + struct tf tfp; }; int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu); diff --git a/drivers/net/bnxt/tf_core/hwrm_tf.h b/drivers/net/bnxt/tf_core/hwrm_tf.h new file mode 100644 index 0000000000..f346d62d3a --- /dev/null +++ b/drivers/net/bnxt/tf_core/hwrm_tf.h @@ -0,0 +1,975 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ +#ifndef _HWRM_TF_H_ +#define _HWRM_TF_H_ + +#include "tf_core.h" + +typedef enum tf_type { + TF_TYPE_TRUFLOW, + TF_TYPE_LAST = TF_TYPE_TRUFLOW, +} tf_type_t; + +typedef enum tf_subtype { + HWRM_TFT_SESSION_ATTACH = 712, + HWRM_TFT_SESSION_HW_RESC_QCAPS = 721, + HWRM_TFT_SESSION_HW_RESC_ALLOC = 722, + HWRM_TFT_SESSION_HW_RESC_FREE = 723, + HWRM_TFT_SESSION_HW_RESC_FLUSH = 724, + HWRM_TFT_SESSION_SRAM_RESC_QCAPS = 725, + HWRM_TFT_SESSION_SRAM_RESC_ALLOC = 726, + HWRM_TFT_SESSION_SRAM_RESC_FREE = 727, + HWRM_TFT_SESSION_SRAM_RESC_FLUSH = 728, + HWRM_TFT_TBL_SCOPE_CFG = 731, + HWRM_TFT_EM_RULE_INSERT = 739, + HWRM_TFT_EM_RULE_DELETE = 740, + HWRM_TFT_REG_GET = 821, + HWRM_TFT_REG_SET = 822, + HWRM_TFT_TBL_TYPE_SET = 823, + HWRM_TFT_TBL_TYPE_GET = 824, + TF_SUBTYPE_LAST = HWRM_TFT_TBL_TYPE_GET, +} tf_subtype_t; + +/* Request and Response compile time checking */ +/* u32_t tlv_req_value[26]; */ +#define TF_MAX_REQ_SIZE 104 +/* u32_t tlv_resp_value[170]; */ +#define TF_MAX_RESP_SIZE 680 + +#define __BUILD_BUG_ON(condition, line) \ + char p##line[(condition) ? 1 : -1] +#define _BUILD_BUG_ON(condition, line) __BUILD_BUG_ON(condition, line) +#define BUILD_BUG_ON(condition) _BUILD_BUG_ON(condition, __LINE__) + +/* Use this to allocate/free any kind of + * indexes over HWRM and fill the parms pointer + */ +#define TF_BULK_RECV 128 +#define TF_BULK_SEND 16 + +/* EM Key value */ +#define TF_DEV_DATA_TYPE_TF_EM_RULE_INSERT_KEY_DATA 0x2e30UL +/* EM Key value */ +#define TF_DEV_DATA_TYPE_TF_EM_RULE_DELETE_KEY_DATA 0x2e40UL +/* L2 Context DMA Address Type */ +#define TF_DEV_DATA_TYPE_TF_L2_CTX_DMA_ADDR 0x2fe0UL +/* L2 Context Entry */ +#define TF_DEV_DATA_TYPE_TF_L2_CTX_ENTRY 0x2fe1UL +/* Prof tcam DMA Address Type */ +#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_DMA_ADDR 0x3030UL +/* Prof tcam Entry */ +#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_ENTRY 0x3031UL +/* WC DMA Address Type */ +#define TF_DEV_DATA_TYPE_TF_WC_DMA_ADDR 0x30d0UL +/* WC Entry */ +#define TF_DEV_DATA_TYPE_TF_WC_ENTRY 0x30d1UL +/* Action Data */ +#define TF_DEV_DATA_TYPE_TF_ACTION_DATA 0x3170UL +#define TF_DEV_DATA_TYPE_LAST TF_DEV_DATA_TYPE_TF_ACTION_DATA + +#define TF_BITS2BYTES(x) (((x) + 7) >> 3) +#define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4) + +struct tf_session_attach_input; +struct tf_session_hw_resc_qcaps_input; +struct tf_session_hw_resc_qcaps_output; +struct tf_session_hw_resc_alloc_input; +struct tf_session_hw_resc_alloc_output; +struct tf_session_hw_resc_free_input; +struct tf_session_hw_resc_flush_input; +struct tf_session_sram_resc_qcaps_input; +struct tf_session_sram_resc_qcaps_output; +struct tf_session_sram_resc_alloc_input; +struct tf_session_sram_resc_alloc_output; +struct tf_session_sram_resc_free_input; +struct tf_session_sram_resc_flush_input; +struct tf_tbl_type_set_input; +struct tf_tbl_type_get_input; +struct tf_tbl_type_get_output; +struct tf_em_internal_insert_input; +struct tf_em_internal_insert_output; +struct tf_em_internal_delete_input; +/* Input params for session attach */ +typedef struct tf_session_attach_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* Session Name */ + char session_name[TF_SESSION_NAME_MAX]; +} tf_session_attach_input_t, *ptf_session_attach_input_t; +BUILD_BUG_ON(sizeof(tf_session_attach_input_t) <= TF_MAX_REQ_SIZE); + +/* Input params for session resource HW qcaps */ +typedef struct tf_session_hw_resc_qcaps_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the query apply to RX */ +#define TF_SESSION_HW_RESC_QCAPS_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the query apply to TX */ +#define TF_SESSION_HW_RESC_QCAPS_INPUT_FLAGS_DIR_TX (0x1) +} tf_session_hw_resc_qcaps_input_t, *ptf_session_hw_resc_qcaps_input_t; +BUILD_BUG_ON(sizeof(tf_session_hw_resc_qcaps_input_t) <= TF_MAX_REQ_SIZE); + +/* Output params for session resource HW qcaps */ +typedef struct tf_session_hw_resc_qcaps_output { + /* Control Flags */ + uint32_t flags; + /* When set to 0, indicates Static partitioning */ +#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_STATIC (0x0) + /* When set to 1, indicates Strategy 1 */ +#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_1 (0x1) + /* When set to 1, indicates Strategy 2 */ +#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_2 (0x2) + /* When set to 1, indicates Strategy 3 */ +#define TF_SESSION_HW_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_3 (0x3) + /* Unused */ + uint8_t unused[4]; + /* Minimum guaranteed number of L2 Ctx */ + uint16_t l2_ctx_tcam_entries_min; + /* Maximum non-guaranteed number of L2 Ctx */ + uint16_t l2_ctx_tcam_entries_max; + /* Minimum guaranteed number of profile functions */ + uint16_t prof_func_min; + /* Maximum non-guaranteed number of profile functions */ + uint16_t prof_func_max; + /* Minimum guaranteed number of profile TCAM entries */ + uint16_t prof_tcam_entries_min; + /* Maximum non-guaranteed number of profile TCAM entries */ + uint16_t prof_tcam_entries_max; + /* Minimum guaranteed number of EM profile ID */ + uint16_t em_prof_id_min; + /* Maximum non-guaranteed number of EM profile ID */ + uint16_t em_prof_id_max; + /* Minimum guaranteed number of EM records entries */ + uint16_t em_record_entries_min; + /* Maximum non-guaranteed number of EM record entries */ + uint16_t em_record_entries_max; + /* Minimum guaranteed number of WC TCAM profile ID */ + uint16_t wc_tcam_prof_id_min; + /* Maximum non-guaranteed number of WC TCAM profile ID */ + uint16_t wc_tcam_prof_id_max; + /* Minimum guaranteed number of WC TCAM entries */ + uint16_t wc_tcam_entries_min; + /* Maximum non-guaranteed number of WC TCAM entries */ + uint16_t wc_tcam_entries_max; + /* Minimum guaranteed number of meter profiles */ + uint16_t meter_profiles_min; + /* Maximum non-guaranteed number of meter profiles */ + uint16_t meter_profiles_max; + /* Minimum guaranteed number of meter instances */ + uint16_t meter_inst_min; + /* Maximum non-guaranteed number of meter instances */ + uint16_t meter_inst_max; + /* Minimum guaranteed number of mirrors */ + uint16_t mirrors_min; + /* Maximum non-guaranteed number of mirrors */ + uint16_t mirrors_max; + /* Minimum guaranteed number of UPAR */ + uint16_t upar_min; + /* Maximum non-guaranteed number of UPAR */ + uint16_t upar_max; + /* Minimum guaranteed number of SP TCAM entries */ + uint16_t sp_tcam_entries_min; + /* Maximum non-guaranteed number of SP TCAM entries */ + uint16_t sp_tcam_entries_max; + /* Minimum guaranteed number of L2 Functions */ + uint16_t l2_func_min; + /* Maximum non-guaranteed number of L2 Functions */ + uint16_t l2_func_max; + /* Minimum guaranteed number of flexible key templates */ + uint16_t flex_key_templ_min; + /* Maximum non-guaranteed number of flexible key templates */ + uint16_t flex_key_templ_max; + /* Minimum guaranteed number of table Scopes */ + uint16_t tbl_scope_min; + /* Maximum non-guaranteed number of table Scopes */ + uint16_t tbl_scope_max; + /* Minimum guaranteed number of epoch0 entries */ + uint16_t epoch0_entries_min; + /* Maximum non-guaranteed number of epoch0 entries */ + uint16_t epoch0_entries_max; + /* Minimum guaranteed number of epoch1 entries */ + uint16_t epoch1_entries_min; + /* Maximum non-guaranteed number of epoch1 entries */ + uint16_t epoch1_entries_max; + /* Minimum guaranteed number of metadata */ + uint16_t metadata_min; + /* Maximum non-guaranteed number of metadata */ + uint16_t metadata_max; + /* Minimum guaranteed number of CT states */ + uint16_t ct_state_min; + /* Maximum non-guaranteed number of CT states */ + uint16_t ct_state_max; + /* Minimum guaranteed number of range profiles */ + uint16_t range_prof_min; + /* Maximum non-guaranteed number range profiles */ + uint16_t range_prof_max; + /* Minimum guaranteed number of range entries */ + uint16_t range_entries_min; + /* Maximum non-guaranteed number of range entries */ + uint16_t range_entries_max; + /* Minimum guaranteed number of LAG table entries */ + uint16_t lag_tbl_entries_min; + /* Maximum non-guaranteed number of LAG table entries */ + uint16_t lag_tbl_entries_max; +} tf_session_hw_resc_qcaps_output_t, *ptf_session_hw_resc_qcaps_output_t; +BUILD_BUG_ON(sizeof(tf_session_hw_resc_qcaps_output_t) <= TF_MAX_RESP_SIZE); + +/* Input params for session resource HW alloc */ +typedef struct tf_session_hw_resc_alloc_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the query apply to RX */ +#define TF_SESSION_HW_RESC_ALLOC_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the query apply to TX */ +#define TF_SESSION_HW_RESC_ALLOC_INPUT_FLAGS_DIR_TX (0x1) + /* Unused */ + uint8_t unused[2]; + /* Number of L2 CTX TCAM entries to be allocated */ + uint16_t num_l2_ctx_tcam_entries; + /* Number of profile functions to be allocated */ + uint16_t num_prof_func_entries; + /* Number of profile TCAM entries to be allocated */ + uint16_t num_prof_tcam_entries; + /* Number of EM profile ids to be allocated */ + uint16_t num_em_prof_id; + /* Number of EM records entries to be allocated */ + uint16_t num_em_record_entries; + /* Number of WC profiles ids to be allocated */ + uint16_t num_wc_tcam_prof_id; + /* Number of WC TCAM entries to be allocated */ + uint16_t num_wc_tcam_entries; + /* Number of meter profiles to be allocated */ + uint16_t num_meter_profiles; + /* Number of meter instances to be allocated */ + uint16_t num_meter_inst; + /* Number of mirrors to be allocated */ + uint16_t num_mirrors; + /* Number of UPAR to be allocated */ + uint16_t num_upar; + /* Number of SP TCAM entries to be allocated */ + uint16_t num_sp_tcam_entries; + /* Number of L2 functions to be allocated */ + uint16_t num_l2_func; + /* Number of flexible key templates to be allocated */ + uint16_t num_flex_key_templ; + /* Number of table scopes to be allocated */ + uint16_t num_tbl_scope; + /* Number of epoch0 entries to be allocated */ + uint16_t num_epoch0_entries; + /* Number of epoch1 entries to be allocated */ + uint16_t num_epoch1_entries; + /* Number of metadata to be allocated */ + uint16_t num_metadata; + /* Number of CT states to be allocated */ + uint16_t num_ct_state; + /* Number of range profiles to be allocated */ + uint16_t num_range_prof; + /* Number of range Entries to be allocated */ + uint16_t num_range_entries; + /* Number of LAG table entries to be allocated */ + uint16_t num_lag_tbl_entries; +} tf_session_hw_resc_alloc_input_t, *ptf_session_hw_resc_alloc_input_t; +BUILD_BUG_ON(sizeof(tf_session_hw_resc_alloc_input_t) <= TF_MAX_REQ_SIZE); + +/* Output params for session resource HW alloc */ +typedef struct tf_session_hw_resc_alloc_output { + /* Starting index of L2 CTX TCAM entries allocated to the session */ + uint16_t l2_ctx_tcam_entries_start; + /* Number of L2 CTX TCAM entries allocated */ + uint16_t l2_ctx_tcam_entries_stride; + /* Starting index of profile functions allocated to the session */ + uint16_t prof_func_start; + /* Number of profile functions allocated */ + uint16_t prof_func_stride; + /* Starting index of profile TCAM entries allocated to the session */ + uint16_t prof_tcam_entries_start; + /* Number of profile TCAM entries allocated */ + uint16_t prof_tcam_entries_stride; + /* Starting index of EM profile ids allocated to the session */ + uint16_t em_prof_id_start; + /* Number of EM profile ids allocated */ + uint16_t em_prof_id_stride; + /* Starting index of EM record entries allocated to the session */ + uint16_t em_record_entries_start; + /* Number of EM record entries allocated */ + uint16_t em_record_entries_stride; + /* Starting index of WC TCAM profiles ids allocated to the session */ + uint16_t wc_tcam_prof_id_start; + /* Number of WC TCAM profile ids allocated */ + uint16_t wc_tcam_prof_id_stride; + /* Starting index of WC TCAM entries allocated to the session */ + uint16_t wc_tcam_entries_start; + /* Number of WC TCAM allocated */ + uint16_t wc_tcam_entries_stride; + /* Starting index of meter profiles allocated to the session */ + uint16_t meter_profiles_start; + /* Number of meter profiles allocated */ + uint16_t meter_profiles_stride; + /* Starting index of meter instance allocated to the session */ + uint16_t meter_inst_start; + /* Number of meter instance allocated */ + uint16_t meter_inst_stride; + /* Starting index of mirrors allocated to the session */ + uint16_t mirrors_start; + /* Number of mirrors allocated */ + uint16_t mirrors_stride; + /* Starting index of UPAR allocated to the session */ + uint16_t upar_start; + /* Number of UPAR allocated */ + uint16_t upar_stride; + /* Starting index of SP TCAM entries allocated to the session */ + uint16_t sp_tcam_entries_start; + /* Number of SP TCAM entries allocated */ + uint16_t sp_tcam_entries_stride; + /* Starting index of L2 functions allocated to the session */ + uint16_t l2_func_start; + /* Number of L2 functions allocated */ + uint16_t l2_func_stride; + /* Starting index of flexible key templates allocated to the session */ + uint16_t flex_key_templ_start; + /* Number of flexible key templates allocated */ + uint16_t flex_key_templ_stride; + /* Starting index of table scopes allocated to the session */ + uint16_t tbl_scope_start; + /* Number of table scopes allocated */ + uint16_t tbl_scope_stride; + /* Starting index of epoch0 entries allocated to the session */ + uint16_t epoch0_entries_start; + /* Number of epoch0 entries allocated */ + uint16_t epoch0_entries_stride; + /* Starting index of epoch1 entries allocated to the session */ + uint16_t epoch1_entries_start; + /* Number of epoch1 entries allocated */ + uint16_t epoch1_entries_stride; + /* Starting index of metadata allocated to the session */ + uint16_t metadata_start; + /* Number of metadata allocated */ + uint16_t metadata_stride; + /* Starting index of CT states allocated to the session */ + uint16_t ct_state_start; + /* Number of CT states allocated */ + uint16_t ct_state_stride; + /* Starting index of range profiles allocated to the session */ + uint16_t range_prof_start; + /* Number range profiles allocated */ + uint16_t range_prof_stride; + /* Starting index of range entries allocated to the session */ + uint16_t range_entries_start; + /* Number of range entries allocated */ + uint16_t range_entries_stride; + /* Starting index of LAG table entries allocated to the session */ + uint16_t lag_tbl_entries_start; + /* Number of LAG table entries allocated */ + uint16_t lag_tbl_entries_stride; +} tf_session_hw_resc_alloc_output_t, *ptf_session_hw_resc_alloc_output_t; +BUILD_BUG_ON(sizeof(tf_session_hw_resc_alloc_output_t) <= TF_MAX_RESP_SIZE); + +/* Input params for session resource HW free */ +typedef struct tf_session_hw_resc_free_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the query apply to RX */ +#define TF_SESSION_HW_RESC_FREE_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the query apply to TX */ +#define TF_SESSION_HW_RESC_FREE_INPUT_FLAGS_DIR_TX (0x1) + /* Unused */ + uint8_t unused[2]; + /* Starting index of L2 CTX TCAM entries allocated to the session */ + uint16_t l2_ctx_tcam_entries_start; + /* Number of L2 CTX TCAM entries allocated */ + uint16_t l2_ctx_tcam_entries_stride; + /* Starting index of profile functions allocated to the session */ + uint16_t prof_func_start; + /* Number of profile functions allocated */ + uint16_t prof_func_stride; + /* Starting index of profile TCAM entries allocated to the session */ + uint16_t prof_tcam_entries_start; + /* Number of profile TCAM entries allocated */ + uint16_t prof_tcam_entries_stride; + /* Starting index of EM profile ids allocated to the session */ + uint16_t em_prof_id_start; + /* Number of EM profile ids allocated */ + uint16_t em_prof_id_stride; + /* Starting index of EM record entries allocated to the session */ + uint16_t em_record_entries_start; + /* Number of EM record entries allocated */ + uint16_t em_record_entries_stride; + /* Starting index of WC TCAM profiles ids allocated to the session */ + uint16_t wc_tcam_prof_id_start; + /* Number of WC TCAM profile ids allocated */ + uint16_t wc_tcam_prof_id_stride; + /* Starting index of WC TCAM entries allocated to the session */ + uint16_t wc_tcam_entries_start; + /* Number of WC TCAM allocated */ + uint16_t wc_tcam_entries_stride; + /* Starting index of meter profiles allocated to the session */ + uint16_t meter_profiles_start; + /* Number of meter profiles allocated */ + uint16_t meter_profiles_stride; + /* Starting index of meter instance allocated to the session */ + uint16_t meter_inst_start; + /* Number of meter instance allocated */ + uint16_t meter_inst_stride; + /* Starting index of mirrors allocated to the session */ + uint16_t mirrors_start; + /* Number of mirrors allocated */ + uint16_t mirrors_stride; + /* Starting index of UPAR allocated to the session */ + uint16_t upar_start; + /* Number of UPAR allocated */ + uint16_t upar_stride; + /* Starting index of SP TCAM entries allocated to the session */ + uint16_t sp_tcam_entries_start; + /* Number of SP TCAM entries allocated */ + uint16_t sp_tcam_entries_stride; + /* Starting index of L2 functions allocated to the session */ + uint16_t l2_func_start; + /* Number of L2 functions allocated */ + uint16_t l2_func_stride; + /* Starting index of flexible key templates allocated to the session */ + uint16_t flex_key_templ_start; + /* Number of flexible key templates allocated */ + uint16_t flex_key_templ_stride; + /* Starting index of table scopes allocated to the session */ + uint16_t tbl_scope_start; + /* Number of table scopes allocated */ + uint16_t tbl_scope_stride; + /* Starting index of epoch0 entries allocated to the session */ + uint16_t epoch0_entries_start; + /* Number of epoch0 entries allocated */ + uint16_t epoch0_entries_stride; + /* Starting index of epoch1 entries allocated to the session */ + uint16_t epoch1_entries_start; + /* Number of epoch1 entries allocated */ + uint16_t epoch1_entries_stride; + /* Starting index of metadata allocated to the session */ + uint16_t metadata_start; + /* Number of metadata allocated */ + uint16_t metadata_stride; + /* Starting index of CT states allocated to the session */ + uint16_t ct_state_start; + /* Number of CT states allocated */ + uint16_t ct_state_stride; + /* Starting index of range profiles allocated to the session */ + uint16_t range_prof_start; + /* Number range profiles allocated */ + uint16_t range_prof_stride; + /* Starting index of range entries allocated to the session */ + uint16_t range_entries_start; + /* Number of range entries allocated */ + uint16_t range_entries_stride; + /* Starting index of LAG table entries allocated to the session */ + uint16_t lag_tbl_entries_start; + /* Number of LAG table entries allocated */ + uint16_t lag_tbl_entries_stride; +} tf_session_hw_resc_free_input_t, *ptf_session_hw_resc_free_input_t; +BUILD_BUG_ON(sizeof(tf_session_hw_resc_free_input_t) <= TF_MAX_REQ_SIZE); + +/* Input params for session resource HW flush */ +typedef struct tf_session_hw_resc_flush_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the flush apply to RX */ +#define TF_SESSION_HW_RESC_FLUSH_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the flush apply to TX */ +#define TF_SESSION_HW_RESC_FLUSH_INPUT_FLAGS_DIR_TX (0x1) + /* Unused */ + uint8_t unused[2]; + /* Starting index of L2 CTX TCAM entries allocated to the session */ + uint16_t l2_ctx_tcam_entries_start; + /* Number of L2 CTX TCAM entries allocated */ + uint16_t l2_ctx_tcam_entries_stride; + /* Starting index of profile functions allocated to the session */ + uint16_t prof_func_start; + /* Number of profile functions allocated */ + uint16_t prof_func_stride; + /* Starting index of profile TCAM entries allocated to the session */ + uint16_t prof_tcam_entries_start; + /* Number of profile TCAM entries allocated */ + uint16_t prof_tcam_entries_stride; + /* Starting index of EM profile ids allocated to the session */ + uint16_t em_prof_id_start; + /* Number of EM profile ids allocated */ + uint16_t em_prof_id_stride; + /* Starting index of EM record entries allocated to the session */ + uint16_t em_record_entries_start; + /* Number of EM record entries allocated */ + uint16_t em_record_entries_stride; + /* Starting index of WC TCAM profiles ids allocated to the session */ + uint16_t wc_tcam_prof_id_start; + /* Number of WC TCAM profile ids allocated */ + uint16_t wc_tcam_prof_id_stride; + /* Starting index of WC TCAM entries allocated to the session */ + uint16_t wc_tcam_entries_start; + /* Number of WC TCAM allocated */ + uint16_t wc_tcam_entries_stride; + /* Starting index of meter profiles allocated to the session */ + uint16_t meter_profiles_start; + /* Number of meter profiles allocated */ + uint16_t meter_profiles_stride; + /* Starting index of meter instance allocated to the session */ + uint16_t meter_inst_start; + /* Number of meter instance allocated */ + uint16_t meter_inst_stride; + /* Starting index of mirrors allocated to the session */ + uint16_t mirrors_start; + /* Number of mirrors allocated */ + uint16_t mirrors_stride; + /* Starting index of UPAR allocated to the session */ + uint16_t upar_start; + /* Number of UPAR allocated */ + uint16_t upar_stride; + /* Starting index of SP TCAM entries allocated to the session */ + uint16_t sp_tcam_entries_start; + /* Number of SP TCAM entries allocated */ + uint16_t sp_tcam_entries_stride; + /* Starting index of L2 functions allocated to the session */ + uint16_t l2_func_start; + /* Number of L2 functions allocated */ + uint16_t l2_func_stride; + /* Starting index of flexible key templates allocated to the session */ + uint16_t flex_key_templ_start; + /* Number of flexible key templates allocated */ + uint16_t flex_key_templ_stride; + /* Starting index of table scopes allocated to the session */ + uint16_t tbl_scope_start; + /* Number of table scopes allocated */ + uint16_t tbl_scope_stride; + /* Starting index of epoch0 entries allocated to the session */ + uint16_t epoch0_entries_start; + /* Number of epoch0 entries allocated */ + uint16_t epoch0_entries_stride; + /* Starting index of epoch1 entries allocated to the session */ + uint16_t epoch1_entries_start; + /* Number of epoch1 entries allocated */ + uint16_t epoch1_entries_stride; + /* Starting index of metadata allocated to the session */ + uint16_t metadata_start; + /* Number of metadata allocated */ + uint16_t metadata_stride; + /* Starting index of CT states allocated to the session */ + uint16_t ct_state_start; + /* Number of CT states allocated */ + uint16_t ct_state_stride; + /* Starting index of range profiles allocated to the session */ + uint16_t range_prof_start; + /* Number range profiles allocated */ + uint16_t range_prof_stride; + /* Starting index of range entries allocated to the session */ + uint16_t range_entries_start; + /* Number of range entries allocated */ + uint16_t range_entries_stride; + /* Starting index of LAG table entries allocated to the session */ + uint16_t lag_tbl_entries_start; + /* Number of LAG table entries allocated */ + uint16_t lag_tbl_entries_stride; +} tf_session_hw_resc_flush_input_t, *ptf_session_hw_resc_flush_input_t; +BUILD_BUG_ON(sizeof(tf_session_hw_resc_flush_input_t) <= TF_MAX_REQ_SIZE); + +/* Input params for session resource SRAM qcaps */ +typedef struct tf_session_sram_resc_qcaps_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the query apply to RX */ +#define TF_SESSION_SRAM_RESC_QCAPS_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the query apply to TX */ +#define TF_SESSION_SRAM_RESC_QCAPS_INPUT_FLAGS_DIR_TX (0x1) +} tf_session_sram_resc_qcaps_input_t, *ptf_session_sram_resc_qcaps_input_t; +BUILD_BUG_ON(sizeof(tf_session_sram_resc_qcaps_input_t) <= TF_MAX_REQ_SIZE); + +/* Output params for session resource SRAM qcaps */ +typedef struct tf_session_sram_resc_qcaps_output { + /* Flags */ + uint32_t flags; + /* When set to 0, indicates Static partitioning */ +#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_STATIC (0x0) + /* When set to 1, indicates Strategy 1 */ +#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_1 (0x1) + /* When set to 1, indicates Strategy 2 */ +#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_2 (0x2) + /* When set to 1, indicates Strategy 3 */ +#define TF_SESSION_SRAM_RESC_QCAPS_OUTPUT_FLAGS_SESS_RES_STRATEGY_3 (0x3) + /* Minimum guaranteed number of Full Action */ + uint16_t full_action_min; + /* Maximum non-guaranteed number of Full Action */ + uint16_t full_action_max; + /* Minimum guaranteed number of MCG */ + uint16_t mcg_min; + /* Maximum non-guaranteed number of MCG */ + uint16_t mcg_max; + /* Minimum guaranteed number of Encap 8B */ + uint16_t encap_8b_min; + /* Maximum non-guaranteed number of Encap 8B */ + uint16_t encap_8b_max; + /* Minimum guaranteed number of Encap 16B */ + uint16_t encap_16b_min; + /* Maximum non-guaranteed number of Encap 16B */ + uint16_t encap_16b_max; + /* Minimum guaranteed number of Encap 64B */ + uint16_t encap_64b_min; + /* Maximum non-guaranteed number of Encap 64B */ + uint16_t encap_64b_max; + /* Minimum guaranteed number of SP SMAC */ + uint16_t sp_smac_min; + /* Maximum non-guaranteed number of SP SMAC */ + uint16_t sp_smac_max; + /* Minimum guaranteed number of SP SMAC IPv4 */ + uint16_t sp_smac_ipv4_min; + /* Maximum non-guaranteed number of SP SMAC IPv4 */ + uint16_t sp_smac_ipv4_max; + /* Minimum guaranteed number of SP SMAC IPv6 */ + uint16_t sp_smac_ipv6_min; + /* Maximum non-guaranteed number of SP SMAC IPv6 */ + uint16_t sp_smac_ipv6_max; + /* Minimum guaranteed number of Counter 64B */ + uint16_t counter_64b_min; + /* Maximum non-guaranteed number of Counter 64B */ + uint16_t counter_64b_max; + /* Minimum guaranteed number of NAT SPORT */ + uint16_t nat_sport_min; + /* Maximum non-guaranteed number of NAT SPORT */ + uint16_t nat_sport_max; + /* Minimum guaranteed number of NAT DPORT */ + uint16_t nat_dport_min; + /* Maximum non-guaranteed number of NAT DPORT */ + uint16_t nat_dport_max; + /* Minimum guaranteed number of NAT S_IPV4 */ + uint16_t nat_s_ipv4_min; + /* Maximum non-guaranteed number of NAT S_IPV4 */ + uint16_t nat_s_ipv4_max; + /* Minimum guaranteed number of NAT D_IPV4 */ + uint16_t nat_d_ipv4_min; + /* Maximum non-guaranteed number of NAT D_IPV4 */ + uint16_t nat_d_ipv4_max; +} tf_session_sram_resc_qcaps_output_t, *ptf_session_sram_resc_qcaps_output_t; +BUILD_BUG_ON(sizeof(tf_session_sram_resc_qcaps_output_t) <= TF_MAX_RESP_SIZE); + +/* Input params for session resource SRAM alloc */ +typedef struct tf_session_sram_resc_alloc_input { + /* FW Session Id */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the query apply to RX */ +#define TF_SESSION_SRAM_RESC_ALLOC_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the query apply to TX */ +#define TF_SESSION_SRAM_RESC_ALLOC_INPUT_FLAGS_DIR_TX (0x1) + /* Unused */ + uint8_t unused[2]; + /* Number of full action SRAM entries to be allocated */ + uint16_t num_full_action; + /* Number of multicast groups to be allocated */ + uint16_t num_mcg; + /* Number of Encap 8B entries to be allocated */ + uint16_t num_encap_8b; + /* Number of Encap 16B entries to be allocated */ + uint16_t num_encap_16b; + /* Number of Encap 64B entries to be allocated */ + uint16_t num_encap_64b; + /* Number of SP SMAC entries to be allocated */ + uint16_t num_sp_smac; + /* Number of SP SMAC IPv4 entries to be allocated */ + uint16_t num_sp_smac_ipv4; + /* Number of SP SMAC IPv6 entries to be allocated */ + uint16_t num_sp_smac_ipv6; + /* Number of Counter 64B entries to be allocated */ + uint16_t num_counter_64b; + /* Number of NAT source ports to be allocated */ + uint16_t num_nat_sport; + /* Number of NAT destination ports to be allocated */ + uint16_t num_nat_dport; + /* Number of NAT source iPV4 addresses to be allocated */ + uint16_t num_nat_s_ipv4; + /* Number of NAT destination IPV4 addresses to be allocated */ + uint16_t num_nat_d_ipv4; +} tf_session_sram_resc_alloc_input_t, *ptf_session_sram_resc_alloc_input_t; +BUILD_BUG_ON(sizeof(tf_session_sram_resc_alloc_input_t) <= TF_MAX_REQ_SIZE); + +/* Output params for session resource SRAM alloc */ +typedef struct tf_session_sram_resc_alloc_output { + /* Unused */ + uint8_t unused[2]; + /* Starting index of full action SRAM entries allocated to the session */ + uint16_t full_action_start; + /* Number of full action SRAM entries allocated */ + uint16_t full_action_stride; + /* Starting index of multicast groups allocated to this session */ + uint16_t mcg_start; + /* Number of multicast groups allocated */ + uint16_t mcg_stride; + /* Starting index of encap 8B entries allocated to the session */ + uint16_t encap_8b_start; + /* Number of encap 8B entries allocated */ + uint16_t encap_8b_stride; + /* Starting index of encap 16B entries allocated to the session */ + uint16_t encap_16b_start; + /* Number of encap 16B entries allocated */ + uint16_t encap_16b_stride; + /* Starting index of encap 64B entries allocated to the session */ + uint16_t encap_64b_start; + /* Number of encap 64B entries allocated */ + uint16_t encap_64b_stride; + /* Starting index of SP SMAC entries allocated to the session */ + uint16_t sp_smac_start; + /* Number of SP SMAC entries allocated */ + uint16_t sp_smac_stride; + /* Starting index of SP SMAC IPv4 entries allocated to the session */ + uint16_t sp_smac_ipv4_start; + /* Number of SP SMAC IPv4 entries allocated */ + uint16_t sp_smac_ipv4_stride; + /* Starting index of SP SMAC IPv6 entries allocated to the session */ + uint16_t sp_smac_ipv6_start; + /* Number of SP SMAC IPv6 entries allocated */ + uint16_t sp_smac_ipv6_stride; + /* Starting index of Counter 64B entries allocated to the session */ + uint16_t counter_64b_start; + /* Number of Counter 64B entries allocated */ + uint16_t counter_64b_stride; + /* Starting index of NAT source ports allocated to the session */ + uint16_t nat_sport_start; + /* Number of NAT source ports allocated */ + uint16_t nat_sport_stride; + /* Starting index of NAT destination ports allocated to the session */ + uint16_t nat_dport_start; + /* Number of NAT destination ports allocated */ + uint16_t nat_dport_stride; + /* Starting index of NAT source IPV4 addresses allocated to the session */ + uint16_t nat_s_ipv4_start; + /* Number of NAT source IPV4 addresses allocated */ + uint16_t nat_s_ipv4_stride; + /* + * Starting index of NAT destination IPV4 addresses allocated to the + * session + */ + uint16_t nat_d_ipv4_start; + /* Number of NAT destination IPV4 addresses allocated */ + uint16_t nat_d_ipv4_stride; +} tf_session_sram_resc_alloc_output_t, *ptf_session_sram_resc_alloc_output_t; +BUILD_BUG_ON(sizeof(tf_session_sram_resc_alloc_output_t) <= TF_MAX_RESP_SIZE); + +/* Input params for session resource SRAM free */ +typedef struct tf_session_sram_resc_free_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the query apply to RX */ +#define TF_SESSION_SRAM_RESC_FREE_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the query apply to TX */ +#define TF_SESSION_SRAM_RESC_FREE_INPUT_FLAGS_DIR_TX (0x1) + /* Starting index of full action SRAM entries allocated to the session */ + uint16_t full_action_start; + /* Number of full action SRAM entries allocated */ + uint16_t full_action_stride; + /* Starting index of multicast groups allocated to this session */ + uint16_t mcg_start; + /* Number of multicast groups allocated */ + uint16_t mcg_stride; + /* Starting index of encap 8B entries allocated to the session */ + uint16_t encap_8b_start; + /* Number of encap 8B entries allocated */ + uint16_t encap_8b_stride; + /* Starting index of encap 16B entries allocated to the session */ + uint16_t encap_16b_start; + /* Number of encap 16B entries allocated */ + uint16_t encap_16b_stride; + /* Starting index of encap 64B entries allocated to the session */ + uint16_t encap_64b_start; + /* Number of encap 64B entries allocated */ + uint16_t encap_64b_stride; + /* Starting index of SP SMAC entries allocated to the session */ + uint16_t sp_smac_start; + /* Number of SP SMAC entries allocated */ + uint16_t sp_smac_stride; + /* Starting index of SP SMAC IPv4 entries allocated to the session */ + uint16_t sp_smac_ipv4_start; + /* Number of SP SMAC IPv4 entries allocated */ + uint16_t sp_smac_ipv4_stride; + /* Starting index of SP SMAC IPv6 entries allocated to the session */ + uint16_t sp_smac_ipv6_start; + /* Number of SP SMAC IPv6 entries allocated */ + uint16_t sp_smac_ipv6_stride; + /* Starting index of Counter 64B entries allocated to the session */ + uint16_t counter_64b_start; + /* Number of Counter 64B entries allocated */ + uint16_t counter_64b_stride; + /* Starting index of NAT source ports allocated to the session */ + uint16_t nat_sport_start; + /* Number of NAT source ports allocated */ + uint16_t nat_sport_stride; + /* Starting index of NAT destination ports allocated to the session */ + uint16_t nat_dport_start; + /* Number of NAT destination ports allocated */ + uint16_t nat_dport_stride; + /* Starting index of NAT source IPV4 addresses allocated to the session */ + uint16_t nat_s_ipv4_start; + /* Number of NAT source IPV4 addresses allocated */ + uint16_t nat_s_ipv4_stride; + /* + * Starting index of NAT destination IPV4 addresses allocated to the + * session + */ + uint16_t nat_d_ipv4_start; + /* Number of NAT destination IPV4 addresses allocated */ + uint16_t nat_d_ipv4_stride; +} tf_session_sram_resc_free_input_t, *ptf_session_sram_resc_free_input_t; +BUILD_BUG_ON(sizeof(tf_session_sram_resc_free_input_t) <= TF_MAX_REQ_SIZE); + +/* Input params for session resource SRAM flush */ +typedef struct tf_session_sram_resc_flush_input { + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the flush apply to RX */ +#define TF_SESSION_SRAM_RESC_FLUSH_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the flush apply to TX */ +#define TF_SESSION_SRAM_RESC_FLUSH_INPUT_FLAGS_DIR_TX (0x1) + /* Starting index of full action SRAM entries allocated to the session */ + uint16_t full_action_start; + /* Number of full action SRAM entries allocated */ + uint16_t full_action_stride; + /* Starting index of multicast groups allocated to this session */ + uint16_t mcg_start; + /* Number of multicast groups allocated */ + uint16_t mcg_stride; + /* Starting index of encap 8B entries allocated to the session */ + uint16_t encap_8b_start; + /* Number of encap 8B entries allocated */ + uint16_t encap_8b_stride; + /* Starting index of encap 16B entries allocated to the session */ + uint16_t encap_16b_start; + /* Number of encap 16B entries allocated */ + uint16_t encap_16b_stride; + /* Starting index of encap 64B entries allocated to the session */ + uint16_t encap_64b_start; + /* Number of encap 64B entries allocated */ + uint16_t encap_64b_stride; + /* Starting index of SP SMAC entries allocated to the session */ + uint16_t sp_smac_start; + /* Number of SP SMAC entries allocated */ + uint16_t sp_smac_stride; + /* Starting index of SP SMAC IPv4 entries allocated to the session */ + uint16_t sp_smac_ipv4_start; + /* Number of SP SMAC IPv4 entries allocated */ + uint16_t sp_smac_ipv4_stride; + /* Starting index of SP SMAC IPv6 entries allocated to the session */ + uint16_t sp_smac_ipv6_start; + /* Number of SP SMAC IPv6 entries allocated */ + uint16_t sp_smac_ipv6_stride; + /* Starting index of Counter 64B entries allocated to the session */ + uint16_t counter_64b_start; + /* Number of Counter 64B entries allocated */ + uint16_t counter_64b_stride; + /* Starting index of NAT source ports allocated to the session */ + uint16_t nat_sport_start; + /* Number of NAT source ports allocated */ + uint16_t nat_sport_stride; + /* Starting index of NAT destination ports allocated to the session */ + uint16_t nat_dport_start; + /* Number of NAT destination ports allocated */ + uint16_t nat_dport_stride; + /* Starting index of NAT source IPV4 addresses allocated to the session */ + uint16_t nat_s_ipv4_start; + /* Number of NAT source IPV4 addresses allocated */ + uint16_t nat_s_ipv4_stride; + /* + * Starting index of NAT destination IPV4 addresses allocated to the + * session + */ + uint16_t nat_d_ipv4_start; + /* Number of NAT destination IPV4 addresses allocated */ + uint16_t nat_d_ipv4_stride; +} tf_session_sram_resc_flush_input_t, *ptf_session_sram_resc_flush_input_t; +BUILD_BUG_ON(sizeof(tf_session_sram_resc_flush_input_t) <= TF_MAX_REQ_SIZE); + +/* Input params for table type get */ +typedef struct tf_tbl_type_get_input { + /* Session Id */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the get apply to RX */ +#define TF_TBL_TYPE_GET_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the get apply to TX */ +#define TF_TBL_TYPE_GET_INPUT_FLAGS_DIR_TX (0x1) + /* Type of the object to set */ + uint32_t type; + /* Index to get */ + uint32_t index; +} tf_tbl_type_get_input_t, *ptf_tbl_type_get_input_t; +BUILD_BUG_ON(sizeof(tf_tbl_type_get_input_t) <= TF_MAX_REQ_SIZE); + +/* Output params for table type get */ +typedef struct tf_tbl_type_get_output { + /* Size of the data read in bytes */ + uint16_t size; + /* Data read */ + uint8_t data[TF_BULK_RECV]; +} tf_tbl_type_get_output_t, *ptf_tbl_type_get_output_t; +BUILD_BUG_ON(sizeof(tf_tbl_type_get_output_t) <= TF_MAX_RESP_SIZE); + +/* Input params for EM internal rule insert */ +typedef struct tf_em_internal_insert_input { + /* Firmware Session Id */ + uint32_t fw_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the get apply to RX */ +#define TF_EM_INTERNAL_INSERT_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the get apply to TX */ +#define TF_EM_INTERNAL_INSERT_INPUT_FLAGS_DIR_TX (0x1) + /* strength */ + uint16_t strength; + /* index to action */ + uint32_t action_ptr; + /* index of em record */ + uint32_t em_record_idx; + /* EM Key value */ + uint64_t em_key[8]; + /* number of bits in em_key */ + uint16_t em_key_bitlen; +} tf_em_internal_insert_input_t, *ptf_em_internal_insert_input_t; +BUILD_BUG_ON(sizeof(tf_em_internal_insert_input_t) <= TF_MAX_REQ_SIZE); + +/* Output params for EM internal rule insert */ +typedef struct tf_em_internal_insert_output { + /* EM record pointer index */ + uint16_t rptr_index; + /* EM record offset 0~3 */ + uint8_t rptr_entry; +} tf_em_internal_insert_output_t, *ptf_em_internal_insert_output_t; +BUILD_BUG_ON(sizeof(tf_em_internal_insert_output_t) <= TF_MAX_RESP_SIZE); + +/* Input params for EM INTERNAL rule delete */ +typedef struct tf_em_internal_delete_input { + /* Session Id */ + uint32_t tf_session_id; + /* flags */ + uint16_t flags; + /* When set to 0, indicates the get apply to RX */ +#define TF_EM_INTERNAL_DELETE_INPUT_FLAGS_DIR_RX (0x0) + /* When set to 1, indicates the get apply to TX */ +#define TF_EM_INTERNAL_DELETE_INPUT_FLAGS_DIR_TX (0x1) + /* EM internal flow hanndle */ + uint64_t flow_handle; + /* EM Key value */ + uint64_t em_key[8]; + /* number of bits in em_key */ + uint16_t em_key_bitlen; +} tf_em_internal_delete_input_t, *ptf_em_internal_delete_input_t; +BUILD_BUG_ON(sizeof(tf_em_internal_delete_input_t) <= TF_MAX_REQ_SIZE); + +#endif /* _HWRM_TF_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c new file mode 100644 index 0000000000..6bafae55bd --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -0,0 +1,145 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#include + +#include "tf_core.h" +#include "tf_session.h" +#include "tf_msg.h" +#include "tfp.h" +#include "bnxt.h" + +int +tf_open_session(struct tf *tfp, + struct tf_open_session_parms *parms) +{ + int rc; + struct tf_session *session; + struct tfp_calloc_parms alloc_parms; + unsigned int domain, bus, slot, device; + uint8_t fw_session_id; + + if (tfp == NULL || parms == NULL) + return -EINVAL; + + /* Filter out any non-supported device types on the Core + * side. It is assumed that the Firmware will be supported if + * firmware open session succeeds. + */ + if (parms->device_type != TF_DEVICE_TYPE_WH) + return -ENOTSUP; + + /* Build the beginning of session_id */ + rc = sscanf(parms->ctrl_chan_name, + "%x:%x:%x.%d", + &domain, + &bus, + &slot, + &device); + if (rc != 4) { + PMD_DRV_LOG(ERR, + "Failed to scan device ctrl_chan_name\n"); + return -EINVAL; + } + + /* open FW session and get a new session_id */ + rc = tf_msg_session_open(tfp, + parms->ctrl_chan_name, + &fw_session_id); + if (rc) { + /* Log error */ + if (rc == -EEXIST) + PMD_DRV_LOG(ERR, + "Session is already open, rc:%d\n", + rc); + else + PMD_DRV_LOG(ERR, + "Open message send failed, rc:%d\n", + rc); + + parms->session_id.id = TF_FW_SESSION_ID_INVALID; + return rc; + } + + /* Allocate session */ + alloc_parms.nitems = 1; + alloc_parms.size = sizeof(struct tf_session_info); + alloc_parms.alignment = 0; + rc = tfp_calloc(&alloc_parms); + if (rc) { + /* Log error */ + PMD_DRV_LOG(ERR, + "Failed to allocate session info, rc:%d\n", + rc); + goto cleanup; + } + + tfp->session = (struct tf_session_info *)alloc_parms.mem_va; + + /* Allocate core data for the session */ + alloc_parms.nitems = 1; + alloc_parms.size = sizeof(struct tf_session); + alloc_parms.alignment = 0; + rc = tfp_calloc(&alloc_parms); + if (rc) { + /* Log error */ + PMD_DRV_LOG(ERR, + "Failed to allocate session data, rc:%d\n", + rc); + goto cleanup; + } + + tfp->session->core_data = alloc_parms.mem_va; + + session = (struct tf_session *)tfp->session->core_data; + tfp_memcpy(session->ctrl_chan_name, + parms->ctrl_chan_name, + TF_SESSION_NAME_MAX); + + /* Initialize Session */ + session->device_type = parms->device_type; + + /* Construct the Session ID */ + session->session_id.internal.domain = domain; + session->session_id.internal.bus = bus; + session->session_id.internal.device = device; + session->session_id.internal.fw_session_id = fw_session_id; + + rc = tf_msg_session_qcfg(tfp); + if (rc) { + /* Log error */ + PMD_DRV_LOG(ERR, + "Query config message send failed, rc:%d\n", + rc); + goto cleanup_close; + } + + session->ref_count++; + + /* Return session ID */ + parms->session_id = session->session_id; + + PMD_DRV_LOG(INFO, + "Session created, session_id:%d\n", + parms->session_id.id); + + PMD_DRV_LOG(INFO, + "domain:%d, bus:%d, device:%d, fw_session_id:%d\n", + parms->session_id.internal.domain, + parms->session_id.internal.bus, + parms->session_id.internal.device, + parms->session_id.internal.fw_session_id); + + return 0; + + cleanup: + tfp_free(tfp->session->core_data); + tfp_free(tfp->session); + tfp->session = NULL; + return rc; + + cleanup_close: + return -EINVAL; +} diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h new file mode 100644 index 0000000000..21a8839664 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -0,0 +1,347 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#ifndef _TF_CORE_H_ +#define _TF_CORE_H_ + +#include +#include +#include +#include + +#include "tf_project.h" + +/** + * @file + * + * Truflow Core API Header File + */ + +/********** BEGIN Truflow Core DEFINITIONS **********/ + +/** + * direction + */ +enum tf_dir { + TF_DIR_RX, /**< Receive */ + TF_DIR_TX, /**< Transmit */ + TF_DIR_MAX +}; + +/********** BEGIN API FUNCTION PROTOTYPES/PARAMETERS **********/ + +/** + * @page general General + * + * @ref tf_open_session + * + * @ref tf_attach_session + * + * @ref tf_close_session + */ + + +/** Session Version defines + * + * The version controls the format of the tf_session and + * tf_session_info structure. This is to assure upgrade between + * versions can be supported. + */ +#define TF_SESSION_VER_MAJOR 1 /**< Major Version */ +#define TF_SESSION_VER_MINOR 0 /**< Minor Version */ +#define TF_SESSION_VER_UPDATE 0 /**< Update Version */ + +/** Session Name + * + * Name of the TruFlow control channel interface. Expects + * format to be RTE Name specific, i.e. rte_eth_dev_get_name_by_port() + */ +#define TF_SESSION_NAME_MAX 64 + +#define TF_FW_SESSION_ID_INVALID 0xFF /**< Invalid FW Session ID define */ + +/** Session Identifier + * + * Unique session identifier which includes PCIe bus info to + * distinguish the PF and session info to identify the associated + * TruFlow session. Session ID is constructed from the passed in + * ctrl_chan_name in tf_open_session() together with an allocated + * fw_session_id. Done by TruFlow on tf_open_session(). + */ +union tf_session_id { + uint32_t id; + struct { + uint8_t domain; + uint8_t bus; + uint8_t device; + uint8_t fw_session_id; + } internal; +}; + +/** Session Version + * + * The version controls the format of the tf_session and + * tf_session_info structure. This is to assure upgrade between + * versions can be supported. + * + * Please see the TF_VER_MAJOR/MINOR and UPDATE defines. + */ +struct tf_session_version { + uint8_t major; + uint8_t minor; + uint8_t update; +}; + +/** Session supported device types + * + */ +enum tf_device_type { + TF_DEVICE_TYPE_WH = 0, /**< Whitney+ */ + TF_DEVICE_TYPE_BRD2, /**< TBD */ + TF_DEVICE_TYPE_BRD3, /**< TBD */ + TF_DEVICE_TYPE_BRD4, /**< TBD */ + TF_DEVICE_TYPE_MAX /**< Maximum */ +}; + +/** TruFlow Session Information + * + * Structure defining a TruFlow Session, also known as a Management + * session. This structure is initialized at time of + * tf_open_session(). It is passed to all of the TruFlow APIs as way + * to prescribe and isolate resources between different TruFlow ULP + * Applications. + */ +struct tf_session_info { + /** + * TrueFlow Version. Used to control the structure layout when + * sharing sessions. No guarantee that a secondary process + * would come from the same version of an executable. + * TruFlow initializes this variable on tf_open_session(). + * + * Owner: TruFlow + * Access: TruFlow + */ + struct tf_session_version ver; + /** + * will be STAILQ_ENTRY(tf_session_info) next + * + * Owner: ULP + * Access: ULP + */ + void *next; + /** + * Session ID is a unique identifier for the session. TruFlow + * initializes this variable during tf_open_session() + * processing. + * + * Owner: TruFlow + * Access: Truflow & ULP + */ + union tf_session_id session_id; + /** + * Protects access to core_data. Lock is initialized and owned + * by ULP. TruFlow can access the core_data without checking + * the lock. + * + * Owner: ULP + * Access: ULP + */ + uint8_t spin_lock; + /** + * The core_data holds the TruFlow tf_session data + * structure. This memory is allocated and owned by TruFlow on + * tf_open_session(). + * + * TruFlow uses this memory for session management control + * until the session is closed by ULP. Access control is done + * by the spin_lock which ULP controls ahead of TruFlow API + * calls. + * + * Please see tf_open_session_parms for specification details + * on this variable. + * + * Owner: TruFlow + * Access: TruFlow + */ + void *core_data; + /** + * The core_data_sz_bytes specifies the size of core_data in + * bytes. + * + * The size is set by TruFlow on tf_open_session(). + * + * Please see tf_open_session_parms for specification details + * on this variable. + * + * Owner: TruFlow + * Access: TruFlow + */ + uint32_t core_data_sz_bytes; +}; + +/** TruFlow handle + * + * Contains a pointer to the session info. Allocated by ULP and passed + * to TruFlow using tf_open_session(). TruFlow will populate the + * session info at that time. Additional 'opens' can be done using + * same session_info by using tf_attach_session(). + * + * It is expected that ULP allocates this memory as shared memory. + * + * NOTE: This struct must be within the BNXT PMD struct bnxt + * (bp). This allows use of container_of() to get access to the PMD. + */ +struct tf { + struct tf_session_info *session; +}; + + +/** + * tf_open_session parameters definition. + */ +struct tf_open_session_parms { + /** [in] ctrl_chan_name + * + * String containing name of control channel interface to be + * used for this session to communicate with firmware. + * + * The ctrl_chan_name can be looked up by using + * rte_eth_dev_get_name_by_port() within the ULP. + * + * ctrl_chan_name will be used as part of a name for any + * shared memory allocation. + */ + char ctrl_chan_name[TF_SESSION_NAME_MAX]; + /** [in] shadow_copy + * + * Boolean controlling the use and availability of shadow + * copy. Shadow copy will allow the TruFlow to keep track of + * resource content on the firmware side without having to + * query firmware. Additional private session core_data will + * be allocated if this boolean is set to 'true', default + * 'false'. + * + * Size of memory depends on the NVM Resource settings for the + * control channel. + */ + bool shadow_copy; + /** [in/out] session_id + * + * Session_id is unique per session. + * + * Session_id is composed of domain, bus, device and + * fw_session_id. The construction is done by parsing the + * ctrl_chan_name together with allocation of a fw_session_id. + * + * The session_id allows a session to be shared between devices. + */ + union tf_session_id session_id; + /** [in] device type + * + * Device type is passed, one of Wh+, Brd2, Brd3, Brd4 + */ + enum tf_device_type device_type; +}; + +/** + * Opens a new TruFlow management session. + * + * TruFlow will allocate session specific memory, shared memory, to + * hold its session data. This data is private to TruFlow. + * + * Multiple PFs can share the same session. An association, refcount, + * between session and PFs is maintained within TruFlow. Thus, a PF + * can attach to an existing session, see tf_attach_session(). + * + * No other TruFlow APIs will succeed unless this API is first called and + * succeeds. + * + * tf_open_session() returns a session id that can be used on attach. + * + * [in] tfp + * Pointer to TF handle + * [in] parms + * Pointer to open parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_open_session(struct tf *tfp, + struct tf_open_session_parms *parms); + +struct tf_attach_session_parms { + /** [in] ctrl_chan_name + * + * String containing name of control channel interface to be + * used for this session to communicate with firmware. + * + * The ctrl_chan_name can be looked up by using + * rte_eth_dev_get_name_by_port() within the ULP. + * + * ctrl_chan_name will be used as part of a name for any + * shared memory allocation. + */ + char ctrl_chan_name[TF_SESSION_NAME_MAX]; + + /** [in] attach_chan_name + * + * String containing name of attach channel interface to be + * used for this session. + * + * The attach_chan_name must be given to a 2nd process after + * the primary process has been created. This is the + * ctrl_chan_name of the primary process and is used to find + * the shared memory for the session that the attach is going + * to use. + */ + char attach_chan_name[TF_SESSION_NAME_MAX]; + + /** [in] session_id + * + * Session_id is unique per session. For Attach the session_id + * should be the session_id that was returned on the first + * open. + * + * Session_id is composed of domain, bus, device and + * fw_session_id. The construction is done by parsing the + * ctrl_chan_name together with allocation of a fw_session_id + * during tf_open_session(). + * + * A reference count will be incremented on attach. A session + * is first fully closed when reference count is zero by + * calling tf_close_session(). + */ + union tf_session_id session_id; +}; + +/** + * Attaches to an existing session. Used when more than one PF wants + * to share a single session. In that case all TruFlow management + * traffic will be sent to the TruFlow firmware using the 'PF' that + * did the attach not the session ctrl channel. + * + * Attach will increment a ref count as to manage the shared session data. + * + * [in] tfp, pointer to TF handle + * [in] parms, pointer to attach parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_attach_session(struct tf *tfp, + struct tf_attach_session_parms *parms); + +/** + * Closes an existing session. Cleans up all hardware and firmware + * state associated with the TruFlow application session when the last + * PF associated with the session results in refcount to be zero. + * + * Returns success or failure code. + */ +int tf_close_session(struct tf *tfp); + +#endif /* _TF_CORE_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c new file mode 100644 index 0000000000..2b68681506 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#include +#include +#include + +#include "bnxt.h" +#include "tf_core.h" +#include "tf_session.h" +#include "tfp.h" + +#include "tf_msg_common.h" +#include "tf_msg.h" +#include "hsi_struct_def_dpdk.h" +#include "hwrm_tf.h" + +/** + * Sends session open request to TF Firmware + */ +int +tf_msg_session_open(struct tf *tfp, + char *ctrl_chan_name, + uint8_t *fw_session_id) +{ + int rc; + struct hwrm_tf_session_open_input req = { 0 }; + struct hwrm_tf_session_open_output resp = { 0 }; + struct tfp_send_msg_parms parms = { 0 }; + + /* Populate the request */ + memcpy(&req.session_name, ctrl_chan_name, TF_SESSION_NAME_MAX); + + parms.tf_type = HWRM_TF_SESSION_OPEN; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = TF_KONG_MB; + + rc = tfp_send_msg_direct(tfp, + &parms); + if (rc) + return rc; + + *fw_session_id = resp.fw_session_id; + + return rc; +} + +/** + * Sends session query config request to TF Firmware + */ +int +tf_msg_session_qcfg(struct tf *tfp) +{ + int rc; + struct hwrm_tf_session_qcfg_input req = { 0 }; + struct hwrm_tf_session_qcfg_output resp = { 0 }; + struct tf_session *tfs = (struct tf_session *)(tfp->session->core_data); + struct tfp_send_msg_parms parms = { 0 }; + + /* Populate the request */ + req.fw_session_id = + tfp_cpu_to_le_32(tfs->session_id.internal.fw_session_id); + + parms.tf_type = HWRM_TF_SESSION_QCFG, + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = TF_KONG_MB; + + rc = tfp_send_msg_direct(tfp, + &parms); + return rc; +} diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h new file mode 100644 index 0000000000..20ebf2e466 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#ifndef _TF_MSG_H_ +#define _TF_MSG_H_ + +#include "tf_rm.h" + +struct tf; + +/** + * Sends session open request to Firmware + * + * [in] session + * Pointer to session handle + * + * [in] ctrl_chan_name + * PCI name of the control channel + * + * [in/out] fw_session_id + * Pointer to the fw_session_id that is allocated on firmware side + * + * Returns: + * + */ +int tf_msg_session_open(struct tf *tfp, + char *ctrl_chan_name, + uint8_t *fw_session_id); + +/** + * Sends session query config request to TF Firmware + */ +int tf_msg_session_qcfg(struct tf *tfp); + +/** + * Sends session HW resource query capability request to TF Firmware + */ +int tf_msg_session_hw_resc_qcaps(struct tf *tfp, + enum tf_dir dir, + struct tf_rm_hw_query *hw_query); + +#endif /* _TF_MSG_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_msg_common.h b/drivers/net/bnxt/tf_core/tf_msg_common.h new file mode 100644 index 0000000000..7a4e825615 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_msg_common.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#ifndef _TF_MSG_COMMON_H_ +#define _TF_MSG_COMMON_H_ + +/* Communication Mailboxes */ +#define TF_CHIMP_MB 0 +#define TF_KONG_MB 1 + +/* Helper to fill in the parms structure */ +#define MSG_PREP(parms, mb, type, subtype, req, resp) do { \ + parms.mailbox = mb; \ + parms.tf_type = type; \ + parms.tf_subtype = subtype; \ + parms.tf_resp_code = 0; \ + parms.req_size = sizeof(req); \ + parms.req_data = (uint32_t *)&(req); \ + parms.resp_size = sizeof(resp); \ + parms.resp_data = (uint32_t *)&(resp); \ + } while (0) + +#define MSG_PREP_NO_REQ(parms, mb, type, subtype, resp) do { \ + parms.mailbox = mb; \ + parms.tf_type = type; \ + parms.tf_subtype = subtype; \ + parms.tf_resp_code = 0; \ + parms.req_size = 0; \ + parms.req_data = NULL; \ + parms.resp_size = sizeof(resp); \ + parms.resp_data = (uint32_t *)&(resp); \ + } while (0) + +#define MSG_PREP_NO_RESP(parms, mb, type, subtype, req) do { \ + parms.mailbox = mb; \ + parms.tf_type = type; \ + parms.tf_subtype = subtype; \ + parms.tf_resp_code = 0; \ + parms.req_size = sizeof(req); \ + parms.req_data = (uint32_t *)&(req); \ + parms.resp_size = 0; \ + parms.resp_data = NULL; \ + } while (0) + +#endif /* _TF_MSG_COMMON_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_project.h b/drivers/net/bnxt/tf_core/tf_project.h new file mode 100644 index 0000000000..ab5f113d87 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_project.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#ifndef _TF_PROJECT_H_ +#define _TF_PROJECT_H_ + +/* Wh+ support enabled */ +#ifndef TF_SUPPORT_P4 +#define TF_SUPPORT_P4 1 +#endif + +/* Shadow DB Support */ +#ifndef TF_SHADOW +#define TF_SHADOW 0 +#endif + +/* Shared memory for session */ +#ifndef TF_SHARED +#define TF_SHARED 0 +#endif + +#endif /* _TF_PROJECT_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_resources.h b/drivers/net/bnxt/tf_core/tf_resources.h new file mode 100644 index 0000000000..160abac0a8 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_resources.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#ifndef _TF_RESOURCES_H_ +#define _TF_RESOURCES_H_ + +/* + * Hardware specific MAX values + * NOTE: Should really come from the chip_cfg.h in some MAX form or HCAPI + */ + +/** HW Resource types + */ +enum tf_resource_type_hw { + /* Common HW resources for all chip variants */ + TF_RESC_TYPE_HW_L2_CTXT_TCAM, + TF_RESC_TYPE_HW_PROF_FUNC, + TF_RESC_TYPE_HW_PROF_TCAM, + TF_RESC_TYPE_HW_EM_PROF_ID, + TF_RESC_TYPE_HW_EM_REC, + TF_RESC_TYPE_HW_WC_TCAM_PROF_ID, + TF_RESC_TYPE_HW_WC_TCAM, + TF_RESC_TYPE_HW_METER_PROF, + TF_RESC_TYPE_HW_METER_INST, + TF_RESC_TYPE_HW_MIRROR, + TF_RESC_TYPE_HW_UPAR, + /* Wh+/Brd2 specific HW resources */ + TF_RESC_TYPE_HW_SP_TCAM, + /* Brd2/Brd4 specific HW resources */ + TF_RESC_TYPE_HW_L2_FUNC, + /* Brd3, Brd4 common HW resources */ + TF_RESC_TYPE_HW_FKB, + /* Brd4 specific HW resources */ + TF_RESC_TYPE_HW_TBL_SCOPE, + TF_RESC_TYPE_HW_EPOCH0, + TF_RESC_TYPE_HW_EPOCH1, + TF_RESC_TYPE_HW_METADATA, + TF_RESC_TYPE_HW_CT_STATE, + TF_RESC_TYPE_HW_RANGE_PROF, + TF_RESC_TYPE_HW_RANGE_ENTRY, + TF_RESC_TYPE_HW_LAG_ENTRY, + TF_RESC_TYPE_HW_MAX +}; +#endif /* _TF_RESOURCES_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_rm.h b/drivers/net/bnxt/tf_core/tf_rm.h new file mode 100644 index 0000000000..5164d6bbb9 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_rm.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#ifndef TF_RM_H_ +#define TF_RM_H_ + +#include "tf_resources.h" +#include "tf_core.h" + +struct tf; +struct tf_session; + +/** + * Resource query single entry + */ +struct tf_rm_query_entry { + /** Minimum guaranteed number of elements */ + uint16_t min; + /** Maximum non-guaranteed number of elements */ + uint16_t max; +}; + +/** + * Resource query array of HW entities + */ +struct tf_rm_hw_query { + /** array of HW resource entries */ + struct tf_rm_query_entry hw_query[TF_RESC_TYPE_HW_MAX]; +}; + +#endif /* TF_RM_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h new file mode 100644 index 0000000000..32e53c04b0 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_session.h @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#ifndef _TF_SESSION_H_ +#define _TF_SESSION_H_ + +#include +#include + +#include "tf_core.h" +#include "tf_rm.h" + +/** Session defines + */ +#define TF_SESSIONS_MAX 1 /** max # sessions */ +#define TF_SESSION_ID_INVALID 0xFFFFFFFF /** Invalid Session ID define */ + +/** Session + * + * Shared memory containing private TruFlow session information. + * Through this structure the session can keep track of resource + * allocations and (if so configured) any shadow copy of flow + * information. + * + * Memory is assigned to the Truflow instance by way of + * tf_open_session. Memory is allocated and owned by i.e. ULP. + * + * Access control to this shared memory is handled by the spin_lock in + * tf_session_info. + */ +struct tf_session { + /** TrueFlow Version. Used to control the structure layout + * when sharing sessions. No guarantee that a secondary + * process would come from the same version of an executable. + */ + struct tf_session_version ver; + + /** Device type, provided by tf_open_session(). + */ + enum tf_device_type device_type; + + /** Session ID, allocated by FW on tf_open_session(). + */ + union tf_session_id session_id; + + /** + * String containing name of control channel interface to be + * used for this session to communicate with firmware. + * + * ctrl_chan_name will be used as part of a name for any + * shared memory allocation. + */ + char ctrl_chan_name[TF_SESSION_NAME_MAX]; + + /** + * Boolean controlling the use and availability of shadow + * copy. Shadow copy will allow the TruFlow Core to keep track + * of resource content on the firmware side without having to + * query firmware. Additional private session core_data will + * be allocated if this boolean is set to 'true', default + * 'false'. + * + * Size of memory depends on the NVM Resource settings for the + * control channel. + */ + bool shadow_copy; + + /** + * Session Reference Count. To keep track of functions per + * session the ref_count is incremented. There is also a + * parallel TruFlow Firmware ref_count in case the TruFlow + * Core goes away without informing the Firmware. + */ + uint8_t ref_count; + + /** CRC32 seed table */ +#define TF_LKUP_SEED_MEM_SIZE 512 + uint32_t lkup_em_seed_mem[TF_DIR_MAX][TF_LKUP_SEED_MEM_SIZE]; + /** Lookup3 init values */ + uint32_t lkup_lkup3_init_cfg[TF_DIR_MAX]; + +}; +#endif /* _TF_SESSION_H_ */ diff --git a/drivers/net/bnxt/tf_core/tfp.c b/drivers/net/bnxt/tf_core/tfp.c new file mode 100644 index 0000000000..3bce3ade1e --- /dev/null +++ b/drivers/net/bnxt/tf_core/tfp.c @@ -0,0 +1,163 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * see the individual elements. + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "tf_core.h" +#include "tfp.h" +#include "bnxt.h" +#include "bnxt_hwrm.h" +#include "tf_msg_common.h" + +/** + * Sends TruFlow msg to the TruFlow Firmware using + * a message specific HWRM message type. + * + * Returns success or failure code. + */ +int +tfp_send_msg_direct(struct tf *tfp, + struct tfp_send_msg_parms *parms) +{ + int rc = 0; + uint8_t use_kong_mb = 1; + + if (parms == NULL) + return -EINVAL; + + if (parms->mailbox == TF_CHIMP_MB) + use_kong_mb = 0; + + rc = bnxt_hwrm_tf_message_direct(container_of(tfp, + struct bnxt, + tfp), + use_kong_mb, + parms->tf_type, + parms->req_data, + parms->req_size, + parms->resp_data, + parms->resp_size); + + return rc; +} + +/** + * Sends preformatted TruFlow msg to the TruFlow Firmware using + * the Truflow tunnel HWRM message type. + * + * Returns success or failure code. + */ +int +tfp_send_msg_tunneled(struct tf *tfp, + struct tfp_send_msg_parms *parms) +{ + int rc = 0; + uint8_t use_kong_mb = 1; + + if (parms == NULL) + return -EINVAL; + + if (parms->mailbox == TF_CHIMP_MB) + use_kong_mb = 0; + + rc = bnxt_hwrm_tf_message_tunneled(container_of(tfp, + struct bnxt, + tfp), + use_kong_mb, + parms->tf_type, + parms->tf_subtype, + &parms->tf_resp_code, + parms->req_data, + parms->req_size, + parms->resp_data, + parms->resp_size); + + return rc; +} + +/** + * Allocates zero'ed memory from the heap. + * + * Returns success or failure code. + */ +int +tfp_calloc(struct tfp_calloc_parms *parms) +{ + if (parms == NULL) + return -EINVAL; + + parms->mem_va = rte_zmalloc("tf", + (parms->nitems * parms->size), + parms->alignment); + if (parms->mem_va == NULL) { + PMD_DRV_LOG(ERR, "Allocate failed mem_va\n"); + return -ENOMEM; + } + + parms->mem_pa = (void *)((uintptr_t)rte_mem_virt2iova(parms->mem_va)); + if (parms->mem_pa == (void *)((uintptr_t)RTE_BAD_IOVA)) { + PMD_DRV_LOG(ERR, "Allocate failed mem_pa\n"); + return -ENOMEM; + } + + return 0; +} + +/** + * Frees the memory space pointed to by the provided pointer. The + * pointer must have been returned from the tfp_calloc(). + */ +void +tfp_free(void *addr) +{ + rte_free(addr); +} + +/** + * Copies n bytes from src memory to dest memory. The memory areas + * must not overlap. + */ +void +tfp_memcpy(void *dest, void *src, size_t n) +{ + rte_memcpy(dest, src, n); +} + +/** + * Used to initialize portable spin lock + */ +void +tfp_spinlock_init(struct tfp_spinlock_parms *parms) +{ + rte_spinlock_init(&parms->slock); +} + +/** + * Used to lock portable spin lock + */ +void +tfp_spinlock_lock(struct tfp_spinlock_parms *parms) +{ + rte_spinlock_lock(&parms->slock); +} + +/** + * Used to unlock portable spin lock + */ +void +tfp_spinlock_unlock(struct tfp_spinlock_parms *parms) +{ + rte_spinlock_unlock(&parms->slock); +} diff --git a/drivers/net/bnxt/tf_core/tfp.h b/drivers/net/bnxt/tf_core/tfp.h new file mode 100644 index 0000000000..8d5e94e1a1 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tfp.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Broadcom + * All rights reserved. + */ + +/* This header file defines the Portability structures and APIs for + * TruFlow. + */ + +#ifndef _TFP_H_ +#define _TFP_H_ + +#include + +/** Spinlock + */ +struct tfp_spinlock_parms { + rte_spinlock_t slock; +}; + +/** + * @file + * + * TrueFlow Portability API Header File + */ + +/** send message parameter definition + */ +struct tfp_send_msg_parms { + /** + * [in] mailbox, specifying the Mailbox to send the command on. + */ + uint32_t mailbox; + /** + * [in] tlv_subtype, specifies the tlv_type. + */ + uint16_t tf_type; + /** + * [in] tlv_subtype, specifies the tlv_subtype. + */ + uint16_t tf_subtype; + /** + * [out] tf_resp_code, response code from the internal tlv + * message. Only supported on tunneled messages. + */ + uint32_t tf_resp_code; + /** + * [out] size, number specifying the request size of the data in bytes + */ + uint32_t req_size; + /** + * [in] data, pointer to the data to be sent within the HWRM command + */ + uint32_t *req_data; + /** + * [out] size, number specifying the response size of the data in bytes + */ + uint32_t resp_size; + /** + * [out] data, pointer to the data to be sent within the HWRM command + */ + uint32_t *resp_data; +}; + +/** calloc parameter definition + */ +struct tfp_calloc_parms { + /** + * [in] nitems, number specifying number of items to allocate. + */ + size_t nitems; + /** + * [in] size, number specifying the size of each memory item + * requested. Size is in bytes. + */ + size_t size; + /** + * [in] alignment, number indicates byte alignment required. 0 + * - don't care, 16 - 16 byte alignment, 4K - 4K alignment etc + */ + size_t alignment; + /** + * [out] mem_va, pointer to the allocated memory. + */ + void *mem_va; + /** + * [out] mem_pa, physical address of the allocated memory. + */ + void *mem_pa; +}; + +/** + * @page Portability + * + * @ref tfp_send_direct + * @ref tfp_send_msg_tunneled + * + * @ref tfp_calloc + * @ref tfp_free + * @ref tfp_memcpy + * + * @ref tfp_spinlock_init + * @ref tfp_spinlock_lock + * @ref tfp_spinlock_unlock + * + * @ref tfp_cpu_to_le_16 + * @ref tfp_le_to_cpu_16 + * @ref tfp_cpu_to_le_32 + * @ref tfp_le_to_cpu_32 + * @ref tfp_cpu_to_le_64 + * @ref tfp_le_to_cpu_64 + * @ref tfp_cpu_to_be_16 + * @ref tfp_be_to_cpu_16 + * @ref tfp_cpu_to_be_32 + * @ref tfp_be_to_cpu_32 + * @ref tfp_cpu_to_be_64 + * @ref tfp_be_to_cpu_64 + */ + +#define tfp_cpu_to_le_16(val) rte_cpu_to_le_16(val) +#define tfp_le_to_cpu_16(val) rte_le_to_cpu_16(val) +#define tfp_cpu_to_le_32(val) rte_cpu_to_le_32(val) +#define tfp_le_to_cpu_32(val) rte_le_to_cpu_32(val) +#define tfp_cpu_to_le_64(val) rte_cpu_to_le_64(val) +#define tfp_le_to_cpu_64(val) rte_le_to_cpu_64(val) +#define tfp_cpu_to_be_16(val) rte_cpu_to_be_16(val) +#define tfp_be_to_cpu_16(val) rte_be_to_cpu_16(val) +#define tfp_cpu_to_be_32(val) rte_cpu_to_be_32(val) +#define tfp_be_to_cpu_32(val) rte_be_to_cpu_32(val) +#define tfp_cpu_to_be_64(val) rte_cpu_to_be_64(val) +#define tfp_be_to_cpu_64(val) rte_be_to_cpu_64(val) +#define tfp_bswap_16(val) rte_bswap16(val) +#define tfp_bswap_32(val) rte_bswap32(val) +#define tfp_bswap_64(val) rte_bswap64(val) + +/** + * Provides communication capability from the TrueFlow API layer to + * the TrueFlow firmware. The portability layer internally provides + * the transport to the firmware. + * + * [in] session, pointer to session handle + * [in] parms, parameter structure + * + * Returns: + * 0 - Success + * -1 - Global error like not supported + * -EINVAL - Parameter Error + */ +int tfp_send_msg_direct(struct tf *tfp, + struct tfp_send_msg_parms *parms); + +/** + * Provides communication capability from the TrueFlow API layer to + * the TrueFlow firmware. The portability layer internally provides + * the transport to the firmware. + * + * [in] session, pointer to session handle + * [in] parms, parameter structure + * + * Returns: + * 0 - Success + * -1 - Global error like not supported + * -EINVAL - Parameter Error + */ +int tfp_send_msg_tunneled(struct tf *tfp, + struct tfp_send_msg_parms *parms); + +/** + * Allocates zero'ed memory from the heap. + * + * NOTE: Also performs virt2phy address conversion by default thus is + * can be expensive to invoke. + * + * [in] parms, parameter structure + * + * Returns: + * 0 - Success + * -ENOMEM - No memory available + * -EINVAL - Parameter error + */ +int tfp_calloc(struct tfp_calloc_parms *parms); + +void tfp_free(void *addr); +void tfp_memcpy(void *dest, void *src, size_t n); +void tfp_spinlock_init(struct tfp_spinlock_parms *slock); +void tfp_spinlock_lock(struct tfp_spinlock_parms *slock); +void tfp_spinlock_unlock(struct tfp_spinlock_parms *slock); +#endif /* _TFP_H_ */