From: Jeff Guo <jia.guo@intel.com>
Date: Wed, 7 Sep 2016 09:38:40 +0000 (-0400)
Subject: net/i40e: add packet type translation for X722
X-Git-Tag: spdx-start~5886
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=8c5cb3c11513dc47b81ee2ee7f6153dff46ec5a1;p=dpdk.git

net/i40e: add packet type translation for X722

To make the PCTYPE in x722 compatible with original PCTYPE in
flow director (FD) filters, the PCTYPE in the FD programming
descriptor needs to be translated into a different PCTYPE using
GLQF_FD_PCTYPE table.
Translation needs to be done before the FD filter is programmed.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
---

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 7fa9ef2c4b..784635c116 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -7719,7 +7719,16 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw,
 		PMD_DRV_LOG(ERR, "invalid flow_type input.");
 		return -EINVAL;
 	}
+
+#ifdef X722_SUPPORT
+	/* get translated pctype value in fd pctype register */
+	pctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(hw,
+		I40E_GLQF_FD_PCTYPES((int)i40e_flowtype_to_pctype(
+		conf->flow_type)));
+#else
 	pctype = i40e_flowtype_to_pctype(conf->flow_type);
+#endif
+
 	ret = i40e_parse_input_set(&input_set, pctype, conf->field,
 				   conf->inset_size);
 	if (ret) {
@@ -7788,7 +7797,9 @@ i40e_fdir_filter_inset_select(struct i40e_pf *pf,
 		PMD_DRV_LOG(ERR, "invalid flow_type input.");
 		return -EINVAL;
 	}
+
 	pctype = i40e_flowtype_to_pctype(conf->flow_type);
+
 	ret = i40e_parse_input_set(&input_set, pctype, conf->field,
 				   conf->inset_size);
 	if (ret) {
diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c
index a4efc6d886..5a737ab126 100644
--- a/drivers/net/i40e/i40e_fdir.c
+++ b/drivers/net/i40e/i40e_fdir.c
@@ -664,7 +664,14 @@ i40e_fdir_configure(struct rte_eth_dev *dev)
 		i40e_set_flx_pld_cfg(pf, &conf->flex_set[i]);
 	/* configure flex mask*/
 	for (i = 0; i < conf->nb_flexmasks; i++) {
+#ifdef X722_SUPPORT
+		/* get translated pctype value in fd pctype register */
+		pctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(hw,
+			I40E_GLQF_FD_PCTYPES((int)i40e_flowtype_to_pctype(
+			conf->flex_mask[i].flow_type)));
+#else
 		pctype = i40e_flowtype_to_pctype(conf->flex_mask[i].flow_type);
+#endif
 		i40e_set_flex_mask_on_pctype(pf, pctype, &conf->flex_mask[i]);
 	}
 
@@ -1012,6 +1019,7 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
 			    const struct rte_eth_fdir_filter *filter,
 			    bool add)
 {
+	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 	unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
 	enum i40e_filter_pctype pctype;
@@ -1044,7 +1052,16 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
 		PMD_DRV_LOG(ERR, "construct packet for fdir fails.");
 		return ret;
 	}
+
+#ifdef X722_SUPPORT
+	/* get translated pctype value in fd pctype register */
+	pctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(hw,
+		I40E_GLQF_FD_PCTYPES((int)i40e_flowtype_to_pctype(
+		filter->input.flow_type)));
+#else
 	pctype = i40e_flowtype_to_pctype(filter->input.flow_type);
+#endif
+
 	ret = i40e_fdir_filter_programming(pf, pctype, filter, add);
 	if (ret < 0) {
 		PMD_DRV_LOG(ERR, "fdir programming fails for PCTYPE(%u).",