From: Andrew Rybchenko <arybchenko@solarflare.com>
Date: Thu, 24 Sep 2020 12:11:53 +0000 (+0100)
Subject: common/sfc_efx/base: add interrupts module for Riverhead
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=90ff7b9bf4910715feb29bb96308f162c6ada397;p=dpdk.git

common/sfc_efx/base: add interrupts module for Riverhead

Riverhead supports interrupt aggregation rings. Right now there
are no plans to support it in libefx, but it is better to have
own set of callbacks to easier handle EF10 and Riverhead
differences in the future.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
---

diff --git a/drivers/common/sfc_efx/base/efx_intr.c b/drivers/common/sfc_efx/base/efx_intr.c
index 7e3cc3c6a0..1dfa19df2e 100644
--- a/drivers/common/sfc_efx/base/efx_intr.c
+++ b/drivers/common/sfc_efx/base/efx_intr.c
@@ -89,6 +89,20 @@ static const efx_intr_ops_t	__efx_intr_ef10_ops = {
 };
 #endif	/* EFX_OPTS_EF10() */
 
+#if EFSYS_OPT_RIVERHEAD
+static const efx_intr_ops_t	__efx_intr_rhead_ops = {
+	rhead_intr_init,		/* eio_init */
+	rhead_intr_enable,		/* eio_enable */
+	rhead_intr_disable,		/* eio_disable */
+	rhead_intr_disable_unlocked,	/* eio_disable_unlocked */
+	rhead_intr_trigger,		/* eio_trigger */
+	rhead_intr_status_line,		/* eio_status_line */
+	rhead_intr_status_message,	/* eio_status_message */
+	rhead_intr_fatal,		/* eio_fatal */
+	rhead_intr_fini,		/* eio_fini */
+};
+#endif	/* EFSYS_OPT_RIVERHEAD */
+
 	__checkReturn	efx_rc_t
 efx_intr_init(
 	__in		efx_nic_t *enp,
@@ -138,6 +152,12 @@ efx_intr_init(
 		break;
 #endif	/* EFSYS_OPT_MEDFORD2 */
 
+#if EFSYS_OPT_RIVERHEAD
+	case EFX_FAMILY_RIVERHEAD:
+		eiop = &__efx_intr_rhead_ops;
+		break;
+#endif	/* EFSYS_OPT_RIVERHEAD */
+
 	default:
 		EFSYS_ASSERT(B_FALSE);
 		rc = ENOTSUP;
diff --git a/drivers/common/sfc_efx/base/meson.build b/drivers/common/sfc_efx/base/meson.build
index 6ca5b57023..ea2517ba26 100644
--- a/drivers/common/sfc_efx/base/meson.build
+++ b/drivers/common/sfc_efx/base/meson.build
@@ -52,6 +52,7 @@ sources = [
 	'hunt_nic.c',
 	'medford_nic.c',
 	'medford2_nic.c',
+	'rhead_intr.c',
 	'rhead_nic.c',
 ]
 
diff --git a/drivers/common/sfc_efx/base/rhead_impl.h b/drivers/common/sfc_efx/base/rhead_impl.h
index e25a871cb3..b95302a13f 100644
--- a/drivers/common/sfc_efx/base/rhead_impl.h
+++ b/drivers/common/sfc_efx/base/rhead_impl.h
@@ -98,6 +98,61 @@ rhead_nic_unprobe(
 	__in		efx_nic_t *enp);
 
 
+/* INTR */
+
+LIBEFX_INTERNAL
+extern	__checkReturn	efx_rc_t
+rhead_intr_init(
+	__in		efx_nic_t *enp,
+	__in		efx_intr_type_t type,
+	__in		efsys_mem_t *esmp);
+
+LIBEFX_INTERNAL
+extern			void
+rhead_intr_enable(
+	__in		efx_nic_t *enp);
+
+LIBEFX_INTERNAL
+extern			void
+rhead_intr_disable(
+	__in		efx_nic_t *enp);
+
+LIBEFX_INTERNAL
+extern			void
+rhead_intr_disable_unlocked(
+	__in		efx_nic_t *enp);
+
+LIBEFX_INTERNAL
+extern	__checkReturn	efx_rc_t
+rhead_intr_trigger(
+	__in		efx_nic_t *enp,
+	__in		unsigned int level);
+
+LIBEFX_INTERNAL
+extern			void
+rhead_intr_status_line(
+	__in		efx_nic_t *enp,
+	__out		boolean_t *fatalp,
+	__out		uint32_t *qmaskp);
+
+LIBEFX_INTERNAL
+extern			void
+rhead_intr_status_message(
+	__in		efx_nic_t *enp,
+	__in		unsigned int message,
+	__out		boolean_t *fatalp);
+
+LIBEFX_INTERNAL
+extern			void
+rhead_intr_fatal(
+	__in		efx_nic_t *enp);
+
+LIBEFX_INTERNAL
+extern			void
+rhead_intr_fini(
+	__in		efx_nic_t *enp);
+
+
 #ifdef	__cplusplus
 }
 #endif
diff --git a/drivers/common/sfc_efx/base/rhead_intr.c b/drivers/common/sfc_efx/base/rhead_intr.c
new file mode 100644
index 0000000000..08c770529f
--- /dev/null
+++ b/drivers/common/sfc_efx/base/rhead_intr.c
@@ -0,0 +1,104 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2018-2019 Solarflare Communications Inc.
+ */
+
+#include "efx.h"
+#include "efx_impl.h"
+
+
+#if EFSYS_OPT_RIVERHEAD
+
+	__checkReturn	efx_rc_t
+rhead_intr_init(
+	__in		efx_nic_t *enp,
+	__in		efx_intr_type_t type,
+	__in		efsys_mem_t *esmp)
+{
+	_NOTE(ARGUNUSED(enp, type, esmp))
+
+	return (0);
+}
+
+
+			void
+rhead_intr_enable(
+	__in		efx_nic_t *enp)
+{
+	_NOTE(ARGUNUSED(enp))
+}
+
+
+			void
+rhead_intr_disable(
+	__in		efx_nic_t *enp)
+{
+	_NOTE(ARGUNUSED(enp))
+}
+
+
+			void
+rhead_intr_disable_unlocked(
+	__in		efx_nic_t *enp)
+{
+	_NOTE(ARGUNUSED(enp))
+}
+
+	__checkReturn	efx_rc_t
+rhead_intr_trigger(
+	__in		efx_nic_t *enp,
+	__in		unsigned int level)
+{
+	_NOTE(ARGUNUSED(enp, level))
+
+	return (ENOTSUP);
+}
+
+			void
+rhead_intr_status_line(
+	__in		efx_nic_t *enp,
+	__out		boolean_t *fatalp,
+	__out		uint32_t *qmaskp)
+{
+	_NOTE(ARGUNUSED(enp, qmaskp))
+
+	/*
+	 * Riverhead does not support line interrupts,
+	 * so this function should never be called.
+	 */
+
+	/* Fatal errors are reported via events */
+	*fatalp = B_FALSE;
+}
+
+			void
+rhead_intr_status_message(
+	__in		efx_nic_t *enp,
+	__in		unsigned int message,
+	__out		boolean_t *fatalp)
+{
+	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_RIVERHEAD);
+
+	_NOTE(ARGUNUSED(enp, message))
+
+	/* Fatal errors are reported via events */
+	*fatalp = B_FALSE;
+}
+
+			void
+rhead_intr_fatal(
+	__in		efx_nic_t *enp)
+{
+	/* Fatal errors are reported via events */
+	_NOTE(ARGUNUSED(enp))
+}
+
+			void
+rhead_intr_fini(
+	__in		efx_nic_t *enp)
+{
+	_NOTE(ARGUNUSED(enp))
+}
+
+#endif	/* EFSYS_OPT_RIVERHEAD */