From: Jijiang Liu Date: Wed, 18 Jun 2014 10:23:28 +0000 (+0200) Subject: e1000/base: minor changes X-Git-Tag: spdx-start~10658 X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=917dde4981272106502670867f672ee2c1275942;p=dpdk.git e1000/base: minor changes Signed-off-by: Jijiang Liu Acked-by: Helin Zhang Tested-by: Waterman Cao [Thomas: split code drop] --- diff --git a/lib/librte_pmd_e1000/e1000/e1000_80003es2lan.c b/lib/librte_pmd_e1000/e1000/e1000_80003es2lan.c index 60d7c2af28..42cb71601b 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_80003es2lan.c +++ b/lib/librte_pmd_e1000/e1000/e1000_80003es2lan.c @@ -58,16 +58,16 @@ STATIC s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw); STATIC s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw); STATIC s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw); STATIC void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw); -static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask); -static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex); -static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw); -static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw); -static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, +STATIC s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask); +STATIC s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex); +STATIC s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw); +STATIC s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw); +STATIC s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 *data); -static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, +STATIC s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 data); -static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw); -static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask); +STATIC void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw); +STATIC void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask); STATIC s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw); STATIC void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw); @@ -75,7 +75,7 @@ STATIC void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw); * with a lower bound at "index" and the upper bound at * "index + 5". */ -static const u16 e1000_gg82563_cable_length_table[] = { +STATIC const u16 e1000_gg82563_cable_length_table[] = { 0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF }; #define GG82563_CABLE_LENGTH_TABLE_SIZE \ (sizeof(e1000_gg82563_cable_length_table) / \ @@ -398,7 +398,7 @@ STATIC void e1000_release_nvm_80003es2lan(struct e1000_hw *hw) * Acquire the SW/FW semaphore to access the PHY or NVM. The mask * will also specify which port we're acquiring the lock for. **/ -static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask) +STATIC s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask) { u32 swfw_sync; u32 swmask = mask; @@ -445,7 +445,7 @@ static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask) * Release the SW/FW semaphore used to access the PHY or NVM. The mask * will also specify which port we're releasing the lock for. **/ -static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask) +STATIC void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask) { u32 swfw_sync; @@ -977,7 +977,7 @@ STATIC s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) * * Initializes required hardware-dependent bits needed for normal operation. **/ -static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw) +STATIC void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw) { u32 reg; @@ -1024,7 +1024,7 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw) * * Setup some GG82563 PHY registers for obtaining link **/ -static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw) +STATIC s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw) { struct e1000_phy_info *phy = &hw->phy; s32 ret_val; @@ -1231,7 +1231,7 @@ STATIC s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw) * Configure the KMRN interface by applying last minute quirks for * 10/100 operation. **/ -static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw) +STATIC s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw) { s32 ret_val = E1000_SUCCESS; u16 speed; @@ -1262,7 +1262,7 @@ static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw) * Configure the KMRN interface by applying last minute quirks for * 10/100 operation. **/ -static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex) +STATIC s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex) { s32 ret_val; u32 tipg; @@ -1313,7 +1313,7 @@ static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex) * Configure the KMRN interface by applying last minute quirks for * gigabit operation. **/ -static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw) +STATIC s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw) { s32 ret_val; u16 reg_data, reg_data2; @@ -1364,7 +1364,7 @@ static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw) * using the kumeran interface. The information retrieved is stored in data. * Release the semaphore before exiting. **/ -static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, +STATIC s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 *data) { u32 kmrnctrlsta; @@ -1401,7 +1401,7 @@ static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, * at the offset using the kumeran interface. Release semaphore * before exiting. **/ -static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, +STATIC s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 data) { u32 kmrnctrlsta; diff --git a/lib/librte_pmd_e1000/e1000/e1000_82540.c b/lib/librte_pmd_e1000/e1000/e1000_82540.c index 451928d3f5..2944f92a35 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_82540.c +++ b/lib/librte_pmd_e1000/e1000/e1000_82540.c @@ -47,12 +47,12 @@ POSSIBILITY OF SUCH DAMAGE. STATIC s32 e1000_init_phy_params_82540(struct e1000_hw *hw); STATIC s32 e1000_init_nvm_params_82540(struct e1000_hw *hw); STATIC s32 e1000_init_mac_params_82540(struct e1000_hw *hw); -static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw); +STATIC s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw); STATIC void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw); STATIC s32 e1000_init_hw_82540(struct e1000_hw *hw); STATIC s32 e1000_reset_hw_82540(struct e1000_hw *hw); -static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw); -static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw); +STATIC s32 e1000_set_phy_mode_82540(struct e1000_hw *hw); +STATIC s32 e1000_set_vco_speed_82540(struct e1000_hw *hw); STATIC s32 e1000_setup_copper_link_82540(struct e1000_hw *hw); STATIC s32 e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw); STATIC void e1000_power_down_phy_copper_82540(struct e1000_hw *hw); @@ -495,7 +495,7 @@ out: * * Adjust the SERDES output amplitude based on the EEPROM settings. **/ -static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw) +STATIC s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw) { s32 ret_val = E1000_SUCCESS; u16 nvm_data; @@ -525,7 +525,7 @@ out: * * Set the VCO speed to improve Bit Error Rate (BER) performance. **/ -static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw) +STATIC s32 e1000_set_vco_speed_82540(struct e1000_hw *hw) { s32 ret_val = E1000_SUCCESS; u16 default_page = 0; @@ -584,7 +584,7 @@ out: * 1. Do a PHY soft reset. * 2. Restart auto-negotiation or force link. **/ -static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw) +STATIC s32 e1000_set_phy_mode_82540(struct e1000_hw *hw) { s32 ret_val = E1000_SUCCESS; u16 nvm_data; diff --git a/lib/librte_pmd_e1000/e1000/e1000_82541.c b/lib/librte_pmd_e1000/e1000/e1000_82541.c index 6f47096ff3..dbea387b7a 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_82541.c +++ b/lib/librte_pmd_e1000/e1000/e1000_82541.c @@ -58,12 +58,12 @@ STATIC s32 e1000_set_d3_lplu_state_82541(struct e1000_hw *hw, STATIC s32 e1000_setup_led_82541(struct e1000_hw *hw); STATIC s32 e1000_cleanup_led_82541(struct e1000_hw *hw); STATIC void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw); -static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw, +STATIC s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw, bool link_up); -static s32 e1000_phy_init_script_82541(struct e1000_hw *hw); +STATIC s32 e1000_phy_init_script_82541(struct e1000_hw *hw); STATIC void e1000_power_down_phy_copper_82541(struct e1000_hw *hw); -static const u16 e1000_igp_cable_length_table[] = { +STATIC const u16 e1000_igp_cable_length_table[] = { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 25, 25, 25, 25, 25, 25, 25, 30, 30, 30, 30, 40, 40, 40, 40, 40, 40, 40, 40, 40, 50, 50, 50, 50, 50, 50, 50, 60, 60, @@ -661,7 +661,7 @@ out: * 82541_rev_2 & 82547_rev_2 have the capability to configure the DSP when a * gigabit link is achieved to improve link quality. **/ -static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw, +STATIC s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw, bool link_up) { struct e1000_phy_info *phy = &hw->phy; @@ -1084,7 +1084,7 @@ out: * * Initializes the IGP PHY. **/ -static s32 e1000_phy_init_script_82541(struct e1000_hw *hw) +STATIC s32 e1000_phy_init_script_82541(struct e1000_hw *hw) { struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541; u32 ret_val; diff --git a/lib/librte_pmd_e1000/e1000/e1000_82543.c b/lib/librte_pmd_e1000/e1000/e1000_82543.c index da76965402..e666c26ff2 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_82543.c +++ b/lib/librte_pmd_e1000/e1000/e1000_82543.c @@ -63,16 +63,16 @@ STATIC s32 e1000_led_off_82543(struct e1000_hw *hw); STATIC void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value); STATIC void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw); -static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw); -static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw); -static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl); -static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw); -static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl); -static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw); -static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data, +STATIC s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw); +STATIC bool e1000_init_phy_disabled_82543(struct e1000_hw *hw); +STATIC void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl); +STATIC s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw); +STATIC void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl); +STATIC u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw); +STATIC void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data, u16 count); -static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw); -static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state); +STATIC bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw); +STATIC void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state); /** * e1000_init_phy_params_82543 - Init PHY func ptrs. @@ -277,7 +277,7 @@ void e1000_init_function_pointers_82543(struct e1000_hw *hw) * Returns the current status of 10-bit Interface (TBI) compatibility * (enabled/disabled). **/ -static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw) +STATIC bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw) { struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; bool state = false; @@ -354,7 +354,7 @@ out: * * Enables or disabled 10-bit Interface (TBI) store bad packet (SBP). **/ -static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state) +STATIC void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state) { struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; @@ -375,7 +375,7 @@ static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state) * Returns the current status of whether PHY initialization is disabled. * True if PHY initialization is disabled else false. **/ -static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw) +STATIC bool e1000_init_phy_disabled_82543(struct e1000_hw *hw) { struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543; bool ret_val; @@ -582,7 +582,7 @@ out: * Raise the management data input clock by setting the MDC bit in the control * register. **/ -static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl) +STATIC void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl) { /* * Raise the clock input to the Management Data Clock (by setting the @@ -601,7 +601,7 @@ static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl) * Lower the management data input clock by clearing the MDC bit in the * control register. **/ -static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl) +STATIC void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl) { /* * Lower the clock input to the Management Data Clock (by clearing the @@ -622,7 +622,7 @@ static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl) * "data" parameter will be shifted out to the PHY one bit at a time. * In order to do this, "data" must be broken down into bits. **/ -static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data, +STATIC void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data, u16 count) { u32 ctrl, mask; @@ -674,7 +674,7 @@ static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data, * the PHY (setting the MDC bit), and then reading the value of the data out * MDIO bit. **/ -static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw) +STATIC u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw) { u32 ctrl; u16 data = 0; @@ -759,7 +759,7 @@ out: * inadvertently. To workaround the issue, we disable the transmitter on * the PHY until we have established the link partner's link parameters. **/ -static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw) +STATIC s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw) { s32 ret_val = E1000_SUCCESS; u16 mii_status_reg; @@ -1395,7 +1395,7 @@ out: * For the 82543 silicon, we need to set the MAC to match the settings * of the PHY, even if the PHY is auto-negotiating. **/ -static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw) +STATIC s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw) { u32 ctrl; s32 ret_val = E1000_SUCCESS; diff --git a/lib/librte_pmd_e1000/e1000/e1000_82571.c b/lib/librte_pmd_e1000/e1000/e1000_82571.c index 5ff6c84041..e5f56bb7b4 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_82571.c +++ b/lib/librte_pmd_e1000/e1000/e1000_82571.c @@ -69,19 +69,19 @@ STATIC s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw); STATIC s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw); STATIC s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data); STATIC void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw); -static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw); -static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw); -static s32 e1000_get_phy_id_82571(struct e1000_hw *hw); -static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw); -static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw); -static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw); -static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw); +STATIC s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw); +STATIC s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw); +STATIC s32 e1000_get_phy_id_82571(struct e1000_hw *hw); +STATIC void e1000_put_hw_semaphore_82571(struct e1000_hw *hw); +STATIC void e1000_put_hw_semaphore_82573(struct e1000_hw *hw); +STATIC s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw); +STATIC void e1000_put_hw_semaphore_82574(struct e1000_hw *hw); STATIC s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active); STATIC s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active); -static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw); -static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, +STATIC void e1000_initialize_hw_bits_82571(struct e1000_hw *hw); +STATIC s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); STATIC s32 e1000_read_mac_addr_82571(struct e1000_hw *hw); STATIC void e1000_power_down_phy_copper_82571(struct e1000_hw *hw); @@ -460,7 +460,7 @@ void e1000_init_function_pointers_82571(struct e1000_hw *hw) * Reads the PHY registers and stores the PHY ID and possibly the PHY * revision in the hardware structure. **/ -static s32 e1000_get_phy_id_82571(struct e1000_hw *hw) +STATIC s32 e1000_get_phy_id_82571(struct e1000_hw *hw) { struct e1000_phy_info *phy = &hw->phy; s32 ret_val; @@ -510,7 +510,7 @@ static s32 e1000_get_phy_id_82571(struct e1000_hw *hw) * * Acquire the HW semaphore to access the PHY or NVM **/ -static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw) +STATIC s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw) { u32 swsm; s32 sw_timeout = hw->nvm.word_size + 1; @@ -571,7 +571,7 @@ static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw) * * Release hardware semaphore used to access the PHY or NVM **/ -static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw) +STATIC void e1000_put_hw_semaphore_82571(struct e1000_hw *hw) { u32 swsm; @@ -591,7 +591,7 @@ static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw) * Acquire the HW semaphore during reset. * **/ -static s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw) +STATIC s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw) { u32 extcnf_ctrl; s32 i = 0; @@ -628,7 +628,7 @@ static s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw) * Release hardware semaphore used during reset. * **/ -static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw) +STATIC void e1000_put_hw_semaphore_82573(struct e1000_hw *hw) { u32 extcnf_ctrl; @@ -646,7 +646,7 @@ static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw) * Acquire the HW semaphore to access the PHY or NVM. * **/ -static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw) +STATIC s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw) { s32 ret_val; @@ -666,7 +666,7 @@ static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw) * Release hardware semaphore used to access the PHY or NVM * **/ -static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw) +STATIC void e1000_put_hw_semaphore_82574(struct e1000_hw *hw) { DEBUGFUNC("e1000_put_hw_semaphore_82574"); @@ -907,7 +907,7 @@ STATIC s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw) * If e1000_update_nvm_checksum is not called after this function, the * EEPROM will most likely contain an invalid checksum. **/ -static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, +STATIC s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) { struct e1000_nvm_info *nvm = &hw->nvm; @@ -1266,7 +1266,7 @@ STATIC s32 e1000_init_hw_82571(struct e1000_hw *hw) * * Initializes required hardware-dependent bits needed for normal operation. **/ -static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) +STATIC void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) { u32 reg; @@ -1887,7 +1887,7 @@ void e1000_set_laa_state_82571(struct e1000_hw *hw, bool state) * the checksum. Otherwise, if bit 15 is set and the checksum is incorrect, * we need to return bad checksum. **/ -static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw) +STATIC s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw) { struct e1000_nvm_info *nvm = &hw->nvm; s32 ret_val; diff --git a/lib/librte_pmd_e1000/e1000/e1000_82575.c b/lib/librte_pmd_e1000/e1000/e1000_82575.c index fd15b7b18a..549db36bdd 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_82575.c +++ b/lib/librte_pmd_e1000/e1000/e1000_82575.c @@ -80,11 +80,11 @@ STATIC s32 e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset, u16 data); STATIC void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw); STATIC s32 e1000_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask); -static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, +STATIC s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, u16 *speed, u16 *duplex); -static s32 e1000_get_phy_id_82575(struct e1000_hw *hw); +STATIC s32 e1000_get_phy_id_82575(struct e1000_hw *hw); STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask); -static bool e1000_sgmii_active_82575(struct e1000_hw *hw); +STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw); STATIC s32 e1000_reset_init_script_82575(struct e1000_hw *hw); STATIC s32 e1000_read_mac_addr_82575(struct e1000_hw *hw); STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw); @@ -116,10 +116,11 @@ STATIC void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl); STATIC s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data); STATIC bool e1000_get_i2c_data(u32 *i2cctl); -static const u16 e1000_82580_rxpbs_table[] = { +STATIC const u16 e1000_82580_rxpbs_table[] = { 36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 }; #define E1000_82580_RXPBS_TABLE_SIZE \ - (sizeof(e1000_82580_rxpbs_table)/sizeof(u16)) + (sizeof(e1000_82580_rxpbs_table) / \ + sizeof(e1000_82580_rxpbs_table[0])) /** @@ -1296,7 +1297,7 @@ STATIC void e1000_power_up_serdes_link_82575(struct e1000_hw *hw) * Using the physical coding sub-layer (PCS), retrieve the current speed and * duplex, then store the values in the pointers provided. **/ -static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, +STATIC s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, u16 *speed, u16 *duplex) { struct e1000_mac_info *mac = &hw->mac; @@ -1928,7 +1929,7 @@ out: * which can be enabled for use in the embedded applications. Simply * return the current state of the sgmii interface. **/ -static bool e1000_sgmii_active_82575(struct e1000_hw *hw) +STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw) { struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; return dev_spec->sgmii_active; diff --git a/lib/librte_pmd_e1000/e1000/e1000_ich8lan.c b/lib/librte_pmd_e1000/e1000/e1000_ich8lan.c index 06995bf574..99ba605aa9 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_ich8lan.c +++ b/lib/librte_pmd_e1000/e1000/e1000_ich8lan.c @@ -66,7 +66,7 @@ POSSIBILITY OF SUCH DAMAGE. #include "e1000_api.h" -static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state); +STATIC s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state); STATIC s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw); STATIC void e1000_release_swflag_ich8lan(struct e1000_hw *hw); STATIC s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw); @@ -115,19 +115,19 @@ STATIC s32 e1000_led_on_pchlan(struct e1000_hw *hw); STATIC s32 e1000_led_off_pchlan(struct e1000_hw *hw); STATIC void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw); STATIC s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank); -static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw); -static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw); +STATIC void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw); +STATIC s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw); STATIC s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, u8 *data); -static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, +STATIC s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, u8 size, u16 *data); STATIC s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset, u16 *data); -static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, +STATIC s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, u8 byte); STATIC s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw); STATIC void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw); -static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw); +STATIC s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw); STATIC s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw); STATIC s32 e1000_k1_workaround_lv(struct e1000_hw *hw); STATIC void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate); @@ -183,7 +183,7 @@ union ich8_hws_flash_regacc { * * Assumes the sw/fw/hw semaphore is already acquired. **/ -static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) +STATIC bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) { u16 phy_reg = 0; u32 phy_id = 0; @@ -251,7 +251,7 @@ out: * Toggling the LANPHYPC pin value fully power-cycles the PHY and is * used to reset the PHY to a quiescent state when necessary. **/ -void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw) +STATIC void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw) { u32 mac_reg; @@ -295,7 +295,7 @@ void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw) * Workarounds/flow necessary for PHY initialization during driver load * and resume paths. **/ -static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) +STATIC s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) { u32 mac_reg, fwsm = E1000_READ_REG(hw, E1000_FWSM); s32 ret_val; @@ -955,7 +955,7 @@ release: * Also, set appropriate Tx re-transmission timeouts for 10 and 100Half link * speeds in order to avoid Tx hangs. **/ -static s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link) +STATIC s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link) { u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6); u32 status = E1000_READ_REG(hw, E1000_STATUS); @@ -1370,7 +1370,7 @@ out: * change in link status has been detected, then we read the PHY registers * to get the current speed/duplex if link exists. **/ -static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) +STATIC s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) { struct e1000_mac_info *mac = &hw->mac; s32 ret_val; @@ -1689,9 +1689,9 @@ STATIC bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw) fwsm = E1000_READ_REG(hw, E1000_FWSM); - return ((fwsm & E1000_ICH_FWSM_FW_VALID) && - ((fwsm & E1000_FWSM_MODE_MASK) == - (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT))); + return (fwsm & E1000_ICH_FWSM_FW_VALID) && + ((fwsm & E1000_FWSM_MODE_MASK) == + (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT)); } /** @@ -2242,7 +2242,7 @@ s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable) * collectively called OEM bits. The OEM Write Enable bit and SW Config bit * in NVM determines whether HW should configure LPLU and Gbe Disable. **/ -static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state) +STATIC s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state) { s32 ret_val = 0; u32 mac_reg; @@ -2454,7 +2454,7 @@ release: } #ifndef CRC32_OS_SUPPORT -static u32 e1000_calc_rx_da_crc(u8 mac[]) +STATIC u32 e1000_calc_rx_da_crc(u8 mac[]) { u32 poly = 0xEDB88320; /* Polynomial for 802.3 CRC calculation */ u32 i, j, mask, crc; @@ -3257,7 +3257,7 @@ out: * This function does initial flash setup so that a new read/write/erase cycle * can be started. **/ -static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) +STATIC s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) { union ich8_hws_flash_status hsfsts; s32 ret_val = -E1000_ERR_NVM; @@ -3275,7 +3275,6 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) /* Clear FCERR and DAEL in hw status by writing 1 */ hsfsts.hsf_status.flcerr = 1; hsfsts.hsf_status.dael = 1; - E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval); /* Either we should have a hardware SPI cycle in progress @@ -3331,7 +3330,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) * * This function starts a flash cycle and waits for its completion. **/ -static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout) +STATIC s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout) { union ich8_hws_flash_ctrl hsflctl; union ich8_hws_flash_status hsfsts; @@ -3342,6 +3341,7 @@ static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout) /* Start a cycle by writing 1 in Flash Cycle Go in Hw Flash Control */ hsflctl.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL); hsflctl.hsf_ctrl.flcgo = 1; + E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval); /* wait till FDONE bit is set to 1 */ @@ -3396,6 +3396,7 @@ STATIC s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, u16 word = 0; ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word); + if (ret_val) return ret_val; @@ -3413,7 +3414,7 @@ STATIC s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, * * Reads a byte or word from the NVM using the flash access registers. **/ -static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, +STATIC s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, u8 size, u16 *data) { union ich8_hws_flash_status hsfsts; @@ -3427,7 +3428,6 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, if (size < 1 || size > 2 || offset > ICH_FLASH_LINEAR_ADDR_MASK) return -E1000_ERR_NVM; - flash_linear_addr = ((ICH_FLASH_LINEAR_ADDR_MASK & offset) + hw->nvm.flash_base_addr); @@ -3437,8 +3437,8 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, ret_val = e1000_flash_cycle_init_ich8lan(hw); if (ret_val != E1000_SUCCESS) break; - hsflctl.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL); + /* 0b/1b corresponds to 1 or 2 byte size, respectively. */ hsflctl.hsf_ctrl.fldbcount = size - 1; hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_READ; @@ -3735,7 +3735,7 @@ STATIC s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) * * Writes one/two bytes to the NVM using the flash access registers. **/ -static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, +STATIC s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, u8 size, u16 data) { union ich8_hws_flash_status hsfsts; @@ -3760,8 +3760,8 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, ret_val = e1000_flash_cycle_init_ich8lan(hw); if (ret_val != E1000_SUCCESS) break; - hsflctl.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL); + /* 0b/1b corresponds to 1 or 2 byte size, respectively. */ hsflctl.hsf_ctrl.fldbcount = size - 1; hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_WRITE; @@ -3830,7 +3830,7 @@ STATIC s32 e1000_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, * Writes a single byte to the NVM using the flash access registers. * Goes through a retry algorithm before giving up. **/ -static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, +STATIC s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, u8 byte) { s32 ret_val; @@ -3929,8 +3929,9 @@ STATIC s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank) /* Write a value 11 (block Erase) in Flash * Cycle field in hw flash control */ - hsflctl.regval = E1000_READ_FLASH_REG16(hw, - ICH_FLASH_HSFCTL); + hsflctl.regval = + E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL); + hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_ERASE; E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval); @@ -4305,7 +4306,7 @@ STATIC s32 e1000_init_hw_ich8lan(struct e1000_hw *hw) * Sets/Clears required hardware bits necessary for correctly setting up the * hardware for transmit and receive. **/ -static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw) +STATIC void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw) { u32 reg; @@ -4598,7 +4599,7 @@ STATIC s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed, * 5) repeat up to 10 times * Note: this is only called for IGP3 copper when speed is 1gb. **/ -static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw) +STATIC s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw) { struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; u32 phy_ctrl; @@ -4848,7 +4849,7 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw) * The SMBus release must also be disabled on LCD reset. */ if (!(E1000_READ_REG(hw, E1000_FWSM) & - E1000_ICH_FWSM_FW_VALID)) { + E1000_ICH_FWSM_FW_VALID)) { /* Enable proxy to reset only on power good. */ hw->phy.ops.read_reg_locked(hw, I217_PROXY_CTRL, &phy_reg); diff --git a/lib/librte_pmd_e1000/e1000/e1000_ich8lan.h b/lib/librte_pmd_e1000/e1000/e1000_ich8lan.h index 1e795b22c4..873d243026 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_ich8lan.h +++ b/lib/librte_pmd_e1000/e1000/e1000_ich8lan.h @@ -308,7 +308,6 @@ s32 e1000_set_eee_pchlan(struct e1000_hw *hw); #if defined(NAHUM6LP_HW) && defined(ULP_SUPPORT) s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx); s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force); -void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw); #endif /* NAHUM6LP_HW && ULP_SUPPORT */ #endif /* _E1000_ICH8LAN_H_ */ void e1000_demote_ltr(struct e1000_hw *hw, bool demote, bool link); diff --git a/lib/librte_pmd_e1000/e1000/e1000_nvm.c b/lib/librte_pmd_e1000/e1000/e1000_nvm.c index 37295e9114..54c017d522 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_nvm.c +++ b/lib/librte_pmd_e1000/e1000/e1000_nvm.c @@ -114,7 +114,7 @@ s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw, * * Enable/Raise the EEPROM clock bit. **/ -static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd) +STATIC void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd) { *eecd = *eecd | E1000_EECD_SK; E1000_WRITE_REG(hw, E1000_EECD, *eecd); @@ -129,7 +129,7 @@ static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd) * * Clear/Lower the EEPROM clock bit. **/ -static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd) +STATIC void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd) { *eecd = *eecd & ~E1000_EECD_SK; E1000_WRITE_REG(hw, E1000_EECD, *eecd); @@ -147,7 +147,7 @@ static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd) * "data" parameter will be shifted out to the EEPROM one bit at a time. * In order to do this, "data" must be broken down into bits. **/ -static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count) +STATIC void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count) { struct e1000_nvm_info *nvm = &hw->nvm; u32 eecd = E1000_READ_REG(hw, E1000_EECD); @@ -194,7 +194,7 @@ static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count) * "DO" bit. During this "shifting in" process the data in "DI" bit should * always be clear. **/ -static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count) +STATIC u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count) { u32 eecd; u32 i; @@ -295,7 +295,7 @@ s32 e1000_acquire_nvm_generic(struct e1000_hw *hw) * * Return the EEPROM to a standby state. **/ -static void e1000_standby_nvm(struct e1000_hw *hw) +STATIC void e1000_standby_nvm(struct e1000_hw *hw) { struct e1000_nvm_info *nvm = &hw->nvm; u32 eecd = E1000_READ_REG(hw, E1000_EECD); @@ -381,7 +381,7 @@ void e1000_release_nvm_generic(struct e1000_hw *hw) * * Setups the EEPROM for reading and writing. **/ -static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw) +STATIC s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw) { struct e1000_nvm_info *nvm = &hw->nvm; u32 eecd = E1000_READ_REG(hw, E1000_EECD); diff --git a/lib/librte_pmd_e1000/e1000/e1000_phy.c b/lib/librte_pmd_e1000/e1000/e1000_phy.c index cc454d9d80..02c1f5130f 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_phy.c +++ b/lib/librte_pmd_e1000/e1000/e1000_phy.c @@ -33,7 +33,7 @@ POSSIBILITY OF SUCH DAMAGE. #include "e1000_api.h" -static s32 e1000_wait_autoneg(struct e1000_hw *hw); +STATIC s32 e1000_wait_autoneg(struct e1000_hw *hw); STATIC s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data, bool read, bool page_set); STATIC u32 e1000_get_phy_addr_for_hv_page(u32 page); @@ -41,13 +41,13 @@ STATIC s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, u16 *data, bool read); /* Cable length tables */ -static const u16 e1000_m88_cable_length_table[] = { +STATIC const u16 e1000_m88_cable_length_table[] = { 0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED }; #define M88E1000_CABLE_LENGTH_TABLE_SIZE \ (sizeof(e1000_m88_cable_length_table) / \ sizeof(e1000_m88_cable_length_table[0])) -static const u16 e1000_igp_2_cable_length_table[] = { +STATIC const u16 e1000_igp_2_cable_length_table[] = { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21, 0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41, 6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61, 21, 26, 31, 35, 40, @@ -733,7 +733,7 @@ s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page) * and stores the retrieved information in data. Release any acquired * semaphores before exiting. **/ -static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, +STATIC s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, bool locked) { s32 ret_val = E1000_SUCCESS; @@ -802,7 +802,7 @@ s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data) * Acquires semaphore, if necessary, then writes the data to PHY register * at the offset. Release any acquired semaphores before exiting. **/ -static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, +STATIC s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, bool locked) { s32 ret_val = E1000_SUCCESS; @@ -871,7 +871,7 @@ s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data) * using the kumeran interface. The information retrieved is stored in data. * Release any acquired semaphores before exiting. **/ -static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, +STATIC s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, bool locked) { u32 kmrnctrlsta; @@ -946,7 +946,7 @@ s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) * at the offset using the kumeran interface. Release any acquired semaphores * before exiting. **/ -static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, +STATIC s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, bool locked) { u32 kmrnctrlsta; @@ -2313,7 +2313,7 @@ s32 e1000_check_polarity_ife(struct e1000_hw *hw) * Waits for auto-negotiation to complete or for the auto-negotiation time * limit to expire, which ever happens first. **/ -static s32 e1000_wait_autoneg(struct e1000_hw *hw) +STATIC s32 e1000_wait_autoneg(struct e1000_hw *hw) { s32 ret_val = E1000_SUCCESS; u16 i, phy_status; @@ -3092,7 +3092,7 @@ s32 e1000_determine_phy_address(struct e1000_hw *hw) * * Returns the phy address for the page requested. **/ -static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg) +STATIC u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg) { u32 phy_addr = 2; @@ -3544,7 +3544,7 @@ void e1000_power_down_phy_copper(struct e1000_hw *hw) * and stores the retrieved information in data. Release any acquired * semaphore before exiting. **/ -static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, +STATIC s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, bool locked, bool page_set) { s32 ret_val; @@ -3654,7 +3654,7 @@ s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data) * Acquires semaphore, if necessary, then writes the data to PHY register * at the offset. Release any acquired semaphores before exiting. **/ -static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, +STATIC s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, bool locked, bool page_set) { s32 ret_val; @@ -4126,7 +4126,7 @@ s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data) { u32 mphy_ctrl = 0; bool locked = false; - bool ready = false; + bool ready; DEBUGFUNC("e1000_read_phy_reg_mphy"); @@ -4188,7 +4188,7 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, { u32 mphy_ctrl = 0; bool locked = false; - bool ready = false; + bool ready; DEBUGFUNC("e1000_write_phy_reg_mphy"); diff --git a/lib/librte_pmd_e1000/e1000/e1000_vf.c b/lib/librte_pmd_e1000/e1000/e1000_vf.c index a4a96fd2a9..501fe5a87a 100644 --- a/lib/librte_pmd_e1000/e1000/e1000_vf.c +++ b/lib/librte_pmd_e1000/e1000/e1000_vf.c @@ -378,7 +378,7 @@ STATIC u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr) return hash_value; } -static void e1000_write_msg_read_ack(struct e1000_hw *hw, +STATIC void e1000_write_msg_read_ack(struct e1000_hw *hw, u32 *msg, u16 size) { struct e1000_mbx_info *mbx = &hw->mbx;