From: Ankur Dwivedi <adwivedi@marvell.com>
Date: Thu, 22 Oct 2020 07:50:00 +0000 (+0530)
Subject: crypto/octeontx2: fix multi-process
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=9fd11c1583c9b3249f49755b3216a79698e94700;p=dpdk.git

crypto/octeontx2: fix multi-process

During crypto device probe few functions should be called only
for the primary process. This patch fixes this issue.

Fixes: 818d138bcce9 ("crypto/octeontx2: add init sequence in probe")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Reviewed-by: Anoob Joseph <anoobj@marvell.com>
---

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index 02d2fd83bd..1de04f4a66 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -70,36 +70,39 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 
 	otx2_dev = &vf->otx2_dev;
 
-	/* Initialize the base otx2_dev object */
-	ret = otx2_dev_init(pci_dev, otx2_dev);
-	if (ret) {
-		CPT_LOG_ERR("Could not initialize otx2_dev");
-		goto pmd_destroy;
-	}
-
-	/* Get number of queues available on the device */
-	ret = otx2_cpt_available_queues_get(dev, &nb_queues);
-	if (ret) {
-		CPT_LOG_ERR("Could not determine the number of queues available");
-		goto otx2_dev_fini;
-	}
-
-	/* Don't exceed the limits set per VF */
-	nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
-
-	if (nb_queues == 0) {
-		CPT_LOG_ERR("No free queues available on the device");
-		goto otx2_dev_fini;
-	}
-
-	vf->max_queues = nb_queues;
-
-	CPT_LOG_INFO("Max queues supported by device: %d", vf->max_queues);
-
-	ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
-	if (ret) {
-		CPT_LOG_ERR("Could not determine hardware capabilities");
-		goto otx2_dev_fini;
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+		/* Initialize the base otx2_dev object */
+		ret = otx2_dev_init(pci_dev, otx2_dev);
+		if (ret) {
+			CPT_LOG_ERR("Could not initialize otx2_dev");
+			goto pmd_destroy;
+		}
+
+		/* Get number of queues available on the device */
+		ret = otx2_cpt_available_queues_get(dev, &nb_queues);
+		if (ret) {
+			CPT_LOG_ERR("Could not determine the number of queues available");
+			goto otx2_dev_fini;
+		}
+
+		/* Don't exceed the limits set per VF */
+		nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
+
+		if (nb_queues == 0) {
+			CPT_LOG_ERR("No free queues available on the device");
+			goto otx2_dev_fini;
+		}
+
+		vf->max_queues = nb_queues;
+
+		CPT_LOG_INFO("Max queues supported by device: %d",
+				vf->max_queues);
+
+		ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
+		if (ret) {
+			CPT_LOG_ERR("Could not determine hardware capabilities");
+			goto otx2_dev_fini;
+		}
 	}
 
 	otx2_crypto_capabilities_init(vf->hw_caps);
@@ -121,10 +124,14 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 			     RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
 			     RTE_CRYPTODEV_FF_SECURITY;
 
+	if (rte_eal_process_type() == RTE_PROC_SECONDARY)
+		otx2_cpt_set_enqdeq_fns(dev);
+
 	return 0;
 
 otx2_dev_fini:
-	otx2_dev_fini(pci_dev, otx2_dev);
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+		otx2_dev_fini(pci_dev, otx2_dev);
 pmd_destroy:
 	rte_cryptodev_pmd_destroy(dev);
 exit:
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.h b/drivers/crypto/octeontx2/otx2_cryptodev.h
index 7b1b648639..febb4ee74d 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.h
@@ -51,4 +51,6 @@ extern int otx2_cpt_logtype;
  */
 extern uint8_t otx2_cryptodev_driver_id;
 
+void otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev);
+
 #endif /* _OTX2_CRYPTODEV_H_ */
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 790af02dc6..be37d3cac1 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -1019,6 +1019,15 @@ otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 	return nb_completed;
 }
 
+void
+otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)
+{
+	dev->enqueue_burst = otx2_cpt_enqueue_burst;
+	dev->dequeue_burst = otx2_cpt_dequeue_burst;
+
+	rte_mb();
+}
+
 /* PMD ops */
 
 static int
@@ -1081,10 +1090,8 @@ otx2_cpt_dev_config(struct rte_cryptodev *dev,
 		goto intr_unregister;
 	}
 
-	dev->enqueue_burst = otx2_cpt_enqueue_burst;
-	dev->dequeue_burst = otx2_cpt_dequeue_burst;
+	otx2_cpt_set_enqdeq_fns(dev);
 
-	rte_mb();
 	return 0;
 
 intr_unregister: