From: David Marchand Date: Fri, 8 Oct 2021 12:07:14 +0000 (+0200) Subject: eal/x86: fix some CPU extended features definitions X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=aae3037ab1e020f68fa9e662aab31321cffcdc31;p=dpdk.git eal/x86: fix some CPU extended features definitions Caught while checking CPUID related stuff in OVS. According to [1], for Structured Extended Feature Flags Enumeration Leaf (EAX = 0x07H, ECX = 0): - BMI1 is associated to EBX, bit 3 (was incorrectly 2), - SMEP is associated to EBX, bit 7 (was incorrectly 6), - BMI2 is associated to EBX, bit 8 (was incorrectly 7), - ERMS is associated to EBX, bit 9 (was incorrectly 8), 1: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf Fixes: af75078fece3 ("first public release") Cc: stable@dpdk.org Signed-off-by: David Marchand Acked-by: Bruce Richardson --- diff --git a/lib/eal/x86/rte_cpuflags.c b/lib/eal/x86/rte_cpuflags.c index d339734a8c..378fc95396 100644 --- a/lib/eal/x86/rte_cpuflags.c +++ b/lib/eal/x86/rte_cpuflags.c @@ -100,12 +100,12 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(ENERGY_EFF, 0x00000006, 0, RTE_REG_ECX, 3) FEAT_DEF(FSGSBASE, 0x00000007, 0, RTE_REG_EBX, 0) - FEAT_DEF(BMI1, 0x00000007, 0, RTE_REG_EBX, 2) + FEAT_DEF(BMI1, 0x00000007, 0, RTE_REG_EBX, 3) FEAT_DEF(HLE, 0x00000007, 0, RTE_REG_EBX, 4) FEAT_DEF(AVX2, 0x00000007, 0, RTE_REG_EBX, 5) - FEAT_DEF(SMEP, 0x00000007, 0, RTE_REG_EBX, 6) - FEAT_DEF(BMI2, 0x00000007, 0, RTE_REG_EBX, 7) - FEAT_DEF(ERMS, 0x00000007, 0, RTE_REG_EBX, 8) + FEAT_DEF(SMEP, 0x00000007, 0, RTE_REG_EBX, 7) + FEAT_DEF(BMI2, 0x00000007, 0, RTE_REG_EBX, 8) + FEAT_DEF(ERMS, 0x00000007, 0, RTE_REG_EBX, 9) FEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10) FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11) FEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16)