From: Qi Zhang <qi.z.zhang@intel.com>
Date: Mon, 30 Mar 2020 11:45:37 +0000 (+0800)
Subject: net/ice/base: fix binary order for GTPU filter
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=b965ec9e99d7726d24fdcf41defbbac02f21f4e2;p=dpdk.git

net/ice/base: fix binary order for GTPU filter

Take network order for gtpu fdir filter.

Fixes: b5c274f4e2ad ("net/ice/base: support FDIR for GTPU QFI field")
Cc: stable@dpdk.org

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---

diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 21a83fd6c4..e52104e9a0 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -148,9 +148,9 @@ struct ice_fdir_v6 {
 struct ice_fdir_udp_gtp {
 	u8 flags;
 	u8 msg_type;
-	u16 rsrvd_len;
-	u32 teid;
-	u16 rsrvd_seq_nbr;
+	__be16 rsrvd_len;
+	__be32 teid;
+	__be16 rsrvd_seq_nbr;
 	u8 rsrvd_n_pdu_nbr;
 	u8 rsrvd_next_ext_type;
 	u8 rsvrd_ext_len;