From: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Date: Mon, 14 Sep 2020 14:31:45 +0000 (+0800)
Subject: net/hinic/base: get default cos from chip
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=d40023605420ca35b027036c134a43ca41c8e74f;p=dpdk.git

net/hinic/base: get default cos from chip

Get default cos of pf driver from chip configuration file.

Fixes: 6691acef0d3d ("net/hinic: support VF")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
---

diff --git a/drivers/net/hinic/base/hinic_pmd_cfg.c b/drivers/net/hinic/base/hinic_pmd_cfg.c
index a0cc16d9e0..837734f9ba 100644
--- a/drivers/net/hinic/base/hinic_pmd_cfg.c
+++ b/drivers/net/hinic/base/hinic_pmd_cfg.c
@@ -112,6 +112,7 @@ static void hinic_parse_pub_res_cap(struct service_cap *cap,
 	cap->host_id = dev_cap->host_id;
 	cap->ep_id = dev_cap->ep_id;
 	cap->max_cos_id = dev_cap->max_cos_id;
+	cap->valid_cos_bitmap = dev_cap->valid_cos_bitmap;
 	cap->er_id = dev_cap->er_id;
 	cap->port_id = dev_cap->port_id;
 
@@ -134,9 +135,11 @@ static void hinic_parse_pub_res_cap(struct service_cap *cap,
 	cap->host_oq_id_mask_val = dev_cap->host_oq_id_mask_val;
 
 	PMD_DRV_LOG(INFO, "Get public resource capability:");
-	PMD_DRV_LOG(INFO, "host_id: 0x%x, ep_id: 0x%x, intr_type: 0x%x, max_cos_id: 0x%x, er_id: 0x%x, port_id: 0x%x",
+	PMD_DRV_LOG(INFO, "host_id: 0x%x, ep_id: 0x%x, intr_type: 0x%x, "
+		    "max_cos_id: 0x%x, cos_bitmap: 0x%x, er_id: 0x%x, port_id: 0x%x",
 		    cap->host_id, cap->ep_id, cap->intr_chip_en,
-		    cap->max_cos_id, cap->er_id, cap->port_id);
+		    cap->max_cos_id, cap->valid_cos_bitmap, cap->er_id,
+		    cap->port_id);
 	PMD_DRV_LOG(INFO, "host_total_function: 0x%x, host_oq_id_mask_val: 0x%x, max_vf: 0x%x",
 		    cap->host_total_function, cap->host_oq_id_mask_val,
 		    cap->max_vf);
diff --git a/drivers/net/hinic/base/hinic_pmd_cfg.h b/drivers/net/hinic/base/hinic_pmd_cfg.h
index 1741ca44a4..6e76e1d232 100644
--- a/drivers/net/hinic/base/hinic_pmd_cfg.h
+++ b/drivers/net/hinic/base/hinic_pmd_cfg.h
@@ -54,6 +54,7 @@ struct service_cap {
 	u8 ep_id;
 	u8 intr_chip_en;
 	u8 max_cos_id;	/* PF/VF's max cos id */
+	u8 valid_cos_bitmap;
 	u8 er_id;	/* PF/VF's ER */
 	u8 port_id;	/* PF/VF's physical port */
 	u8 max_vf;	/* max VF number that PF supported */
diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c
index b2c8a5165b..6fd16e6144 100644
--- a/drivers/net/hinic/hinic_pmd_ethdev.c
+++ b/drivers/net/hinic/hinic_pmd_ethdev.c
@@ -2583,26 +2583,53 @@ static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
 					up_pgid, up_bw, up_strict);
 }
 
+static int hinic_pf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)
+{
+	u8 default_cos = 0;
+	u8 valid_cos_bitmap;
+	u8 i;
+
+	valid_cos_bitmap = hwdev->cfg_mgmt->svc_cap.valid_cos_bitmap;
+	if (!valid_cos_bitmap) {
+		PMD_DRV_LOG(ERR, "PF has none cos to support\n");
+		return -EFAULT;
+	}
+
+	for (i = 0; i < NR_MAX_COS; i++) {
+		if (valid_cos_bitmap & BIT(i))
+			default_cos = i; /* Find max cos id as default cos */
+	}
+
+	*cos_id = default_cos;
+
+	return 0;
+}
+
 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
 {
 	u8 cos_id = 0;
 	int err;
 
 	if (!HINIC_IS_VF(nic_dev->hwdev)) {
-		nic_dev->default_cos =
-				(hinic_global_func_id(nic_dev->hwdev) +
-						DEFAULT_BASE_COS) % NR_MAX_COS;
+		err = hinic_pf_get_default_cos(nic_dev->hwdev, &cos_id);
+		if (err) {
+			PMD_DRV_LOG(ERR, "Get PF default cos failed, err: %d",
+				    err);
+			return HINIC_ERROR;
+		}
 	} else {
 		err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
 		if (err) {
 			PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
-					err);
+				    err);
 			return HINIC_ERROR;
 		}
-
-		nic_dev->default_cos = cos_id;
 	}
 
+	nic_dev->default_cos = cos_id;
+
+	PMD_DRV_LOG(INFO, "Default cos %d", nic_dev->default_cos);
+
 	return 0;
 }