From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Date: Tue, 27 Feb 2018 15:13:58 +0000 (+0530)
Subject: eal/ppc: remove braces in SMP memory barrier macro
X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=da07658d58461bef714afc196569cf18377073e2;p=dpdk.git

eal/ppc: remove braces in SMP memory barrier macro

This patch fixes the compilation problem with rte_smp_mb,
when there is else clause following it, as in test_barrier.c.

Fixes: 05c3fd7110 ("eal/ppc: atomic operations for IBM Power")
Cc: stable@dpdk.org

Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
---

diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
index 39fce7b930..182177403b 100644
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
@@ -55,7 +55,7 @@ extern "C" {
  * Guarantees that the LOAD and STORE operations generated before the
  * barrier occur before the LOAD and STORE operations generated after.
  */
-#define	rte_mb()  {asm volatile("sync" : : : "memory"); }
+#define	rte_mb()  asm volatile("sync" : : : "memory")
 
 /**
  * Write memory barrier.