From: Qiming Yang Date: Wed, 10 Jan 2018 16:04:35 +0000 (+0800) Subject: net/ixgbe/base: use 2 bytes for flash read command X-Git-Tag: spdx-start~438 X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=e6102361b1d4d87138a248f5130722ed64f1bf4b;p=dpdk.git net/ixgbe/base: use 2 bytes for flash read command With this patch, it uses 2 bytes of buffer reading, as required for flash read command. It also adds definitions for LESM module. Signed-off-by: Qiming Yang Acked-by: Wenzhuo Lu --- diff --git a/drivers/net/ixgbe/base/ixgbe_common.c b/drivers/net/ixgbe/base/ixgbe_common.c index 7e99d7e80b..8831b347d1 100644 --- a/drivers/net/ixgbe/base/ixgbe_common.c +++ b/drivers/net/ixgbe/base/ixgbe_common.c @@ -4584,10 +4584,11 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, u32 length, u32 timeout, bool return_data) { u32 hdr_size = sizeof(struct ixgbe_hic_hdr); - u16 dword_len; + struct ixgbe_hic_hdr *resp = (struct ixgbe_hic_hdr *)buffer; u16 buf_len; s32 status; u32 bi; + u32 dword_len; DEBUGFUNC("ixgbe_host_interface_command"); @@ -4617,8 +4618,23 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, IXGBE_LE32_TO_CPUS((uintptr_t)&buffer[bi]); } - /* If there is any thing in data position pull it in */ - buf_len = ((struct ixgbe_hic_hdr *)buffer)->buf_len; + /* + * If there is any thing in data position pull it in + * Read Flash command requires reading buffer length from + * two byes instead of one byte + */ + if (resp->cmd == 0x30) { + for (; bi < dword_len + 2; bi++) { + buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, + bi); + IXGBE_LE32_TO_CPUS(&buffer[bi]); + } + buf_len = (((u16)(resp->cmd_or_resp.ret_status) << 3) + & 0xF00) | resp->buf_len; + hdr_size += (2 << 2); + } else { + buf_len = resp->buf_len; + } if (!buf_len) goto rel_out; diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h index 66a79dd68f..e614c10583 100644 --- a/drivers/net/ixgbe/base/ixgbe_type.h +++ b/drivers/net/ixgbe/base/ixgbe_type.h @@ -2458,6 +2458,16 @@ enum { #define IXGBE_FW_LESM_PARAMETERS_PTR 0x2 #define IXGBE_FW_LESM_STATE_1 0x1 #define IXGBE_FW_LESM_STATE_ENABLED 0x8000 /* LESM Enable bit */ +#define IXGBE_FW_LESM_2_STATES_ENABLED_MASK 0x1F +#define IXGBE_FW_LESM_2_STATES_ENABLED 0x12 +#define IXGBE_FW_LESM_STATE0_10G_ENABLED 0x6FFF +#define IXGBE_FW_LESM_STATE1_10G_ENABLED 0x4FFF +#define IXGBE_FW_LESM_STATE0_10G_DISABLED 0x0FFF +#define IXGBE_FW_LESM_STATE1_10G_DISABLED 0x2FFF +#define IXGBE_FW_LESM_PORT0_STATE0_OFFSET 0x2 +#define IXGBE_FW_LESM_PORT0_STATE1_OFFSET 0x3 +#define IXGBE_FW_LESM_PORT1_STATE0_OFFSET 0x6 +#define IXGBE_FW_LESM_PORT1_STATE1_OFFSET 0x7 #define IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR 0x4 #define IXGBE_FW_PATCH_VERSION_4 0x7 #define IXGBE_FCOE_IBA_CAPS_BLK_PTR 0x33 /* iSCSI/FCOE block */