From: Lunyuan Cui Date: Thu, 2 Apr 2020 07:58:47 +0000 (+0000) Subject: net/i40e: enable MAC address as flow director input set X-Git-Url: http://git.droids-corp.org/?a=commitdiff_plain;h=ea0c22fd8227a3ac3507984ff766d66355a3651e;p=dpdk.git net/i40e: enable MAC address as flow director input set Enable source MAC address and destination MAC address as FDIR's input set for ipv4-other, ipv4-udp and ipv4-tcp. When OVS-DPDK is working as a pure L2 switch, enable MAC address as FDIR input set with Mark+RSS action would help the performance speed up. And FVL FDIR supports to change input set with MAC address. Signed-off-by: Lunyuan Cui Acked-by: Beilei Xing --- diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst index e83b6c6fa7..b43f27e710 100644 --- a/doc/guides/rel_notes/release_20_05.rst +++ b/doc/guides/rel_notes/release_20_05.rst @@ -82,6 +82,12 @@ New Features (enqueue/dequeue start; enqueue/dequeue finish). That allows user to inspect objects in the ring without removing them from it (aka MT safe peek). +* **Updated Intel i40e driver.** + + Updated i40e PMD with new features and improvements, including: + + * Enable MAC address as FDIR input set for ipv4-other, ipv4-udp and ipv4-tcp. + * **Updated the Intel ice driver.** Updated the Intel ice driver with new features and improvements, including: diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 451cc86c4d..03ddb8e907 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -9342,6 +9342,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype, I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO | I40E_INSET_IPV4_TTL, [I40E_FILTER_PCTYPE_NONF_IPV4_UDP] = + I40E_INSET_DMAC | I40E_INSET_SMAC | I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER | I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST | I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | @@ -9357,6 +9358,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype, I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, [I40E_FILTER_PCTYPE_NONF_IPV4_TCP] = + I40E_INSET_DMAC | I40E_INSET_SMAC | I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER | I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST | I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | @@ -9373,6 +9375,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype, I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT | I40E_INSET_SCTP_VT, [I40E_FILTER_PCTYPE_NONF_IPV4_OTHER] = + I40E_INSET_DMAC | I40E_INSET_SMAC | I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER | I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST | I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO | diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 8cabdba6a1..461959e08f 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -542,12 +542,19 @@ struct i40e_ipv6_l2tpv3oip_flow { uint32_t session_id; /* Session ID in big endian. */ }; +/* A structure used to define the input for l2 dst type flow */ +struct i40e_l2_flow { + struct rte_ether_addr dst; + struct rte_ether_addr src; + uint16_t ether_type; /**< Ether type in big endian */ +}; + /* * A union contains the inputs for all types of flow * items in flows need to be in big endian */ union i40e_fdir_flow { - struct rte_eth_l2_flow l2_flow; + struct i40e_l2_flow l2_flow; struct rte_eth_udpv4_flow udp4_flow; struct rte_eth_tcpv4_flow tcp4_flow; struct rte_eth_sctpv4_flow sctp4_flow; diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index 931f259765..2f24615b65 100644 --- a/drivers/net/i40e/i40e_fdir.c +++ b/drivers/net/i40e/i40e_fdir.c @@ -1062,7 +1062,13 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf, [I40E_FILTER_PCTYPE_NONF_IPV6_OTHER] = IPPROTO_NONE, }; + rte_memcpy(raw_pkt, &fdir_input->flow.l2_flow.dst, + sizeof(struct rte_ether_addr)); + rte_memcpy(raw_pkt + sizeof(struct rte_ether_addr), + &fdir_input->flow.l2_flow.src, + sizeof(struct rte_ether_addr)); raw_pkt += 2 * sizeof(struct rte_ether_addr); + if (vlan && fdir_input->flow_ext.vlan_tci) { rte_memcpy(raw_pkt, vlan_frame, sizeof(vlan_frame)); rte_memcpy(raw_pkt + sizeof(uint16_t), diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index d877ac2502..b1861a7db8 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -2626,8 +2626,24 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, } if (eth_spec && eth_mask) { - if (!rte_is_zero_ether_addr(ð_mask->src) || - !rte_is_zero_ether_addr(ð_mask->dst)) { + if (rte_is_broadcast_ether_addr(ð_mask->dst) && + rte_is_zero_ether_addr(ð_mask->src)) { + filter->input.flow.l2_flow.dst = + eth_spec->dst; + input_set |= I40E_INSET_DMAC; + } else if (rte_is_zero_ether_addr(ð_mask->dst) && + rte_is_broadcast_ether_addr(ð_mask->src)) { + filter->input.flow.l2_flow.src = + eth_spec->src; + input_set |= I40E_INSET_SMAC; + } else if (rte_is_broadcast_ether_addr(ð_mask->dst) && + rte_is_broadcast_ether_addr(ð_mask->src)) { + filter->input.flow.l2_flow.dst = + eth_spec->dst; + filter->input.flow.l2_flow.src = + eth_spec->src; + input_set |= (I40E_INSET_DMAC | I40E_INSET_SMAC); + } else { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, @@ -2635,7 +2651,8 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, return -rte_errno; } } - if (eth_spec && eth_mask && eth_mask->type) { + if (eth_spec && eth_mask && + next_type == RTE_FLOW_ITEM_TYPE_END) { if (eth_mask->type != RTE_BE16(0xffff)) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, @@ -2750,21 +2767,33 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, frag_off & RTE_IPV4_HDR_MF_FLAG) pctype = I40E_FILTER_PCTYPE_FRAG_IPV4; - /* Get the filter info */ - filter->input.flow.ip4_flow.proto = - ipv4_spec->hdr.next_proto_id; - filter->input.flow.ip4_flow.tos = - ipv4_spec->hdr.type_of_service; - filter->input.flow.ip4_flow.ttl = - ipv4_spec->hdr.time_to_live; - filter->input.flow.ip4_flow.src_ip = - ipv4_spec->hdr.src_addr; - filter->input.flow.ip4_flow.dst_ip = - ipv4_spec->hdr.dst_addr; - - filter->input.flow_ext.inner_ip = false; - filter->input.flow_ext.oip_type = - I40E_FDIR_IPTYPE_IPV4; + if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) { + if (input_set & (I40E_INSET_IPV4_SRC | + I40E_INSET_IPV4_DST | I40E_INSET_IPV4_TOS | + I40E_INSET_IPV4_TTL | I40E_INSET_IPV4_PROTO)) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "L2 and L3 input set are exclusive."); + return -rte_errno; + } + } else { + /* Get the filter info */ + filter->input.flow.ip4_flow.proto = + ipv4_spec->hdr.next_proto_id; + filter->input.flow.ip4_flow.tos = + ipv4_spec->hdr.type_of_service; + filter->input.flow.ip4_flow.ttl = + ipv4_spec->hdr.time_to_live; + filter->input.flow.ip4_flow.src_ip = + ipv4_spec->hdr.src_addr; + filter->input.flow.ip4_flow.dst_ip = + ipv4_spec->hdr.dst_addr; + + filter->input.flow_ext.inner_ip = false; + filter->input.flow_ext.oip_type = + I40E_FDIR_IPTYPE_IPV4; + } } else if (!ipv4_spec && !ipv4_mask && !outer_ip) { filter->input.flow_ext.inner_ip = true; filter->input.flow_ext.iip_type = @@ -2894,17 +2923,28 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, if (tcp_mask->hdr.dst_port == UINT16_MAX) input_set |= I40E_INSET_DST_PORT; - /* Get filter info */ - if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { - filter->input.flow.tcp4_flow.src_port = - tcp_spec->hdr.src_port; - filter->input.flow.tcp4_flow.dst_port = - tcp_spec->hdr.dst_port; - } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { - filter->input.flow.tcp6_flow.src_port = - tcp_spec->hdr.src_port; - filter->input.flow.tcp6_flow.dst_port = - tcp_spec->hdr.dst_port; + if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) { + if (input_set & + (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "L2 and L4 input set are exclusive."); + return -rte_errno; + } + } else { + /* Get filter info */ + if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { + filter->input.flow.tcp4_flow.src_port = + tcp_spec->hdr.src_port; + filter->input.flow.tcp4_flow.dst_port = + tcp_spec->hdr.dst_port; + } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { + filter->input.flow.tcp6_flow.src_port = + tcp_spec->hdr.src_port; + filter->input.flow.tcp6_flow.dst_port = + tcp_spec->hdr.dst_port; + } } } @@ -2938,17 +2978,28 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, if (udp_mask->hdr.dst_port == UINT16_MAX) input_set |= I40E_INSET_DST_PORT; - /* Get filter info */ - if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { - filter->input.flow.udp4_flow.src_port = - udp_spec->hdr.src_port; - filter->input.flow.udp4_flow.dst_port = - udp_spec->hdr.dst_port; - } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { - filter->input.flow.udp6_flow.src_port = - udp_spec->hdr.src_port; - filter->input.flow.udp6_flow.dst_port = - udp_spec->hdr.dst_port; + if (input_set & (I40E_INSET_DMAC | I40E_INSET_SMAC)) { + if (input_set & + (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "L2 and L4 input set are exclusive."); + return -rte_errno; + } + } else { + /* Get filter info */ + if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) { + filter->input.flow.udp4_flow.src_port = + udp_spec->hdr.src_port; + filter->input.flow.udp4_flow.dst_port = + udp_spec->hdr.dst_port; + } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) { + filter->input.flow.udp6_flow.src_port = + udp_spec->hdr.src_port; + filter->input.flow.udp6_flow.dst_port = + udp_spec->hdr.dst_port; + } } } filter->input.flow_ext.is_udp = true;