From 00f75a40576b28aa5633d2cadd86f23c30c7d220 Mon Sep 17 00:00:00 2001 From: Dekel Peled Date: Tue, 11 Feb 2020 13:05:11 +0200 Subject: [PATCH] net/mlx5: fix VLAN match for DV mode Currently MLX5 PMD can't match on untagged packets specifically. Tagged traffic still hits the flows intended for untagged packets. If the flow has ETH, it will catch all matching packets, tagged and untagged. The solution is to use cvlan_tag bit. If mask=1 and value=0 it matches on untagged traffic. If mask=1 and value=1 it matches on tagged traffic. This is the kernel implementation. This patch updated MLX5 PMD to set cvlan_tag mask and value according to flow rule contents. This update is relevant when using DV flow engine (dv_flow_en=1). See example at https://doc.dpdk.org/guides/nics/mlx5.html#limitations. Fixes: fc2c498ccb94 ("net/mlx5: add Direct Verbs translate items") Cc: stable@dpdk.org Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 9 +++------ doc/guides/rel_notes/release_20_02.rst | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++++++ 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 2411fb3461..2ea4fa9546 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -110,21 +110,18 @@ Limitations process. If the external memory is registered by primary process but has different virtual address in secondary process, unexpected error may happen. -- Flow pattern without any specific vlan will match for vlan packets as well: +- When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any + specific VLAN will match for VLAN packets as well: When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card. Meaning, the flow rule:: flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ... - Will only match vlan packets with vid=3. and the flow rules:: + Will only match vlan packets with vid=3. and the flow rule:: flow create 0 ingress pattern eth / ipv4 / end ... - Or:: - - flow create 0 ingress pattern eth / vlan / ipv4 / end ... - Will match any ipv4 packet (VLAN included). - VLAN pop offload command: diff --git a/doc/guides/rel_notes/release_20_02.rst b/doc/guides/rel_notes/release_20_02.rst index 2d28a04ab6..3c7b5d71c0 100644 --- a/doc/guides/rel_notes/release_20_02.rst +++ b/doc/guides/rel_notes/release_20_02.rst @@ -118,6 +118,7 @@ New Features * Added support for RSS using L3/L4 source/destination only. * Added support for matching on GTP tunnel header item. + * Removed limitation of matching on tagged/untagged packets (when using DV flow engine). * **Add new vDPA PMD based on Mellanox devices** diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index d88daeccbc..a9bb0b4f10 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -5216,6 +5216,15 @@ flow_dv_translate_item_eth(void *matcher, void *key, rte_be_to_cpu_16(eth_m->type)); l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype); *(uint16_t *)(l24_v) = eth_m->type & eth_v->type; + if (eth_v->type) { + /* When ethertype is present set mask for tagged VLAN. */ + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); + /* Set value for tagged VLAN if ethertype is 802.1Q. */ + if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) || + eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) + MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, + 1); + } } /** @@ -5356,6 +5365,7 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, ipv4_m->hdr.next_proto_id); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); } /** @@ -5460,6 +5470,7 @@ flow_dv_translate_item_ipv6(void *matcher, void *key, ipv6_m->hdr.proto); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, ipv6_v->hdr.proto & ipv6_m->hdr.proto); + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); } /** -- 2.20.1