From 09e1df73918f44634909781e6a5278e73eb4b5c5 Mon Sep 17 00:00:00 2001 From: Rahul Bhansali Date: Wed, 19 Jan 2022 15:13:26 +0530 Subject: [PATCH] common/cnxk: get head and tail of Rx and Tx queues Adds roc APIs roc_nix_cq_head_tail_get(), roc_nix_sq_head_tail_get() to get tail and head of receive and transmit queue respectively. Signed-off-by: Rahul Bhansali Acked-by: Ray Kinsella Acked-by: Jerin Jacob --- drivers/common/cnxk/roc_nix.h | 4 +++ drivers/common/cnxk/roc_nix_queue.c | 53 +++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 2 ++ 3 files changed, 59 insertions(+) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 69a5e8e7b4..d79abfef9f 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -795,8 +795,12 @@ int __roc_api roc_nix_rq_ena_dis(struct roc_nix_rq *rq, bool enable); int __roc_api roc_nix_rq_fini(struct roc_nix_rq *rq); int __roc_api roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq); int __roc_api roc_nix_cq_fini(struct roc_nix_cq *cq); +void __roc_api roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, + uint32_t *head, uint32_t *tail); int __roc_api roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq); int __roc_api roc_nix_sq_fini(struct roc_nix_sq *sq); +void __roc_api roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, + uint32_t *head, uint32_t *tail); /* PTP */ int __roc_api roc_nix_ptp_rx_ena_dis(struct roc_nix *roc_nix, int enable); diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index bd63e091a9..ab578496d1 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -984,3 +984,56 @@ roc_nix_sq_fini(struct roc_nix_sq *sq) return rc; } + +void +roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head, + uint32_t *tail) +{ + struct nix *nix = roc_nix_to_nix_priv(roc_nix); + uint64_t reg, val; + int64_t *addr; + + if (head == NULL || tail == NULL) + return; + + reg = (((uint64_t)qid) << 32); + addr = (int64_t *)(nix->base + NIX_LF_CQ_OP_STATUS); + val = roc_atomic64_add_nosync(reg, addr); + if (val & + (BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) | BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))) + val = 0; + + *tail = (uint32_t)(val & 0xFFFFF); + *head = (uint32_t)((val >> 20) & 0xFFFFF); +} + +void +roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head, + uint32_t *tail) +{ + struct nix *nix = roc_nix_to_nix_priv(roc_nix); + struct roc_nix_sq *sq = nix->sqs[qid]; + uint16_t sqes_per_sqb, sqb_cnt; + uint64_t reg, val; + int64_t *addr; + + if (head == NULL || tail == NULL) + return; + + reg = (((uint64_t)qid) << 32); + addr = (int64_t *)(nix->base + NIX_LF_SQ_OP_STATUS); + val = roc_atomic64_add_nosync(reg, addr); + if (val & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR)) { + val = 0; + return; + } + + *tail = (uint32_t)((val >> 28) & 0x3F); + *head = (uint32_t)((val >> 20) & 0x3F); + sqb_cnt = (uint16_t)(val & 0xFFFF); + + sqes_per_sqb = 1 << sq->sqes_per_sqb_log2; + + /* Update tail index as per used sqb count */ + *tail += (sqes_per_sqb * (sqb_cnt - 1)); +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index e3948d369d..ad1b5e8476 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -109,6 +109,7 @@ INTERNAL { roc_nix_bpf_timeunit_get; roc_nix_cq_dump; roc_nix_cq_fini; + roc_nix_cq_head_tail_get; roc_nix_cq_init; roc_nix_cqe_dump; roc_nix_dev_fini; @@ -224,6 +225,7 @@ INTERNAL { roc_nix_rx_queue_intr_enable; roc_nix_sq_dump; roc_nix_sq_fini; + roc_nix_sq_head_tail_get; roc_nix_sq_init; roc_nix_stats_get; roc_nix_stats_queue_get; -- 2.20.1