From 31d7c6f7d424c533b0a4dd9b4408b814ac7852f1 Mon Sep 17 00:00:00 2001 From: Feifei Wang Date: Wed, 10 Mar 2021 10:40:29 +0800 Subject: [PATCH] net/i40e: fix parsing packet type for NEON In i40e NEON vector Rx path, the packet descs processing is incorrect. This caused wrong packet type been filled in mbuf. To fix this, when shifting the pktlen field to be 16-bit aligned, it only needs to process the high 16bit of the packet descs instead of the high 32bit. Test Results: Architecture: arm64 NIC: XL710 Driver: i40e Package: Ether()/IP()/ Without this patch: desc_to_ptype_v: ptype = 7 (error) With this patch: desc_to_ptype_v: ptype = 23 (correct) Fixes: ae0eb310f253 ("net/i40e: implement vector PMD for ARM") Cc: stable@dpdk.org Signed-off-by: Feifei Wang Reviewed-by: Ruifeng Wang Tested-by: Kathleen Capella --- drivers/net/i40e/i40e_rxtx_vec_neon.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx_vec_neon.c b/drivers/net/i40e/i40e_rxtx_vec_neon.c index da16dfc386..1f5539bda8 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_neon.c +++ b/drivers/net/i40e/i40e_rxtx_vec_neon.c @@ -310,10 +310,16 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *__rte_restrict rxq, /* pkt 3,4 shift the pktlen field to be 16-bit aligned*/ uint32x4_t len3 = vshlq_u32(vreinterpretq_u32_u64(descs[3]), len_shl); - descs[3] = vreinterpretq_u64_u32(len3); + descs[3] = vreinterpretq_u64_u16(vsetq_lane_u16 + (vgetq_lane_u16(vreinterpretq_u16_u32(len3), 7), + vreinterpretq_u16_u64(descs[3]), + 7)); uint32x4_t len2 = vshlq_u32(vreinterpretq_u32_u64(descs[2]), len_shl); - descs[2] = vreinterpretq_u64_u32(len2); + descs[2] = vreinterpretq_u64_u16(vsetq_lane_u16 + (vgetq_lane_u16(vreinterpretq_u16_u32(len2), 7), + vreinterpretq_u16_u64(descs[2]), + 7)); /* D.1 pkt 3,4 convert format from desc to pktmbuf */ pkt_mb4 = vqtbl1q_u8(vreinterpretq_u8_u64(descs[3]), shuf_msk); @@ -341,10 +347,16 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *__rte_restrict rxq, /* pkt 1,2 shift the pktlen field to be 16-bit aligned*/ uint32x4_t len1 = vshlq_u32(vreinterpretq_u32_u64(descs[1]), len_shl); - descs[1] = vreinterpretq_u64_u32(len1); + descs[1] = vreinterpretq_u64_u16(vsetq_lane_u16 + (vgetq_lane_u16(vreinterpretq_u16_u32(len1), 7), + vreinterpretq_u16_u64(descs[1]), + 7)); uint32x4_t len0 = vshlq_u32(vreinterpretq_u32_u64(descs[0]), len_shl); - descs[0] = vreinterpretq_u64_u32(len0); + descs[0] = vreinterpretq_u64_u16(vsetq_lane_u16 + (vgetq_lane_u16(vreinterpretq_u16_u32(len0), 7), + vreinterpretq_u16_u64(descs[0]), + 7)); /* D.1 pkt 1,2 convert format from desc to pktmbuf */ pkt_mb2 = vqtbl1q_u8(vreinterpretq_u8_u64(descs[1]), shuf_msk); -- 2.20.1