From 38f9369d2496f66ca19b0389dfbc622f8e5efd8a Mon Sep 17 00:00:00 2001 From: Dekel Peled Date: Wed, 30 Sep 2020 15:19:36 +0300 Subject: [PATCH] net/mlx5: fix DevX CQ attributes values Previous patch wrongly used rdma-core defined values, when preparing attributes for creating DevX CQ object. This patch adds the correct value definition and uses them instead. Fixes: 08d1838f645a ("net/mlx5: implement CQ for Rx using DevX API") Cc: stable@dpdk.org Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 8 ++++++++ drivers/net/mlx5/mlx5_devx.c | 14 ++++---------- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 563e7c86c9..20f2fccd4f 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -2835,6 +2835,14 @@ struct mlx5_mini_cqe8 { uint32_t byte_cnt; }; +/* Mini CQE responder format. */ +enum { + MLX5_CQE_RESP_FORMAT_HASH = 0x0, + MLX5_CQE_RESP_FORMAT_CSUM = 0x1, + MLX5_CQE_RESP_FORMAT_CSUM_FLOW_TAG = 0x2, + MLX5_CQE_RESP_FORMAT_CSUM_STRIDX = 0x3, +}; + /* srTCM PRM flow meter parameters. */ enum { MLX5_FLOW_COLOR_RED = 0, diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 3e81fcc252..cb4a52294e 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -367,15 +367,11 @@ rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx) } if (priv->config.cqe_comp && !rxq_data->hw_timestamp && !rxq_data->lro) { - cq_attr.cqe_comp_en = MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE; -#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT + cq_attr.cqe_comp_en = 1u; cq_attr.mini_cqe_res_format = mlx5_rxq_mprq_enabled(rxq_data) ? - MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX : - MLX5DV_CQE_RES_FORMAT_HASH; -#else - cq_attr.mini_cqe_res_format = MLX5DV_CQE_RES_FORMAT_HASH; -#endif + MLX5_CQE_RESP_FORMAT_CSUM_STRIDX : + MLX5_CQE_RESP_FORMAT_HASH; /* * For vectorized Rx, it must not be doubled in order to * make cq_ci and rq_ci aligned. @@ -392,10 +388,8 @@ rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx) "Port %u Rx CQE compression is disabled for LRO.", dev->data->port_id); } -#ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD if (priv->config.cqe_pad) - cq_attr.cqe_size = MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD; -#endif + cq_attr.cqe_size = MLX5_CQE_SIZE_128B; log_cqe_n = log2above(cqe_n); cq_size = sizeof(struct mlx5_cqe) * (1 << log_cqe_n); /* Query the EQN for this core. */ -- 2.20.1