From 3960673d308834c230168eb7a8e3f89c981191cd Mon Sep 17 00:00:00 2001 From: Kishore Padmanabha Date: Thu, 10 Sep 2020 18:55:43 -0700 Subject: [PATCH] net/bnxt: fix coexistence of IPv4 and IPv6 ingress rules The ingress rule to match on ipv4 and ipv6 is now two rules to make sure both rules can coexist at the same time. Added count action only for ingress flows. Fixes: fe82f3e02701 ("net/bnxt: support exact match templates") Cc: stable@dpdk.org Signed-off-by: Kishore Padmanabha Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/ulp_template_db_act.c | 298 +- .../net/bnxt/tf_ulp/ulp_template_db_class.c | 5522 +++++++++++------ .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 66 +- .../net/bnxt/tf_ulp/ulp_template_db_field.h | 767 ++- 4 files changed, 4088 insertions(+), 2565 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c index b669a1408b..22142c1377 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c @@ -36,64 +36,61 @@ uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = { [BNXT_ULP_ACT_HID_0020] = 25, [BNXT_ULP_ACT_HID_0901] = 26, [BNXT_ULP_ACT_HID_0121] = 27, - [BNXT_ULP_ACT_HID_0006] = 28, - [BNXT_ULP_ACT_HID_0804] = 29, - [BNXT_ULP_ACT_HID_0105] = 30, - [BNXT_ULP_ACT_HID_0024] = 31, - [BNXT_ULP_ACT_HID_0905] = 32, - [BNXT_ULP_ACT_HID_0125] = 33, - [BNXT_ULP_ACT_HID_0001] = 34, - [BNXT_ULP_ACT_HID_0005] = 35, - [BNXT_ULP_ACT_HID_0009] = 36, - [BNXT_ULP_ACT_HID_000d] = 37, - [BNXT_ULP_ACT_HID_0021] = 38, - [BNXT_ULP_ACT_HID_0029] = 39, - [BNXT_ULP_ACT_HID_0025] = 40, - [BNXT_ULP_ACT_HID_002d] = 41, - [BNXT_ULP_ACT_HID_0801] = 42, - [BNXT_ULP_ACT_HID_0809] = 43, - [BNXT_ULP_ACT_HID_0805] = 44, - [BNXT_ULP_ACT_HID_080d] = 45, - [BNXT_ULP_ACT_HID_0c15] = 46, - [BNXT_ULP_ACT_HID_0c19] = 47, - [BNXT_ULP_ACT_HID_02f6] = 48, - [BNXT_ULP_ACT_HID_04f8] = 49, - [BNXT_ULP_ACT_HID_01df] = 50, - [BNXT_ULP_ACT_HID_07e5] = 51, - [BNXT_ULP_ACT_HID_06ce] = 52, - [BNXT_ULP_ACT_HID_02fa] = 53, - [BNXT_ULP_ACT_HID_04fc] = 54, - [BNXT_ULP_ACT_HID_01e3] = 55, - [BNXT_ULP_ACT_HID_07e9] = 56, - [BNXT_ULP_ACT_HID_06d2] = 57, - [BNXT_ULP_ACT_HID_03f7] = 58, - [BNXT_ULP_ACT_HID_05f9] = 59, - [BNXT_ULP_ACT_HID_02e0] = 60, - [BNXT_ULP_ACT_HID_08e6] = 61, - [BNXT_ULP_ACT_HID_07cf] = 62, - [BNXT_ULP_ACT_HID_03fb] = 63, - [BNXT_ULP_ACT_HID_05fd] = 64, - [BNXT_ULP_ACT_HID_02e4] = 65, - [BNXT_ULP_ACT_HID_08ea] = 66, - [BNXT_ULP_ACT_HID_07d3] = 67, - [BNXT_ULP_ACT_HID_040d] = 68, - [BNXT_ULP_ACT_HID_040f] = 69, - [BNXT_ULP_ACT_HID_0413] = 70, - [BNXT_ULP_ACT_HID_0c0d] = 71, + [BNXT_ULP_ACT_HID_0004] = 28, + [BNXT_ULP_ACT_HID_0006] = 29, + [BNXT_ULP_ACT_HID_0804] = 30, + [BNXT_ULP_ACT_HID_0105] = 31, + [BNXT_ULP_ACT_HID_0024] = 32, + [BNXT_ULP_ACT_HID_0905] = 33, + [BNXT_ULP_ACT_HID_0125] = 34, + [BNXT_ULP_ACT_HID_0001] = 35, + [BNXT_ULP_ACT_HID_0005] = 36, + [BNXT_ULP_ACT_HID_0009] = 37, + [BNXT_ULP_ACT_HID_000d] = 38, + [BNXT_ULP_ACT_HID_0021] = 39, + [BNXT_ULP_ACT_HID_0029] = 40, + [BNXT_ULP_ACT_HID_0025] = 41, + [BNXT_ULP_ACT_HID_002d] = 42, + [BNXT_ULP_ACT_HID_0801] = 43, + [BNXT_ULP_ACT_HID_0809] = 44, + [BNXT_ULP_ACT_HID_0805] = 45, + [BNXT_ULP_ACT_HID_080d] = 46, + [BNXT_ULP_ACT_HID_0c15] = 47, + [BNXT_ULP_ACT_HID_0c19] = 48, + [BNXT_ULP_ACT_HID_02f6] = 49, + [BNXT_ULP_ACT_HID_04f8] = 50, + [BNXT_ULP_ACT_HID_01df] = 51, + [BNXT_ULP_ACT_HID_07e5] = 52, + [BNXT_ULP_ACT_HID_06ce] = 53, + [BNXT_ULP_ACT_HID_02fa] = 54, + [BNXT_ULP_ACT_HID_04fc] = 55, + [BNXT_ULP_ACT_HID_01e3] = 56, + [BNXT_ULP_ACT_HID_07e9] = 57, + [BNXT_ULP_ACT_HID_06d2] = 58, + [BNXT_ULP_ACT_HID_03f7] = 59, + [BNXT_ULP_ACT_HID_05f9] = 60, + [BNXT_ULP_ACT_HID_02e0] = 61, + [BNXT_ULP_ACT_HID_08e6] = 62, + [BNXT_ULP_ACT_HID_07cf] = 63, + [BNXT_ULP_ACT_HID_03fb] = 64, + [BNXT_ULP_ACT_HID_05fd] = 65, + [BNXT_ULP_ACT_HID_02e4] = 66, + [BNXT_ULP_ACT_HID_08ea] = 67, + [BNXT_ULP_ACT_HID_07d3] = 68, + [BNXT_ULP_ACT_HID_040d] = 69, + [BNXT_ULP_ACT_HID_040f] = 70, + [BNXT_ULP_ACT_HID_0413] = 71, [BNXT_ULP_ACT_HID_0567] = 72, [BNXT_ULP_ACT_HID_0a49] = 73, [BNXT_ULP_ACT_HID_050e] = 74, - [BNXT_ULP_ACT_HID_0d0e] = 75, - [BNXT_ULP_ACT_HID_0668] = 76, - [BNXT_ULP_ACT_HID_0b4a] = 77, - [BNXT_ULP_ACT_HID_0411] = 78, - [BNXT_ULP_ACT_HID_056b] = 79, - [BNXT_ULP_ACT_HID_0a4d] = 80, - [BNXT_ULP_ACT_HID_0c11] = 81, - [BNXT_ULP_ACT_HID_0512] = 82, - [BNXT_ULP_ACT_HID_0d12] = 83, - [BNXT_ULP_ACT_HID_066c] = 84, - [BNXT_ULP_ACT_HID_0b4e] = 85 + [BNXT_ULP_ACT_HID_0668] = 75, + [BNXT_ULP_ACT_HID_0b4a] = 76, + [BNXT_ULP_ACT_HID_0411] = 77, + [BNXT_ULP_ACT_HID_056b] = 78, + [BNXT_ULP_ACT_HID_0a4d] = 79, + [BNXT_ULP_ACT_HID_0512] = 80, + [BNXT_ULP_ACT_HID_066c] = 81, + [BNXT_ULP_ACT_HID_0b4e] = 82 }; struct bnxt_ulp_act_match_info ulp_act_match_list[] = { @@ -332,6 +329,13 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 2 }, [28] = { + .act_hid = BNXT_ULP_ACT_HID_0004, + .act_sig = { .bits = + BNXT_ULP_ACTION_BIT_COUNT | + BNXT_ULP_FLOW_DIR_BITMASK_ING }, + .act_tid = 2 + }, + [29] = { .act_hid = BNXT_ULP_ACT_HID_0006, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -339,7 +343,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 2 }, - [29] = { + [30] = { .act_hid = BNXT_ULP_ACT_HID_0804, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -347,7 +351,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 2 }, - [30] = { + [31] = { .act_hid = BNXT_ULP_ACT_HID_0105, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -355,7 +359,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 2 }, - [31] = { + [32] = { .act_hid = BNXT_ULP_ACT_HID_0024, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -363,7 +367,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 2 }, - [32] = { + [33] = { .act_hid = BNXT_ULP_ACT_HID_0905, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -372,7 +376,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 2 }, - [33] = { + [34] = { .act_hid = BNXT_ULP_ACT_HID_0125, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -381,14 +385,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 2 }, - [34] = { + [35] = { .act_hid = BNXT_ULP_ACT_HID_0001, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [35] = { + [36] = { .act_hid = BNXT_ULP_ACT_HID_0005, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -396,7 +400,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [36] = { + [37] = { .act_hid = BNXT_ULP_ACT_HID_0009, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -404,7 +408,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [37] = { + [38] = { .act_hid = BNXT_ULP_ACT_HID_000d, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -413,7 +417,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [38] = { + [39] = { .act_hid = BNXT_ULP_ACT_HID_0021, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -421,7 +425,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [39] = { + [40] = { .act_hid = BNXT_ULP_ACT_HID_0029, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -430,7 +434,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [40] = { + [41] = { .act_hid = BNXT_ULP_ACT_HID_0025, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -439,7 +443,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [41] = { + [42] = { .act_hid = BNXT_ULP_ACT_HID_002d, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -449,7 +453,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [42] = { + [43] = { .act_hid = BNXT_ULP_ACT_HID_0801, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -457,7 +461,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [43] = { + [44] = { .act_hid = BNXT_ULP_ACT_HID_0809, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -466,7 +470,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [44] = { + [45] = { .act_hid = BNXT_ULP_ACT_HID_0805, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -475,7 +479,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [45] = { + [46] = { .act_hid = BNXT_ULP_ACT_HID_080d, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_MARK | @@ -485,14 +489,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 3 }, - [46] = { + [47] = { .act_hid = BNXT_ULP_ACT_HID_0c15, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_VXLAN_ENCAP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 4 }, - [47] = { + [48] = { .act_hid = BNXT_ULP_ACT_HID_0c19, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_VXLAN_ENCAP | @@ -500,14 +504,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 4 }, - [48] = { + [49] = { .act_hid = BNXT_ULP_ACT_HID_02f6, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [49] = { + [50] = { .act_hid = BNXT_ULP_ACT_HID_04f8, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | @@ -515,14 +519,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [50] = { + [51] = { .act_hid = BNXT_ULP_ACT_HID_01df, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [51] = { + [52] = { .act_hid = BNXT_ULP_ACT_HID_07e5, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_SET_IPV4_DST | @@ -531,7 +535,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [52] = { + [53] = { .act_hid = BNXT_ULP_ACT_HID_06ce, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | @@ -541,7 +545,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [53] = { + [54] = { .act_hid = BNXT_ULP_ACT_HID_02fa, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -549,7 +553,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [54] = { + [55] = { .act_hid = BNXT_ULP_ACT_HID_04fc, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -558,7 +562,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [55] = { + [56] = { .act_hid = BNXT_ULP_ACT_HID_01e3, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -566,7 +570,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [56] = { + [57] = { .act_hid = BNXT_ULP_ACT_HID_07e9, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -576,7 +580,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [57] = { + [58] = { .act_hid = BNXT_ULP_ACT_HID_06d2, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -587,7 +591,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [58] = { + [59] = { .act_hid = BNXT_ULP_ACT_HID_03f7, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -595,7 +599,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [59] = { + [60] = { .act_hid = BNXT_ULP_ACT_HID_05f9, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -604,7 +608,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [60] = { + [61] = { .act_hid = BNXT_ULP_ACT_HID_02e0, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -612,7 +616,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [61] = { + [62] = { .act_hid = BNXT_ULP_ACT_HID_08e6, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -622,7 +626,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [62] = { + [63] = { .act_hid = BNXT_ULP_ACT_HID_07cf, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -633,7 +637,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [63] = { + [64] = { .act_hid = BNXT_ULP_ACT_HID_03fb, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -642,7 +646,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [64] = { + [65] = { .act_hid = BNXT_ULP_ACT_HID_05fd, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -652,7 +656,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [65] = { + [66] = { .act_hid = BNXT_ULP_ACT_HID_02e4, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -661,7 +665,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [66] = { + [67] = { .act_hid = BNXT_ULP_ACT_HID_08ea, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -672,7 +676,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [67] = { + [68] = { .act_hid = BNXT_ULP_ACT_HID_07d3, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -684,20 +688,20 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 5 }, - [68] = { + [69] = { .act_hid = BNXT_ULP_ACT_HID_040d, .act_sig = { .bits = BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [69] = { + [70] = { .act_hid = BNXT_ULP_ACT_HID_040f, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [70] = { + [71] = { .act_hid = BNXT_ULP_ACT_HID_0413, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DROP | @@ -705,13 +709,6 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [71] = { - .act_hid = BNXT_ULP_ACT_HID_0c0d, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, [72] = { .act_hid = BNXT_ULP_ACT_HID_0567, .act_sig = { .bits = @@ -737,14 +734,6 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { .act_tid = 6 }, [75] = { - .act_hid = BNXT_ULP_ACT_HID_0d0e, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [76] = { .act_hid = BNXT_ULP_ACT_HID_0668, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -754,7 +743,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [77] = { + [76] = { .act_hid = BNXT_ULP_ACT_HID_0b4a, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | @@ -763,14 +752,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [78] = { + [77] = { .act_hid = BNXT_ULP_ACT_HID_0411, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [79] = { + [78] = { .act_hid = BNXT_ULP_ACT_HID_056b, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -780,7 +769,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [80] = { + [79] = { .act_hid = BNXT_ULP_ACT_HID_0a4d, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -789,15 +778,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [81] = { - .act_hid = BNXT_ULP_ACT_HID_0c11, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [82] = { + [80] = { .act_hid = BNXT_ULP_ACT_HID_0512, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -805,16 +786,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [83] = { - .act_hid = BNXT_ULP_ACT_HID_0d12, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [84] = { + [81] = { .act_hid = BNXT_ULP_ACT_HID_066c, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -825,7 +797,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 6 }, - [85] = { + [82] = { .act_hid = BNXT_ULP_ACT_HID_0b4e, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | @@ -1064,7 +1036,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_act_tbl_list[] = { }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, + .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, @@ -1462,11 +1434,21 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { }, { .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_DECAP_FUNC_THRU_L2, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, + .result_operand = { + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 12, @@ -2364,11 +2346,21 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { }, { .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_DECAP_FUNC_THRU_L2, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, + .result_operand = { + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 12, @@ -2593,17 +2585,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { }, { .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c index 1f650e0d79..3d133d2ff5 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c @@ -11,36 +11,36 @@ uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = { [BNXT_ULP_CLASS_HID_0138] = 1, [BNXT_ULP_CLASS_HID_03f0] = 2, - [BNXT_ULP_CLASS_HID_0134] = 3, - [BNXT_ULP_CLASS_HID_03fc] = 4, - [BNXT_ULP_CLASS_HID_0139] = 5, - [BNXT_ULP_CLASS_HID_03f1] = 6, - [BNXT_ULP_CLASS_HID_068b] = 7, - [BNXT_ULP_CLASS_HID_0143] = 8, - [BNXT_ULP_CLASS_HID_0135] = 9, - [BNXT_ULP_CLASS_HID_03fd] = 10, - [BNXT_ULP_CLASS_HID_0687] = 11, - [BNXT_ULP_CLASS_HID_014f] = 12, - [BNXT_ULP_CLASS_HID_0118] = 13, - [BNXT_ULP_CLASS_HID_03d0] = 14, - [BNXT_ULP_CLASS_HID_0114] = 15, - [BNXT_ULP_CLASS_HID_03dc] = 16, - [BNXT_ULP_CLASS_HID_0119] = 17, - [BNXT_ULP_CLASS_HID_03d1] = 18, - [BNXT_ULP_CLASS_HID_06ab] = 19, - [BNXT_ULP_CLASS_HID_0163] = 20, - [BNXT_ULP_CLASS_HID_0115] = 21, - [BNXT_ULP_CLASS_HID_03dd] = 22, - [BNXT_ULP_CLASS_HID_06a7] = 23, - [BNXT_ULP_CLASS_HID_016f] = 24, - [BNXT_ULP_CLASS_HID_0128] = 25, - [BNXT_ULP_CLASS_HID_03e0] = 26, - [BNXT_ULP_CLASS_HID_0124] = 27, - [BNXT_ULP_CLASS_HID_03ec] = 28, - [BNXT_ULP_CLASS_HID_0129] = 29, - [BNXT_ULP_CLASS_HID_03e1] = 30, - [BNXT_ULP_CLASS_HID_069b] = 31, - [BNXT_ULP_CLASS_HID_0153] = 32, + [BNXT_ULP_CLASS_HID_0139] = 3, + [BNXT_ULP_CLASS_HID_03f1] = 4, + [BNXT_ULP_CLASS_HID_068b] = 5, + [BNXT_ULP_CLASS_HID_0143] = 6, + [BNXT_ULP_CLASS_HID_0118] = 7, + [BNXT_ULP_CLASS_HID_03d0] = 8, + [BNXT_ULP_CLASS_HID_0119] = 9, + [BNXT_ULP_CLASS_HID_03d1] = 10, + [BNXT_ULP_CLASS_HID_06ab] = 11, + [BNXT_ULP_CLASS_HID_0163] = 12, + [BNXT_ULP_CLASS_HID_0128] = 13, + [BNXT_ULP_CLASS_HID_03e0] = 14, + [BNXT_ULP_CLASS_HID_0129] = 15, + [BNXT_ULP_CLASS_HID_03e1] = 16, + [BNXT_ULP_CLASS_HID_069b] = 17, + [BNXT_ULP_CLASS_HID_0153] = 18, + [BNXT_ULP_CLASS_HID_0134] = 19, + [BNXT_ULP_CLASS_HID_03fc] = 20, + [BNXT_ULP_CLASS_HID_0135] = 21, + [BNXT_ULP_CLASS_HID_03fd] = 22, + [BNXT_ULP_CLASS_HID_0687] = 23, + [BNXT_ULP_CLASS_HID_014f] = 24, + [BNXT_ULP_CLASS_HID_0114] = 25, + [BNXT_ULP_CLASS_HID_03dc] = 26, + [BNXT_ULP_CLASS_HID_0115] = 27, + [BNXT_ULP_CLASS_HID_03dd] = 28, + [BNXT_ULP_CLASS_HID_06a7] = 29, + [BNXT_ULP_CLASS_HID_016f] = 30, + [BNXT_ULP_CLASS_HID_0124] = 31, + [BNXT_ULP_CLASS_HID_03ec] = 32, [BNXT_ULP_CLASS_HID_0125] = 33, [BNXT_ULP_CLASS_HID_03ed] = 34, [BNXT_ULP_CLASS_HID_0697] = 35, @@ -153,36 +153,36 @@ uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = { [BNXT_ULP_CLASS_HID_077f] = 142, [BNXT_ULP_CLASS_HID_01e1] = 143, [BNXT_ULP_CLASS_HID_0329] = 144, - [BNXT_ULP_CLASS_HID_01dd] = 145, - [BNXT_ULP_CLASS_HID_0315] = 146, - [BNXT_ULP_CLASS_HID_01c1] = 147, - [BNXT_ULP_CLASS_HID_0309] = 148, - [BNXT_ULP_CLASS_HID_003d] = 149, - [BNXT_ULP_CLASS_HID_02f5] = 150, - [BNXT_ULP_CLASS_HID_01d1] = 151, - [BNXT_ULP_CLASS_HID_0319] = 152, - [BNXT_ULP_CLASS_HID_01cd] = 153, - [BNXT_ULP_CLASS_HID_0305] = 154, - [BNXT_ULP_CLASS_HID_01e2] = 155, - [BNXT_ULP_CLASS_HID_032a] = 156, - [BNXT_ULP_CLASS_HID_0650] = 157, - [BNXT_ULP_CLASS_HID_0198] = 158, - [BNXT_ULP_CLASS_HID_01de] = 159, - [BNXT_ULP_CLASS_HID_0316] = 160, - [BNXT_ULP_CLASS_HID_066c] = 161, - [BNXT_ULP_CLASS_HID_01a4] = 162, - [BNXT_ULP_CLASS_HID_01c2] = 163, - [BNXT_ULP_CLASS_HID_030a] = 164, - [BNXT_ULP_CLASS_HID_0670] = 165, - [BNXT_ULP_CLASS_HID_01b8] = 166, - [BNXT_ULP_CLASS_HID_003e] = 167, - [BNXT_ULP_CLASS_HID_02f6] = 168, - [BNXT_ULP_CLASS_HID_078c] = 169, - [BNXT_ULP_CLASS_HID_0044] = 170, - [BNXT_ULP_CLASS_HID_01d2] = 171, - [BNXT_ULP_CLASS_HID_031a] = 172, - [BNXT_ULP_CLASS_HID_0660] = 173, - [BNXT_ULP_CLASS_HID_01a8] = 174, + [BNXT_ULP_CLASS_HID_01c1] = 145, + [BNXT_ULP_CLASS_HID_0309] = 146, + [BNXT_ULP_CLASS_HID_01d1] = 147, + [BNXT_ULP_CLASS_HID_0319] = 148, + [BNXT_ULP_CLASS_HID_01e2] = 149, + [BNXT_ULP_CLASS_HID_032a] = 150, + [BNXT_ULP_CLASS_HID_0650] = 151, + [BNXT_ULP_CLASS_HID_0198] = 152, + [BNXT_ULP_CLASS_HID_01c2] = 153, + [BNXT_ULP_CLASS_HID_030a] = 154, + [BNXT_ULP_CLASS_HID_0670] = 155, + [BNXT_ULP_CLASS_HID_01b8] = 156, + [BNXT_ULP_CLASS_HID_01d2] = 157, + [BNXT_ULP_CLASS_HID_031a] = 158, + [BNXT_ULP_CLASS_HID_0660] = 159, + [BNXT_ULP_CLASS_HID_01a8] = 160, + [BNXT_ULP_CLASS_HID_01dd] = 161, + [BNXT_ULP_CLASS_HID_0315] = 162, + [BNXT_ULP_CLASS_HID_003d] = 163, + [BNXT_ULP_CLASS_HID_02f5] = 164, + [BNXT_ULP_CLASS_HID_01cd] = 165, + [BNXT_ULP_CLASS_HID_0305] = 166, + [BNXT_ULP_CLASS_HID_01de] = 167, + [BNXT_ULP_CLASS_HID_0316] = 168, + [BNXT_ULP_CLASS_HID_066c] = 169, + [BNXT_ULP_CLASS_HID_01a4] = 170, + [BNXT_ULP_CLASS_HID_003e] = 171, + [BNXT_ULP_CLASS_HID_02f6] = 172, + [BNXT_ULP_CLASS_HID_078c] = 173, + [BNXT_ULP_CLASS_HID_0044] = 174, [BNXT_ULP_CLASS_HID_01ce] = 175, [BNXT_ULP_CLASS_HID_0306] = 176, [BNXT_ULP_CLASS_HID_067c] = 177, @@ -218,10 +218,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 1 }, [3] = { - .class_hid = BNXT_ULP_CLASS_HID_0134, + .class_hid = BNXT_ULP_CLASS_HID_0139, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -232,10 +233,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 2 }, [4] = { - .class_hid = BNXT_ULP_CLASS_HID_03fc, + .class_hid = BNXT_ULP_CLASS_HID_03f1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -245,7 +247,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 3 }, [5] = { - .class_hid = BNXT_ULP_CLASS_HID_0139, + .class_hid = BNXT_ULP_CLASS_HID_068b, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | @@ -255,12 +257,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, .class_tid = 6, .wc_pri = 4 }, [6] = { - .class_hid = BNXT_ULP_CLASS_HID_03f1, + .class_hid = BNXT_ULP_CLASS_HID_0143, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | @@ -269,47 +272,47 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, .class_tid = 6, .wc_pri = 5 }, [7] = { - .class_hid = BNXT_ULP_CLASS_HID_068b, + .class_hid = BNXT_ULP_CLASS_HID_0118, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, .class_tid = 6, .wc_pri = 6 }, [8] = { - .class_hid = BNXT_ULP_CLASS_HID_0143, + .class_hid = BNXT_ULP_CLASS_HID_03d0, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, .class_tid = 6, .wc_pri = 7 }, [9] = { - .class_hid = BNXT_ULP_CLASS_HID_0135, + .class_hid = BNXT_ULP_CLASS_HID_0119, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -320,11 +323,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 8 }, [10] = { - .class_hid = BNXT_ULP_CLASS_HID_03fd, + .class_hid = BNXT_ULP_CLASS_HID_03d1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -334,11 +338,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 9 }, [11] = { - .class_hid = BNXT_ULP_CLASS_HID_0687, + .class_hid = BNXT_ULP_CLASS_HID_06ab, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -350,11 +355,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 10 }, [12] = { - .class_hid = BNXT_ULP_CLASS_HID_014f, + .class_hid = BNXT_ULP_CLASS_HID_0163, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -365,11 +371,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 11 }, [13] = { - .class_hid = BNXT_ULP_CLASS_HID_0118, + .class_hid = BNXT_ULP_CLASS_HID_0128, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -380,11 +386,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 12 }, [14] = { - .class_hid = BNXT_ULP_CLASS_HID_03d0, + .class_hid = BNXT_ULP_CLASS_HID_03e0, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -394,11 +400,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 13 }, [15] = { - .class_hid = BNXT_ULP_CLASS_HID_0114, + .class_hid = BNXT_ULP_CLASS_HID_0129, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -409,11 +416,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 14 }, [16] = { - .class_hid = BNXT_ULP_CLASS_HID_03dc, + .class_hid = BNXT_ULP_CLASS_HID_03e1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | @@ -423,254 +431,246 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { .wc_pri = 15 }, [17] = { - .class_hid = BNXT_ULP_CLASS_HID_0119, + .class_hid = BNXT_ULP_CLASS_HID_069b, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, .class_tid = 6, .wc_pri = 16 }, [18] = { - .class_hid = BNXT_ULP_CLASS_HID_03d1, + .class_hid = BNXT_ULP_CLASS_HID_0153, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, .class_tid = 6, .wc_pri = 17 }, [19] = { - .class_hid = BNXT_ULP_CLASS_HID_06ab, + .class_hid = BNXT_ULP_CLASS_HID_0134, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 18 + .class_tid = 7, + .wc_pri = 0 }, [20] = { - .class_hid = BNXT_ULP_CLASS_HID_0163, + .class_hid = BNXT_ULP_CLASS_HID_03fc, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 19 + .class_tid = 7, + .wc_pri = 1 }, [21] = { - .class_hid = BNXT_ULP_CLASS_HID_0115, + .class_hid = BNXT_ULP_CLASS_HID_0135, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 20 + .class_tid = 7, + .wc_pri = 2 }, [22] = { - .class_hid = BNXT_ULP_CLASS_HID_03dd, + .class_hid = BNXT_ULP_CLASS_HID_03fd, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 21 + .class_tid = 7, + .wc_pri = 3 }, [23] = { - .class_hid = BNXT_ULP_CLASS_HID_06a7, + .class_hid = BNXT_ULP_CLASS_HID_0687, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 22 + .class_tid = 7, + .wc_pri = 4 }, [24] = { - .class_hid = BNXT_ULP_CLASS_HID_016f, + .class_hid = BNXT_ULP_CLASS_HID_014f, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 23 + .class_tid = 7, + .wc_pri = 5 }, [25] = { - .class_hid = BNXT_ULP_CLASS_HID_0128, + .class_hid = BNXT_ULP_CLASS_HID_0114, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 24 + .class_tid = 7, + .wc_pri = 6 }, [26] = { - .class_hid = BNXT_ULP_CLASS_HID_03e0, + .class_hid = BNXT_ULP_CLASS_HID_03dc, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 25 + .class_tid = 7, + .wc_pri = 7 }, [27] = { - .class_hid = BNXT_ULP_CLASS_HID_0124, + .class_hid = BNXT_ULP_CLASS_HID_0115, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 26 + .class_tid = 7, + .wc_pri = 8 }, [28] = { - .class_hid = BNXT_ULP_CLASS_HID_03ec, + .class_hid = BNXT_ULP_CLASS_HID_03dd, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 27 + .class_tid = 7, + .wc_pri = 9 }, [29] = { - .class_hid = BNXT_ULP_CLASS_HID_0129, + .class_hid = BNXT_ULP_CLASS_HID_06a7, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 28 + .class_tid = 7, + .wc_pri = 10 }, [30] = { - .class_hid = BNXT_ULP_CLASS_HID_03e1, + .class_hid = BNXT_ULP_CLASS_HID_016f, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 29 + .class_tid = 7, + .wc_pri = 11 }, [31] = { - .class_hid = BNXT_ULP_CLASS_HID_069b, + .class_hid = BNXT_ULP_CLASS_HID_0124, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 30 + .class_tid = 7, + .wc_pri = 12 }, [32] = { - .class_hid = BNXT_ULP_CLASS_HID_0153, + .class_hid = BNXT_ULP_CLASS_HID_03ec, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 31 + .class_tid = 7, + .wc_pri = 13 }, [33] = { .class_hid = BNXT_ULP_CLASS_HID_0125, @@ -681,12 +681,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 32 + .class_tid = 7, + .wc_pri = 14 }, [34] = { .class_hid = BNXT_ULP_CLASS_HID_03ed, @@ -697,11 +697,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 33 + .class_tid = 7, + .wc_pri = 15 }, [35] = { .class_hid = BNXT_ULP_CLASS_HID_0697, @@ -712,13 +712,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 34 + .class_tid = 7, + .wc_pri = 16 }, [36] = { .class_hid = BNXT_ULP_CLASS_HID_015f, @@ -729,12 +729,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 35 + .class_tid = 7, + .wc_pri = 17 }, [37] = { .class_hid = BNXT_ULP_CLASS_HID_0452, @@ -744,14 +744,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF8_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, + .class_tid = 8, .wc_pri = 0 }, [38] = { @@ -762,13 +762,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, + .class_tid = 8, .wc_pri = 1 }, [39] = { @@ -779,13 +779,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF8_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, + .class_tid = 8, .wc_pri = 2 }, [40] = { @@ -796,12 +796,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, + .class_tid = 8, .wc_pri = 3 }, [41] = { @@ -812,14 +812,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF9_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, + .class_tid = 9, .wc_pri = 0 }, [42] = { @@ -830,13 +830,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, + .class_tid = 9, .wc_pri = 1 }, [43] = { @@ -847,13 +847,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF9_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, + .class_tid = 9, .wc_pri = 2 }, [44] = { @@ -864,12 +864,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, + .class_tid = 9, .wc_pri = 3 }, [45] = { @@ -880,14 +880,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF10_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, + .class_tid = 10, .wc_pri = 0 }, [46] = { @@ -898,13 +898,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF10_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, + .class_tid = 10, .wc_pri = 1 }, [47] = { @@ -915,13 +915,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, + .class_tid = 10, .wc_pri = 2 }, [48] = { @@ -932,12 +932,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, + .class_tid = 10, .wc_pri = 3 }, [49] = { @@ -948,14 +948,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, + .class_tid = 11, .wc_pri = 0 }, [50] = { @@ -966,13 +966,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, + .class_tid = 11, .wc_pri = 1 }, [51] = { @@ -983,13 +983,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, + .class_tid = 11, .wc_pri = 2 }, [52] = { @@ -1000,12 +1000,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, + .class_tid = 11, .wc_pri = 3 }, [53] = { @@ -1016,15 +1016,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 0 }, [54] = { @@ -1035,14 +1035,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 1 }, [55] = { @@ -1053,14 +1053,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 2 }, [56] = { @@ -1071,13 +1071,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 3 }, [57] = { @@ -1089,16 +1089,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 4 }, [58] = { @@ -1110,15 +1110,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 5 }, [59] = { @@ -1130,15 +1130,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 6 }, [60] = { @@ -1150,14 +1150,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 7 }, [61] = { @@ -1169,15 +1169,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 8 }, [62] = { @@ -1189,14 +1189,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 9 }, [63] = { @@ -1208,14 +1208,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 10 }, [64] = { @@ -1227,13 +1227,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, + .class_tid = 12, .wc_pri = 11 }, [65] = { @@ -1244,15 +1244,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 0 }, [66] = { @@ -1263,14 +1263,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 1 }, [67] = { @@ -1281,14 +1281,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 2 }, [68] = { @@ -1299,13 +1299,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 3 }, [69] = { @@ -1317,16 +1317,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 4 }, [70] = { @@ -1338,15 +1338,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 5 }, [71] = { @@ -1358,15 +1358,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 6 }, [72] = { @@ -1378,14 +1378,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 7 }, [73] = { @@ -1397,15 +1397,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 8 }, [74] = { @@ -1417,14 +1417,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 9 }, [75] = { @@ -1436,14 +1436,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 10 }, [76] = { @@ -1455,13 +1455,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, + .class_tid = 13, .wc_pri = 11 }, [77] = { @@ -1472,15 +1472,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 0 }, [78] = { @@ -1491,14 +1491,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 1 }, [79] = { @@ -1509,14 +1509,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 2 }, [80] = { @@ -1527,13 +1527,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 3 }, [81] = { @@ -1545,16 +1545,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 4 }, [82] = { @@ -1566,15 +1566,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 5 }, [83] = { @@ -1586,15 +1586,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 6 }, [84] = { @@ -1606,14 +1606,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 7 }, [85] = { @@ -1625,15 +1625,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 8 }, [86] = { @@ -1645,14 +1645,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 9 }, [87] = { @@ -1664,14 +1664,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 10 }, [88] = { @@ -1683,13 +1683,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, + .class_tid = 14, .wc_pri = 11 }, [89] = { @@ -1700,15 +1700,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 0 }, [90] = { @@ -1719,14 +1719,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 1 }, [91] = { @@ -1737,14 +1737,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 2 }, [92] = { @@ -1755,13 +1755,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 3 }, [93] = { @@ -1773,16 +1773,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 4 }, [94] = { @@ -1794,15 +1794,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 5 }, [95] = { @@ -1814,15 +1814,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 6 }, [96] = { @@ -1834,14 +1834,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 7 }, [97] = { @@ -1853,15 +1853,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 8 }, [98] = { @@ -1873,14 +1873,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 9 }, [99] = { @@ -1892,14 +1892,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 10 }, [100] = { @@ -1911,13 +1911,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, + .class_tid = 15, .wc_pri = 11 }, [101] = { @@ -1932,19 +1932,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF15_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF15_BITMASK_I_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID | - BNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT | + BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF16_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF16_BITMASK_I_ETH_TYPE | + BNXT_ULP_HF16_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF16_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF16_BITMASK_I_IPV4_PROTO_ID | + BNXT_ULP_HF16_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF16_BITMASK_I_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, + .class_tid = 16, .wc_pri = 0 }, [102] = { @@ -1959,17 +1959,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_I_UDP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF15_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR | - BNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID | - BNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT | + BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF16_BITMASK_T_VXLAN_VNI | + BNXT_ULP_HF16_BITMASK_I_IPV4_SRC_ADDR | + BNXT_ULP_HF16_BITMASK_I_IPV4_DST_ADDR | + BNXT_ULP_HF16_BITMASK_I_IPV4_PROTO_ID | + BNXT_ULP_HF16_BITMASK_I_UDP_SRC_PORT | + BNXT_ULP_HF16_BITMASK_I_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, + .class_tid = 16, .wc_pri = 1 }, [103] = { @@ -1981,14 +1981,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 0 }, [104] = { @@ -2000,13 +2000,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 1 }, [105] = { @@ -2018,13 +2018,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 2 }, [106] = { @@ -2036,12 +2036,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 3 }, [107] = { @@ -2053,13 +2053,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 4 }, [108] = { @@ -2071,12 +2071,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 5 }, [109] = { @@ -2088,12 +2088,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 6 }, [110] = { @@ -2105,11 +2105,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 7 }, [111] = { @@ -2122,15 +2122,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 8 }, [112] = { @@ -2143,14 +2143,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 9 }, [113] = { @@ -2163,14 +2163,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 10 }, [114] = { @@ -2183,13 +2183,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 11 }, [115] = { @@ -2202,14 +2202,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 12 }, [116] = { @@ -2222,13 +2222,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 13 }, [117] = { @@ -2241,13 +2241,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 14 }, [118] = { @@ -2260,12 +2260,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 15 }, [119] = { @@ -2278,14 +2278,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 16 }, [120] = { @@ -2298,13 +2298,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 17 }, [121] = { @@ -2317,13 +2317,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 18 }, [122] = { @@ -2336,12 +2336,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 19 }, [123] = { @@ -2354,13 +2354,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 20 }, [124] = { @@ -2373,12 +2373,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 21 }, [125] = { @@ -2391,12 +2391,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 22 }, [126] = { @@ -2409,11 +2409,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_T_VXLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, + .class_tid = 17, .wc_pri = 23 }, [127] = { @@ -2424,14 +2424,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, + .class_tid = 18, .wc_pri = 0 }, [128] = { @@ -2442,13 +2442,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, + .class_tid = 18, .wc_pri = 1 }, [129] = { @@ -2459,13 +2459,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, + .class_tid = 18, .wc_pri = 2 }, [130] = { @@ -2476,12 +2476,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, + .class_tid = 18, .wc_pri = 3 }, [131] = { @@ -2492,14 +2492,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF19_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, + .class_tid = 19, .wc_pri = 0 }, [132] = { @@ -2510,13 +2510,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF19_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, + .class_tid = 19, .wc_pri = 1 }, [133] = { @@ -2527,13 +2527,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, + .class_tid = 19, .wc_pri = 2 }, [134] = { @@ -2544,12 +2544,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, + .class_tid = 19, .wc_pri = 3 }, [135] = { @@ -2560,14 +2560,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF20_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, + .class_tid = 20, .wc_pri = 0 }, [136] = { @@ -2578,13 +2578,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF20_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, + .class_tid = 20, .wc_pri = 1 }, [137] = { @@ -2595,13 +2595,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, + .class_tid = 20, .wc_pri = 2 }, [138] = { @@ -2612,12 +2612,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | + BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, + .class_tid = 20, .wc_pri = 3 }, [139] = { @@ -2628,14 +2628,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, + .class_tid = 21, .wc_pri = 0 }, [140] = { @@ -2646,13 +2646,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, + .class_tid = 21, .wc_pri = 1 }, [141] = { @@ -2663,13 +2663,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID | + BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, + .class_tid = 21, .wc_pri = 2 }, [142] = { @@ -2680,12 +2680,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR | + BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR | + BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, + .class_tid = 21, .wc_pri = 3 }, [143] = { @@ -2695,11 +2695,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 0 }, [144] = { @@ -2709,466 +2709,466 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 1 }, [145] = { - .class_hid = BNXT_ULP_CLASS_HID_01dd, + .class_hid = BNXT_ULP_CLASS_HID_01c1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 2 }, [146] = { - .class_hid = BNXT_ULP_CLASS_HID_0315, + .class_hid = BNXT_ULP_CLASS_HID_0309, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 3 }, [147] = { - .class_hid = BNXT_ULP_CLASS_HID_01c1, + .class_hid = BNXT_ULP_CLASS_HID_01d1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 4 }, [148] = { - .class_hid = BNXT_ULP_CLASS_HID_0309, + .class_hid = BNXT_ULP_CLASS_HID_0319, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 5 }, [149] = { - .class_hid = BNXT_ULP_CLASS_HID_003d, + .class_hid = BNXT_ULP_CLASS_HID_01e2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 6 }, [150] = { - .class_hid = BNXT_ULP_CLASS_HID_02f5, + .class_hid = BNXT_ULP_CLASS_HID_032a, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 7 }, [151] = { - .class_hid = BNXT_ULP_CLASS_HID_01d1, + .class_hid = BNXT_ULP_CLASS_HID_0650, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 8 }, [152] = { - .class_hid = BNXT_ULP_CLASS_HID_0319, + .class_hid = BNXT_ULP_CLASS_HID_0198, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 9 }, [153] = { - .class_hid = BNXT_ULP_CLASS_HID_01cd, + .class_hid = BNXT_ULP_CLASS_HID_01c2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 10 }, [154] = { - .class_hid = BNXT_ULP_CLASS_HID_0305, + .class_hid = BNXT_ULP_CLASS_HID_030a, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 11 }, [155] = { - .class_hid = BNXT_ULP_CLASS_HID_01e2, + .class_hid = BNXT_ULP_CLASS_HID_0670, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 12 }, [156] = { - .class_hid = BNXT_ULP_CLASS_HID_032a, + .class_hid = BNXT_ULP_CLASS_HID_01b8, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 13 }, [157] = { - .class_hid = BNXT_ULP_CLASS_HID_0650, + .class_hid = BNXT_ULP_CLASS_HID_01d2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 14 }, [158] = { - .class_hid = BNXT_ULP_CLASS_HID_0198, + .class_hid = BNXT_ULP_CLASS_HID_031a, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 15 }, [159] = { - .class_hid = BNXT_ULP_CLASS_HID_01de, + .class_hid = BNXT_ULP_CLASS_HID_0660, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF22_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 16 }, [160] = { - .class_hid = BNXT_ULP_CLASS_HID_0316, + .class_hid = BNXT_ULP_CLASS_HID_01a8, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF22_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, + .class_tid = 22, .wc_pri = 17 }, [161] = { - .class_hid = BNXT_ULP_CLASS_HID_066c, + .class_hid = BNXT_ULP_CLASS_HID_01dd, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 18 + .class_tid = 23, + .wc_pri = 0 }, [162] = { - .class_hid = BNXT_ULP_CLASS_HID_01a4, + .class_hid = BNXT_ULP_CLASS_HID_0315, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 19 + .class_tid = 23, + .wc_pri = 1 }, [163] = { - .class_hid = BNXT_ULP_CLASS_HID_01c2, + .class_hid = BNXT_ULP_CLASS_HID_003d, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 20 + .class_tid = 23, + .wc_pri = 2 }, [164] = { - .class_hid = BNXT_ULP_CLASS_HID_030a, + .class_hid = BNXT_ULP_CLASS_HID_02f5, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_IPV6 | BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 21 + .class_tid = 23, + .wc_pri = 3 }, [165] = { - .class_hid = BNXT_ULP_CLASS_HID_0670, + .class_hid = BNXT_ULP_CLASS_HID_01cd, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 22 + .class_tid = 23, + .wc_pri = 4 }, [166] = { - .class_hid = BNXT_ULP_CLASS_HID_01b8, + .class_hid = BNXT_ULP_CLASS_HID_0305, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 23 + .class_tid = 23, + .wc_pri = 5 }, [167] = { - .class_hid = BNXT_ULP_CLASS_HID_003e, + .class_hid = BNXT_ULP_CLASS_HID_01de, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 24 + .class_tid = 23, + .wc_pri = 6 }, [168] = { - .class_hid = BNXT_ULP_CLASS_HID_02f6, + .class_hid = BNXT_ULP_CLASS_HID_0316, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 25 + .class_tid = 23, + .wc_pri = 7 }, [169] = { - .class_hid = BNXT_ULP_CLASS_HID_078c, + .class_hid = BNXT_ULP_CLASS_HID_066c, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF23_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 26 + .class_tid = 23, + .wc_pri = 8 }, [170] = { - .class_hid = BNXT_ULP_CLASS_HID_0044, + .class_hid = BNXT_ULP_CLASS_HID_01a4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 27 + .class_tid = 23, + .wc_pri = 9 }, [171] = { - .class_hid = BNXT_ULP_CLASS_HID_01d2, + .class_hid = BNXT_ULP_CLASS_HID_003e, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 28 + .class_tid = 23, + .wc_pri = 10 }, [172] = { - .class_hid = BNXT_ULP_CLASS_HID_031a, + .class_hid = BNXT_ULP_CLASS_HID_02f6, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 29 + .class_tid = 23, + .wc_pri = 11 }, [173] = { - .class_hid = BNXT_ULP_CLASS_HID_0660, + .class_hid = BNXT_ULP_CLASS_HID_078c, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF23_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 30 + .class_tid = 23, + .wc_pri = 12 }, [174] = { - .class_hid = BNXT_ULP_CLASS_HID_01a8, + .class_hid = BNXT_ULP_CLASS_HID_0044, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | + BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_UDP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 31 + .class_tid = 23, + .wc_pri = 13 }, [175] = { .class_hid = BNXT_ULP_CLASS_HID_01ce, @@ -3179,12 +3179,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 32 + .class_tid = 23, + .wc_pri = 14 }, [176] = { .class_hid = BNXT_ULP_CLASS_HID_0306, @@ -3195,11 +3195,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 33 + .class_tid = 23, + .wc_pri = 15 }, [177] = { .class_hid = BNXT_ULP_CLASS_HID_067c, @@ -3210,13 +3210,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF23_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 34 + .class_tid = 23, + .wc_pri = 16 }, [178] = { .class_hid = BNXT_ULP_CLASS_HID_01b4, @@ -3227,12 +3227,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC | + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF23_BITMASK_OO_VLAN_VID | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 35 + .class_tid = 23, + .wc_pri = 17 } }; @@ -3282,7 +3282,7 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = { [((7 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, + .num_tbls = 4, .start_tbl_idx = 32, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, @@ -3290,28 +3290,28 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = { BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, - .start_tbl_idx = 37, + .start_tbl_idx = 36, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, [((9 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, - .start_tbl_idx = 42, + .start_tbl_idx = 41, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, [((10 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, - .start_tbl_idx = 47, + .start_tbl_idx = 46, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, [((11 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 4, - .start_tbl_idx = 52, + .num_tbls = 5, + .start_tbl_idx = 51, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, [((12 << BNXT_ULP_LOG2_MAX_NUM_DEV) | @@ -3352,7 +3352,7 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = { [((17 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, + .num_tbls = 4, .start_tbl_idx = 76, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, @@ -3360,28 +3360,42 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = { BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, - .start_tbl_idx = 81, + .start_tbl_idx = 80, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, [((19 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, - .start_tbl_idx = 86, + .start_tbl_idx = 85, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, [((20 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, - .start_tbl_idx = 91, + .start_tbl_idx = 90, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR }, [((21 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 5, + .start_tbl_idx = 95, + .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR + }, + [((22 << BNXT_ULP_LOG2_MAX_NUM_DEV) | + BNXT_ULP_DEVICE_ID_WH_PLUS)] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, + .num_tbls = 4, + .start_tbl_idx = 100, + .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR + }, + [((23 << BNXT_ULP_LOG2_MAX_NUM_DEV) | + BNXT_ULP_DEVICE_ID_WH_PLUS)] = { + .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 4, - .start_tbl_idx = 96, + .start_tbl_idx = 104, .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR } }; @@ -3580,7 +3594,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .direction = TF_DIR_TX, @@ -3883,38 +3897,21 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .key_start_idx = 177, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, .result_start_idx = 315, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 1 - }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 178, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 316, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 6, - .ident_nums = 0, + .ident_start_idx = 5, + .ident_nums = 1, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, @@ -3924,11 +3921,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, .direction = TF_DIR_RX, - .key_start_idx = 191, + .key_start_idx = 190, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 329, + .result_start_idx = 328, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -3939,13 +3936,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .priority = BNXT_ULP_PRIORITY_LEVEL_1, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 194, + .key_start_idx = 193, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 330, + .result_start_idx = 329, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -3958,11 +3955,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, - .key_start_idx = 236, + .key_start_idx = 235, .blob_key_bit_size = 200, .key_bit_size = 200, .key_num_fields = 11, - .result_start_idx = 338, + .result_start_idx = 337, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -3977,11 +3974,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, - .key_start_idx = 247, + .key_start_idx = 246, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 347, + .result_start_idx = 346, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -3994,11 +3991,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 248, + .key_start_idx = 247, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 348, + .result_start_idx = 347, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, @@ -4013,11 +4010,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, .direction = TF_DIR_RX, - .key_start_idx = 261, + .key_start_idx = 260, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 361, + .result_start_idx = 360, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4030,11 +4027,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 264, + .key_start_idx = 263, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 362, + .result_start_idx = 361, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -4047,11 +4044,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, - .key_start_idx = 306, + .key_start_idx = 305, .blob_key_bit_size = 200, .key_bit_size = 200, .key_num_fields = 11, - .result_start_idx = 370, + .result_start_idx = 369, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -4066,11 +4063,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, - .key_start_idx = 317, + .key_start_idx = 316, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 379, + .result_start_idx = 378, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4083,11 +4080,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 318, + .key_start_idx = 317, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 380, + .result_start_idx = 379, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, @@ -4102,11 +4099,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, .direction = TF_DIR_RX, - .key_start_idx = 331, + .key_start_idx = 330, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 393, + .result_start_idx = 392, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4119,11 +4116,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 334, + .key_start_idx = 333, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 394, + .result_start_idx = 393, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -4136,11 +4133,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, - .key_start_idx = 376, - .blob_key_bit_size = 392, - .key_bit_size = 392, + .key_start_idx = 375, + .blob_key_bit_size = 200, + .key_bit_size = 200, .key_num_fields = 11, - .result_start_idx = 402, + .result_start_idx = 401, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -4155,11 +4152,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, - .key_start_idx = 387, + .key_start_idx = 386, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 411, + .result_start_idx = 410, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4172,11 +4169,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 388, + .key_start_idx = 387, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 412, + .result_start_idx = 411, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, @@ -4191,11 +4188,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, .direction = TF_DIR_RX, - .key_start_idx = 401, + .key_start_idx = 400, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 425, + .result_start_idx = 424, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4208,11 +4205,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 404, + .key_start_idx = 403, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 426, + .result_start_idx = 425, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -4225,11 +4222,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, - .key_start_idx = 446, + .key_start_idx = 445, .blob_key_bit_size = 392, .key_bit_size = 392, .key_num_fields = 11, - .result_start_idx = 434, + .result_start_idx = 433, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -4239,11 +4236,28 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + .direction = TF_DIR_RX, + .key_start_idx = 456, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 442, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 13, + .ident_nums = 1 + }, + { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .key_start_idx = 457, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -4252,8 +4266,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 1, + .ident_start_idx = 14, + .ident_nums = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, @@ -4298,8 +4312,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, .key_start_idx = 515, - .blob_key_bit_size = 200, - .key_bit_size = 200, + .blob_key_bit_size = 392, + .key_bit_size = 392, .key_num_fields = 11, .result_start_idx = 465, .result_bit_size = 64, @@ -4514,8 +4528,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, .key_start_idx = 722, - .blob_key_bit_size = 200, - .key_bit_size = 200, + .blob_key_bit_size = 392, + .key_bit_size = 392, .key_num_fields = 11, .result_start_idx = 558, .result_bit_size = 64, @@ -4531,7 +4545,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .key_start_idx = 733, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -4586,8 +4600,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_RX, .key_start_idx = 791, - .blob_key_bit_size = 200, - .key_bit_size = 200, + .blob_key_bit_size = 392, + .key_bit_size = 392, .key_num_fields = 11, .result_start_idx = 589, .result_bit_size = 64, @@ -4603,7 +4617,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .key_start_idx = 802, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -4671,38 +4685,21 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 871, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 629, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 1 - }, - { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 872, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .key_start_idx = 871, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 630, + .result_start_idx = 629, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 26, - .ident_nums = 0, + .ident_start_idx = 25, + .ident_nums = 1, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, @@ -4711,12 +4708,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 885, + .direction = TF_DIR_RX, + .key_start_idx = 884, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 643, + .result_start_idx = 642, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4726,14 +4723,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, + .direction = TF_DIR_RX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 888, + .key_start_idx = 887, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 644, + .result_start_idx = 643, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -4745,12 +4742,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .direction = TF_DIR_TX, - .key_start_idx = 930, + .direction = TF_DIR_RX, + .key_start_idx = 929, .blob_key_bit_size = 200, .key_bit_size = 200, .key_num_fields = 11, - .result_start_idx = 652, + .result_start_idx = 651, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -4765,11 +4762,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 941, + .key_start_idx = 940, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 661, + .result_start_idx = 660, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4782,11 +4779,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_TX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 942, + .key_start_idx = 941, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 662, + .result_start_idx = 661, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, @@ -4801,11 +4798,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 955, + .key_start_idx = 954, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 675, + .result_start_idx = 674, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4818,11 +4815,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_TX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 958, + .key_start_idx = 957, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 676, + .result_start_idx = 675, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -4835,11 +4832,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_TX, - .key_start_idx = 1000, + .key_start_idx = 999, .blob_key_bit_size = 200, .key_bit_size = 200, .key_num_fields = 11, - .result_start_idx = 684, + .result_start_idx = 683, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -4854,11 +4851,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 1011, + .key_start_idx = 1010, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 693, + .result_start_idx = 692, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4871,11 +4868,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_TX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 1012, + .key_start_idx = 1011, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 694, + .result_start_idx = 693, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, @@ -4890,11 +4887,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 1025, + .key_start_idx = 1024, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 707, + .result_start_idx = 706, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4907,11 +4904,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_TX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 1028, + .key_start_idx = 1027, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 708, + .result_start_idx = 707, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -4924,11 +4921,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_TX, - .key_start_idx = 1070, - .blob_key_bit_size = 392, - .key_bit_size = 392, + .key_start_idx = 1069, + .blob_key_bit_size = 200, + .key_bit_size = 200, .key_num_fields = 11, - .result_start_idx = 716, + .result_start_idx = 715, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -4943,11 +4940,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 1081, + .key_start_idx = 1080, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 725, + .result_start_idx = 724, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4960,11 +4957,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_TX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 1082, + .key_start_idx = 1081, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 726, + .result_start_idx = 725, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, @@ -4979,11 +4976,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 1095, + .key_start_idx = 1094, .blob_key_bit_size = 16, .key_bit_size = 16, .key_num_fields = 3, - .result_start_idx = 739, + .result_start_idx = 738, .result_bit_size = 10, .result_num_fields = 1, .encap_num_fields = 0, @@ -4996,11 +4993,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .direction = TF_DIR_TX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .key_start_idx = 1098, + .key_start_idx = 1097, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 42, - .result_start_idx = 740, + .result_start_idx = 739, .result_bit_size = 38, .result_num_fields = 8, .encap_num_fields = 0, @@ -5013,11 +5010,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_TX, - .key_start_idx = 1140, - .blob_key_bit_size = 200, - .key_bit_size = 200, + .key_start_idx = 1139, + .blob_key_bit_size = 392, + .key_bit_size = 392, .key_num_fields = 11, - .result_start_idx = 748, + .result_start_idx = 747, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, @@ -5027,11 +5024,28 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .key_start_idx = 1150, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 756, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 33, + .ident_nums = 1 + }, + { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, .priority = BNXT_ULP_PRIORITY_LEVEL_0, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .key_start_idx = 1151, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -5040,8 +5054,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 1, + .ident_start_idx = 34, + .ident_nums = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, @@ -5086,50 +5100,194 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = { .resource_type = TF_MEM_INTERNAL, .direction = TF_DIR_TX, .key_start_idx = 1209, - .blob_key_bit_size = 104, - .key_bit_size = 104, - .key_num_fields = 7, + .blob_key_bit_size = 392, + .key_bit_size = 392, + .key_num_fields = 11, .result_start_idx = 779, .result_bit_size = 64, .result_num_fields = 9, .encap_num_fields = 0, .ident_start_idx = 35, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - } -}; - -struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { + }, { - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE, + .key_start_idx = 1220, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 788, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 35, + .ident_nums = 1, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + .direction = TF_DIR_TX, + .key_start_idx = 1233, + .blob_key_bit_size = 16, + .key_bit_size = 16, + .key_num_fields = 3, + .result_start_idx = 801, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 36, + .ident_nums = 1 }, { - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 1236, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 42, + .result_start_idx = 802, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 37, + .ident_nums = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, + .resource_type = TF_MEM_INTERNAL, + .direction = TF_DIR_TX, + .key_start_idx = 1278, + .blob_key_bit_size = 104, + .key_bit_size = 104, + .key_num_fields = 7, + .result_start_idx = 810, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0, + .ident_start_idx = 37, + .ident_nums = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE, + .key_start_idx = 1285, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 819, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 37, + .ident_nums = 1, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + .direction = TF_DIR_TX, + .key_start_idx = 1298, + .blob_key_bit_size = 16, + .key_bit_size = 16, + .key_num_fields = 3, + .result_start_idx = 832, + .result_bit_size = 10, + .result_num_fields = 1, + .encap_num_fields = 0, + .ident_start_idx = 38, + .ident_nums = 1 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .direction = TF_DIR_TX, + .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .key_start_idx = 1301, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 42, + .result_start_idx = 833, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 39, + .ident_nums = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, + .resource_type = TF_MEM_INTERNAL, + .direction = TF_DIR_TX, + .key_start_idx = 1343, + .blob_key_bit_size = 104, + .key_bit_size = 104, + .key_num_fields = 7, + .result_start_idx = 841, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0, + .ident_start_idx = 39, + .ident_nums = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES + } +}; + +struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, + .spec_operand = { + (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .spec_operand = { @@ -5947,19 +6105,930 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 1, + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 9, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 24, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 10, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, + .spec_operand = { + (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 9, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 16, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 32, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF7_IDX_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_HF7_IDX_O_ETH_SMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 24, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 10, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 7, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, + .spec_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .spec_operand = { + (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_ISIP_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -6142,8 +7211,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6188,39 +7257,58 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF8_IDX_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF8_IDX_O_UDP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_IP_PROTO_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff, + (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .field_bit_size = 48, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO @@ -6250,8 +7338,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6274,14 +7362,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6369,11 +7457,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -6643,8 +7727,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF7_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_UDP_DST_PORT & 0xff, + (BNXT_ULP_HF9_IDX_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF9_IDX_O_TCP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6653,8 +7737,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF7_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_UDP_SRC_PORT & 0xff, + (BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6663,7 +7747,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, + BNXT_ULP_SYM_IP_PROTO_TCP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6672,8 +7756,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6682,8 +7766,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR & 0xff, + (BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6722,8 +7806,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6746,14 +7830,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -6841,7 +7925,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -6881,7 +7969,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -7111,8 +8203,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF8_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_TCP_DST_PORT & 0xff, + (BNXT_ULP_HF10_IDX_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF10_IDX_O_UDP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7121,8 +8213,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF8_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_TCP_SRC_PORT & 0xff, + (BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7131,27 +8223,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, + BNXT_ULP_SYM_IP_PROTO_UDP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff, + (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7190,8 +8282,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7214,14 +8306,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7309,11 +8401,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -7587,8 +8675,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF9_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_UDP_DST_PORT & 0xff, + (BNXT_ULP_HF11_IDX_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF11_IDX_O_TCP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7597,8 +8685,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF9_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_UDP_SRC_PORT & 0xff, + (BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7607,7 +8695,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, + BNXT_ULP_SYM_IP_PROTO_TCP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7616,8 +8704,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR & 0xff, + (BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7626,8 +8714,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR & 0xff, + (BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7662,12 +8750,17 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7677,27 +8770,32 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7723,8 +8821,15 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, + .spec_operand = { + (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -7738,7 +8843,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -7760,8 +8867,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -7785,7 +8892,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -7825,11 +8936,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -8011,8 +9118,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8059,8 +9166,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF10_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_TCP_DST_PORT & 0xff, + (BNXT_ULP_HF12_IDX_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF12_IDX_O_UDP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8069,8 +9176,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF10_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_TCP_SRC_PORT & 0xff, + (BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8079,27 +9186,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, + BNXT_ULP_SYM_IP_PROTO_UDP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 128, + .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff, + (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 128, + .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff, + (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8137,14 +9244,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF11_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF11_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF11_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF11_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8157,14 +9264,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF11_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF11_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8172,14 +9279,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8276,11 +9383,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -8550,8 +9653,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF11_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_UDP_DST_PORT & 0xff, + (BNXT_ULP_HF13_IDX_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF13_IDX_O_TCP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8560,8 +9663,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF11_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_UDP_SRC_PORT & 0xff, + (BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8570,7 +9673,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, + BNXT_ULP_SYM_IP_PROTO_TCP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8579,8 +9682,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8589,8 +9692,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR & 0xff, + (BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8628,14 +9731,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8648,14 +9751,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8663,14 +9766,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -8767,7 +9870,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -8807,7 +9914,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -9037,8 +10148,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF12_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_TCP_DST_PORT & 0xff, + (BNXT_ULP_HF14_IDX_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF14_IDX_O_UDP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9047,8 +10158,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF12_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_TCP_SRC_PORT & 0xff, + (BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9057,27 +10168,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, + BNXT_ULP_SYM_IP_PROTO_UDP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff, + (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9115,14 +10226,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9135,14 +10246,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9150,14 +10261,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9254,11 +10365,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -9532,8 +10639,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF13_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_UDP_DST_PORT & 0xff, + (BNXT_ULP_HF15_IDX_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF15_IDX_O_TCP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9542,8 +10649,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF13_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_UDP_SRC_PORT & 0xff, + (BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9552,27 +10659,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, + BNXT_ULP_SYM_IP_PROTO_TCP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR & 0xff, + (BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR & 0xff, + (BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9608,18 +10715,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 12, @@ -9630,14 +10727,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9645,14 +10742,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9678,15 +10775,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 2, @@ -9695,7 +10785,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -9724,8 +10816,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -9749,7 +10841,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -9789,11 +10885,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -9820,7 +10912,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -9862,12 +10956,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -9875,7 +10973,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -9884,12 +10986,20 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -9897,7 +11007,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -9916,12 +11030,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -9929,7 +11047,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -9938,17 +11060,23 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -9956,7 +11084,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TL2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -9975,8 +11107,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10023,8 +11155,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF14_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_TCP_DST_PORT & 0xff, + (BNXT_ULP_HF16_IDX_I_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF16_IDX_I_UDP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10033,27 +11165,28 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF14_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_TCP_SRC_PORT & 0xff, + (BNXT_ULP_HF16_IDX_I_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF16_IDX_I_UDP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, + (BNXT_ULP_HF16_IDX_I_IPV4_PROTO_ID >> 8) & 0xff, + BNXT_ULP_HF16_IDX_I_IPV4_PROTO_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff, + (BNXT_ULP_HF16_IDX_I_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF16_IDX_I_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10062,8 +11195,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff, + (BNXT_ULP_HF16_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF16_IDX_I_IPV4_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10075,7 +11208,12 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF16_IDX_T_VXLAN_VNI >> 8) & 0xff, + BNXT_ULP_HF16_IDX_T_VXLAN_VNI & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 10, @@ -10109,16 +11247,13 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10126,14 +11261,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10144,8 +11279,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 12, @@ -10163,9 +11308,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_bit_size = 2, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, + .spec_operand = { + (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 4, @@ -10176,9 +11328,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -10200,8 +11350,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10222,32 +11372,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -10266,28 +11402,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -10296,42 +11422,28 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 3, @@ -10444,9 +11556,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -10491,8 +11601,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10537,52 +11647,36 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_I_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_I_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_I_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_I_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - (BNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID >> 8) & 0xff, - BNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID & 0xff, + BNXT_ULP_SYM_IP_PROTO_UDP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 48, @@ -10592,12 +11686,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_T_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_HF15_IDX_T_VXLAN_VNI & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 10, @@ -10620,6 +11709,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .field_bit_size = 8, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO @@ -10631,28 +11730,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10668,18 +11760,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 48, @@ -10693,22 +11775,19 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -10734,8 +11813,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -10756,18 +11835,32 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -10786,18 +11879,28 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -10816,26 +11919,6 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, @@ -10855,43 +11938,49 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, + BNXT_ULP_SYM_L2_HDR_VALID_YES, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .field_bit_size = 3, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -10910,28 +11999,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -10945,28 +12024,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -10985,8 +12054,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11031,12 +12100,22 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF18_IDX_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF18_IDX_O_UDP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, @@ -11052,15 +12131,20 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 48, @@ -11097,8 +12181,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11121,14 +12205,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11222,11 +12306,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -11486,8 +12566,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF17_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_UDP_DST_PORT & 0xff, + (BNXT_ULP_HF19_IDX_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF19_IDX_O_TCP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11496,8 +12576,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT & 0xff, + (BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11506,7 +12586,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, + BNXT_ULP_SYM_IP_PROTO_TCP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11515,8 +12595,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11525,8 +12605,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF17_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_IPV4_SRC_ADDR & 0xff, + (BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11565,8 +12645,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11589,14 +12669,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11690,7 +12770,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L4_HDR_TYPE_UDP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -11730,7 +12814,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = { + BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -11950,8 +13038,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF18_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF18_IDX_O_TCP_DST_PORT & 0xff, + (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11960,8 +13048,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF18_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF18_IDX_O_TCP_SRC_PORT & 0xff, + (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -11970,27 +13058,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, + BNXT_ULP_SYM_IP_PROTO_UDP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff, + (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 32, + .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff, + (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12029,8 +13117,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12053,14 +13141,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12154,11 +13242,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -12422,8 +13506,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF19_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF19_IDX_O_UDP_DST_PORT & 0xff, + (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12432,28 +13516,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT & 0xff, + (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - (BNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID >> 8) & 0xff, - BNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID & 0xff, + BNXT_ULP_SYM_IP_PROTO_TCP, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR & 0xff, + (BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, + BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12462,8 +13545,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR & 0xff, + (BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12498,12 +13581,17 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .field_bit_size = 12, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12513,27 +13601,32 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .mask_operand = { + (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, + .spec_operand = { + (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12559,8 +13652,15 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, + .spec_operand = { + (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 2, @@ -12580,8 +13680,12 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -12602,8 +13706,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12624,28 +13728,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -12667,11 +13761,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 1, @@ -12703,7 +13793,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -12748,7 +13840,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -12768,7 +13862,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -12798,7 +13894,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -12823,7 +13921,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -12843,8 +13943,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12877,7 +13977,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 3, + .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, @@ -12889,63 +13989,24 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { { .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 32, + .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 32, + .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff, + (BNXT_ULP_HF22_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF22_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12969,14 +14030,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF21_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF21_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF21_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF21_IDX_OO_VLAN_VID & 0xff, + (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -12989,14 +14050,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF21_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_ETH_SMAC & 0xff, + (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF21_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_ETH_SMAC & 0xff, + (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff, + BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -13004,14 +14065,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, + (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -13138,21 +14199,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 1, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = { - BNXT_ULP_SYM_L3_HDR_ISIP_YES, + BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13390,8 +14451,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .spec_operand = { - (BNXT_ULP_HF21_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_ETH_DMAC & 0xff, + (BNXT_ULP_HF23_IDX_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_HF23_IDX_O_ETH_DMAC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -13966,7 +15027,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 80, + .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { @@ -14738,16 +15799,192 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { - .field_bit_size = 1, + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, + .result_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, + .result_operand = { + (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 6, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x0005 >> 8) & 0xff, + 0x0005 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 33, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 9, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x00c5 >> 8) & 0xff, + 0x00c5 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 1, @@ -14755,7 +15992,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { }, { .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 10, @@ -16141,7 +17380,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { { .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { @@ -16192,8 +17431,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, + (0x0185 >> 8) & 0xff, + 0x0185 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -16319,7 +17558,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { { .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { @@ -16370,8 +17609,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, + (0x0185 >> 8) & 0xff, + 0x0185 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -17483,7 +18722,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { { .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { @@ -17534,8 +18773,201 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, + (0x0185 >> 8) & 0xff, + 0x0185 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 11, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 7, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, + .result_operand = { + (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, + .result_operand = { + (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, + BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_true = { + (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_false = { + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 6, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 3, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 16, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 2, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 4, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 10, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x0003 >> 8) & 0xff, + 0x0003 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 8, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 33, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, + .result_operand = { + (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 1, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + }, + { + .field_bit_size = 5, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .field_bit_size = 9, + .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_operand = { + (0x0061 >> 8) & 0xff, + 0x0061 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, @@ -17999,5 +19431,33 @@ struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = { .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_EM_PROF, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 + }, + { + .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, + .ident_type = TF_IDENT_TYPE_EM_PROF, + .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .ident_bit_size = 10, + .ident_bit_pos = 0 } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index f5c43a9f84..51758868a2 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -18,7 +18,7 @@ #define BNXT_ULP_CLASS_HID_SHFTL 31 #define BNXT_ULP_CLASS_HID_MASK 2047 #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 4096 -#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 86 +#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 83 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919 #define BNXT_ULP_ACT_HID_HIGH_PRIME 4721 #define BNXT_ULP_ACT_HID_SHFTR 23 @@ -218,7 +218,8 @@ enum bnxt_ulp_mapper_opc { BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9, BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10, BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11, - BNXT_ULP_MAPPER_OPC_LAST = 12 + BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12, + BNXT_ULP_MAPPER_OPC_LAST = 13 }; enum bnxt_ulp_mark_db_opcode { @@ -632,36 +633,36 @@ enum bnxt_ulp_act_prop_idx { enum bnxt_ulp_class_hid { BNXT_ULP_CLASS_HID_0138 = 0x0138, BNXT_ULP_CLASS_HID_03f0 = 0x03f0, - BNXT_ULP_CLASS_HID_0134 = 0x0134, - BNXT_ULP_CLASS_HID_03fc = 0x03fc, BNXT_ULP_CLASS_HID_0139 = 0x0139, BNXT_ULP_CLASS_HID_03f1 = 0x03f1, BNXT_ULP_CLASS_HID_068b = 0x068b, BNXT_ULP_CLASS_HID_0143 = 0x0143, - BNXT_ULP_CLASS_HID_0135 = 0x0135, - BNXT_ULP_CLASS_HID_03fd = 0x03fd, - BNXT_ULP_CLASS_HID_0687 = 0x0687, - BNXT_ULP_CLASS_HID_014f = 0x014f, BNXT_ULP_CLASS_HID_0118 = 0x0118, BNXT_ULP_CLASS_HID_03d0 = 0x03d0, - BNXT_ULP_CLASS_HID_0114 = 0x0114, - BNXT_ULP_CLASS_HID_03dc = 0x03dc, BNXT_ULP_CLASS_HID_0119 = 0x0119, BNXT_ULP_CLASS_HID_03d1 = 0x03d1, BNXT_ULP_CLASS_HID_06ab = 0x06ab, BNXT_ULP_CLASS_HID_0163 = 0x0163, - BNXT_ULP_CLASS_HID_0115 = 0x0115, - BNXT_ULP_CLASS_HID_03dd = 0x03dd, - BNXT_ULP_CLASS_HID_06a7 = 0x06a7, - BNXT_ULP_CLASS_HID_016f = 0x016f, BNXT_ULP_CLASS_HID_0128 = 0x0128, BNXT_ULP_CLASS_HID_03e0 = 0x03e0, - BNXT_ULP_CLASS_HID_0124 = 0x0124, - BNXT_ULP_CLASS_HID_03ec = 0x03ec, BNXT_ULP_CLASS_HID_0129 = 0x0129, BNXT_ULP_CLASS_HID_03e1 = 0x03e1, BNXT_ULP_CLASS_HID_069b = 0x069b, BNXT_ULP_CLASS_HID_0153 = 0x0153, + BNXT_ULP_CLASS_HID_0134 = 0x0134, + BNXT_ULP_CLASS_HID_03fc = 0x03fc, + BNXT_ULP_CLASS_HID_0135 = 0x0135, + BNXT_ULP_CLASS_HID_03fd = 0x03fd, + BNXT_ULP_CLASS_HID_0687 = 0x0687, + BNXT_ULP_CLASS_HID_014f = 0x014f, + BNXT_ULP_CLASS_HID_0114 = 0x0114, + BNXT_ULP_CLASS_HID_03dc = 0x03dc, + BNXT_ULP_CLASS_HID_0115 = 0x0115, + BNXT_ULP_CLASS_HID_03dd = 0x03dd, + BNXT_ULP_CLASS_HID_06a7 = 0x06a7, + BNXT_ULP_CLASS_HID_016f = 0x016f, + BNXT_ULP_CLASS_HID_0124 = 0x0124, + BNXT_ULP_CLASS_HID_03ec = 0x03ec, BNXT_ULP_CLASS_HID_0125 = 0x0125, BNXT_ULP_CLASS_HID_03ed = 0x03ed, BNXT_ULP_CLASS_HID_0697 = 0x0697, @@ -774,36 +775,36 @@ enum bnxt_ulp_class_hid { BNXT_ULP_CLASS_HID_077f = 0x077f, BNXT_ULP_CLASS_HID_01e1 = 0x01e1, BNXT_ULP_CLASS_HID_0329 = 0x0329, - BNXT_ULP_CLASS_HID_01dd = 0x01dd, - BNXT_ULP_CLASS_HID_0315 = 0x0315, BNXT_ULP_CLASS_HID_01c1 = 0x01c1, BNXT_ULP_CLASS_HID_0309 = 0x0309, - BNXT_ULP_CLASS_HID_003d = 0x003d, - BNXT_ULP_CLASS_HID_02f5 = 0x02f5, BNXT_ULP_CLASS_HID_01d1 = 0x01d1, BNXT_ULP_CLASS_HID_0319 = 0x0319, - BNXT_ULP_CLASS_HID_01cd = 0x01cd, - BNXT_ULP_CLASS_HID_0305 = 0x0305, BNXT_ULP_CLASS_HID_01e2 = 0x01e2, BNXT_ULP_CLASS_HID_032a = 0x032a, BNXT_ULP_CLASS_HID_0650 = 0x0650, BNXT_ULP_CLASS_HID_0198 = 0x0198, - BNXT_ULP_CLASS_HID_01de = 0x01de, - BNXT_ULP_CLASS_HID_0316 = 0x0316, - BNXT_ULP_CLASS_HID_066c = 0x066c, - BNXT_ULP_CLASS_HID_01a4 = 0x01a4, BNXT_ULP_CLASS_HID_01c2 = 0x01c2, BNXT_ULP_CLASS_HID_030a = 0x030a, BNXT_ULP_CLASS_HID_0670 = 0x0670, BNXT_ULP_CLASS_HID_01b8 = 0x01b8, - BNXT_ULP_CLASS_HID_003e = 0x003e, - BNXT_ULP_CLASS_HID_02f6 = 0x02f6, - BNXT_ULP_CLASS_HID_078c = 0x078c, - BNXT_ULP_CLASS_HID_0044 = 0x0044, BNXT_ULP_CLASS_HID_01d2 = 0x01d2, BNXT_ULP_CLASS_HID_031a = 0x031a, BNXT_ULP_CLASS_HID_0660 = 0x0660, BNXT_ULP_CLASS_HID_01a8 = 0x01a8, + BNXT_ULP_CLASS_HID_01dd = 0x01dd, + BNXT_ULP_CLASS_HID_0315 = 0x0315, + BNXT_ULP_CLASS_HID_003d = 0x003d, + BNXT_ULP_CLASS_HID_02f5 = 0x02f5, + BNXT_ULP_CLASS_HID_01cd = 0x01cd, + BNXT_ULP_CLASS_HID_0305 = 0x0305, + BNXT_ULP_CLASS_HID_01de = 0x01de, + BNXT_ULP_CLASS_HID_0316 = 0x0316, + BNXT_ULP_CLASS_HID_066c = 0x066c, + BNXT_ULP_CLASS_HID_01a4 = 0x01a4, + BNXT_ULP_CLASS_HID_003e = 0x003e, + BNXT_ULP_CLASS_HID_02f6 = 0x02f6, + BNXT_ULP_CLASS_HID_078c = 0x078c, + BNXT_ULP_CLASS_HID_0044 = 0x0044, BNXT_ULP_CLASS_HID_01ce = 0x01ce, BNXT_ULP_CLASS_HID_0306 = 0x0306, BNXT_ULP_CLASS_HID_067c = 0x067c, @@ -838,6 +839,7 @@ enum bnxt_ulp_act_hid { BNXT_ULP_ACT_HID_0020 = 0x0020, BNXT_ULP_ACT_HID_0901 = 0x0901, BNXT_ULP_ACT_HID_0121 = 0x0121, + BNXT_ULP_ACT_HID_0004 = 0x0004, BNXT_ULP_ACT_HID_0006 = 0x0006, BNXT_ULP_ACT_HID_0804 = 0x0804, BNXT_ULP_ACT_HID_0105 = 0x0105, @@ -881,19 +883,15 @@ enum bnxt_ulp_act_hid { BNXT_ULP_ACT_HID_040d = 0x040d, BNXT_ULP_ACT_HID_040f = 0x040f, BNXT_ULP_ACT_HID_0413 = 0x0413, - BNXT_ULP_ACT_HID_0c0d = 0x0c0d, BNXT_ULP_ACT_HID_0567 = 0x0567, BNXT_ULP_ACT_HID_0a49 = 0x0a49, BNXT_ULP_ACT_HID_050e = 0x050e, - BNXT_ULP_ACT_HID_0d0e = 0x0d0e, BNXT_ULP_ACT_HID_0668 = 0x0668, BNXT_ULP_ACT_HID_0b4a = 0x0b4a, BNXT_ULP_ACT_HID_0411 = 0x0411, BNXT_ULP_ACT_HID_056b = 0x056b, BNXT_ULP_ACT_HID_0a4d = 0x0a4d, - BNXT_ULP_ACT_HID_0c11 = 0x0c11, BNXT_ULP_ACT_HID_0512 = 0x0512, - BNXT_ULP_ACT_HID_0d12 = 0x0d12, BNXT_ULP_ACT_HID_066c = 0x066c, BNXT_ULP_ACT_HID_0b4e = 0x0b4e }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h index a5bd3f646b..79fcdeee89 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h @@ -60,20 +60,14 @@ enum bnxt_ulp_hf7 { BNXT_ULP_HF7_IDX_OI_VLAN_CFI_PRI = 7, BNXT_ULP_HF7_IDX_OI_VLAN_VID = 8, BNXT_ULP_HF7_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF7_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF7_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF7_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF7_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF7_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF7_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF7_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF7_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF7_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF7_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF7_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF7_IDX_O_UDP_CSUM = 23 + BNXT_ULP_HF7_IDX_O_IPV6_VER = 10, + BNXT_ULP_HF7_IDX_O_IPV6_TC = 11, + BNXT_ULP_HF7_IDX_O_IPV6_FLOW_LABEL = 12, + BNXT_ULP_HF7_IDX_O_IPV6_PAYLOAD_LEN = 13, + BNXT_ULP_HF7_IDX_O_IPV6_PROTO_ID = 14, + BNXT_ULP_HF7_IDX_O_IPV6_TTL = 15, + BNXT_ULP_HF7_IDX_O_IPV6_SRC_ADDR = 16, + BNXT_ULP_HF7_IDX_O_IPV6_DST_ADDR = 17 }; enum bnxt_ulp_hf8 { @@ -97,15 +91,10 @@ enum bnxt_ulp_hf8 { BNXT_ULP_HF8_IDX_O_IPV4_CSUM = 17, BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR = 18, BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF8_IDX_O_TCP_SRC_PORT = 20, - BNXT_ULP_HF8_IDX_O_TCP_DST_PORT = 21, - BNXT_ULP_HF8_IDX_O_TCP_SENT_SEQ = 22, - BNXT_ULP_HF8_IDX_O_TCP_RECV_ACK = 23, - BNXT_ULP_HF8_IDX_O_TCP_DATA_OFF = 24, - BNXT_ULP_HF8_IDX_O_TCP_TCP_FLAGS = 25, - BNXT_ULP_HF8_IDX_O_TCP_RX_WIN = 26, - BNXT_ULP_HF8_IDX_O_TCP_CSUM = 27, - BNXT_ULP_HF8_IDX_O_TCP_URP = 28 + BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT = 20, + BNXT_ULP_HF8_IDX_O_UDP_DST_PORT = 21, + BNXT_ULP_HF8_IDX_O_UDP_LENGTH = 22, + BNXT_ULP_HF8_IDX_O_UDP_CSUM = 23 }; enum bnxt_ulp_hf9 { @@ -119,18 +108,25 @@ enum bnxt_ulp_hf9 { BNXT_ULP_HF9_IDX_OI_VLAN_CFI_PRI = 7, BNXT_ULP_HF9_IDX_OI_VLAN_VID = 8, BNXT_ULP_HF9_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF9_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF9_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF9_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF9_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF9_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF9_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF9_IDX_O_UDP_SRC_PORT = 18, - BNXT_ULP_HF9_IDX_O_UDP_DST_PORT = 19, - BNXT_ULP_HF9_IDX_O_UDP_LENGTH = 20, - BNXT_ULP_HF9_IDX_O_UDP_CSUM = 21 + BNXT_ULP_HF9_IDX_O_IPV4_VER = 10, + BNXT_ULP_HF9_IDX_O_IPV4_TOS = 11, + BNXT_ULP_HF9_IDX_O_IPV4_LEN = 12, + BNXT_ULP_HF9_IDX_O_IPV4_FRAG_ID = 13, + BNXT_ULP_HF9_IDX_O_IPV4_FRAG_OFF = 14, + BNXT_ULP_HF9_IDX_O_IPV4_TTL = 15, + BNXT_ULP_HF9_IDX_O_IPV4_PROTO_ID = 16, + BNXT_ULP_HF9_IDX_O_IPV4_CSUM = 17, + BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR = 18, + BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR = 19, + BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT = 20, + BNXT_ULP_HF9_IDX_O_TCP_DST_PORT = 21, + BNXT_ULP_HF9_IDX_O_TCP_SENT_SEQ = 22, + BNXT_ULP_HF9_IDX_O_TCP_RECV_ACK = 23, + BNXT_ULP_HF9_IDX_O_TCP_DATA_OFF = 24, + BNXT_ULP_HF9_IDX_O_TCP_TCP_FLAGS = 25, + BNXT_ULP_HF9_IDX_O_TCP_RX_WIN = 26, + BNXT_ULP_HF9_IDX_O_TCP_CSUM = 27, + BNXT_ULP_HF9_IDX_O_TCP_URP = 28 }; enum bnxt_ulp_hf10 { @@ -152,15 +148,10 @@ enum bnxt_ulp_hf10 { BNXT_ULP_HF10_IDX_O_IPV6_TTL = 15, BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR = 16, BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF10_IDX_O_TCP_SRC_PORT = 18, - BNXT_ULP_HF10_IDX_O_TCP_DST_PORT = 19, - BNXT_ULP_HF10_IDX_O_TCP_SENT_SEQ = 20, - BNXT_ULP_HF10_IDX_O_TCP_RECV_ACK = 21, - BNXT_ULP_HF10_IDX_O_TCP_DATA_OFF = 22, - BNXT_ULP_HF10_IDX_O_TCP_TCP_FLAGS = 23, - BNXT_ULP_HF10_IDX_O_TCP_RX_WIN = 24, - BNXT_ULP_HF10_IDX_O_TCP_CSUM = 25, - BNXT_ULP_HF10_IDX_O_TCP_URP = 26 + BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT = 18, + BNXT_ULP_HF10_IDX_O_UDP_DST_PORT = 19, + BNXT_ULP_HF10_IDX_O_UDP_LENGTH = 20, + BNXT_ULP_HF10_IDX_O_UDP_CSUM = 21 }; enum bnxt_ulp_hf11 { @@ -174,20 +165,23 @@ enum bnxt_ulp_hf11 { BNXT_ULP_HF11_IDX_OI_VLAN_CFI_PRI = 7, BNXT_ULP_HF11_IDX_OI_VLAN_VID = 8, BNXT_ULP_HF11_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF11_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF11_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF11_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF11_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF11_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF11_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF11_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF11_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF11_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF11_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF11_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF11_IDX_O_UDP_CSUM = 23 + BNXT_ULP_HF11_IDX_O_IPV6_VER = 10, + BNXT_ULP_HF11_IDX_O_IPV6_TC = 11, + BNXT_ULP_HF11_IDX_O_IPV6_FLOW_LABEL = 12, + BNXT_ULP_HF11_IDX_O_IPV6_PAYLOAD_LEN = 13, + BNXT_ULP_HF11_IDX_O_IPV6_PROTO_ID = 14, + BNXT_ULP_HF11_IDX_O_IPV6_TTL = 15, + BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR = 16, + BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR = 17, + BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT = 18, + BNXT_ULP_HF11_IDX_O_TCP_DST_PORT = 19, + BNXT_ULP_HF11_IDX_O_TCP_SENT_SEQ = 20, + BNXT_ULP_HF11_IDX_O_TCP_RECV_ACK = 21, + BNXT_ULP_HF11_IDX_O_TCP_DATA_OFF = 22, + BNXT_ULP_HF11_IDX_O_TCP_TCP_FLAGS = 23, + BNXT_ULP_HF11_IDX_O_TCP_RX_WIN = 24, + BNXT_ULP_HF11_IDX_O_TCP_CSUM = 25, + BNXT_ULP_HF11_IDX_O_TCP_URP = 26 }; enum bnxt_ulp_hf12 { @@ -211,15 +205,10 @@ enum bnxt_ulp_hf12 { BNXT_ULP_HF12_IDX_O_IPV4_CSUM = 17, BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR = 18, BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF12_IDX_O_TCP_SRC_PORT = 20, - BNXT_ULP_HF12_IDX_O_TCP_DST_PORT = 21, - BNXT_ULP_HF12_IDX_O_TCP_SENT_SEQ = 22, - BNXT_ULP_HF12_IDX_O_TCP_RECV_ACK = 23, - BNXT_ULP_HF12_IDX_O_TCP_DATA_OFF = 24, - BNXT_ULP_HF12_IDX_O_TCP_TCP_FLAGS = 25, - BNXT_ULP_HF12_IDX_O_TCP_RX_WIN = 26, - BNXT_ULP_HF12_IDX_O_TCP_CSUM = 27, - BNXT_ULP_HF12_IDX_O_TCP_URP = 28 + BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT = 20, + BNXT_ULP_HF12_IDX_O_UDP_DST_PORT = 21, + BNXT_ULP_HF12_IDX_O_UDP_LENGTH = 22, + BNXT_ULP_HF12_IDX_O_UDP_CSUM = 23 }; enum bnxt_ulp_hf13 { @@ -233,18 +222,25 @@ enum bnxt_ulp_hf13 { BNXT_ULP_HF13_IDX_OI_VLAN_CFI_PRI = 7, BNXT_ULP_HF13_IDX_OI_VLAN_VID = 8, BNXT_ULP_HF13_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF13_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF13_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF13_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF13_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF13_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF13_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF13_IDX_O_UDP_SRC_PORT = 18, - BNXT_ULP_HF13_IDX_O_UDP_DST_PORT = 19, - BNXT_ULP_HF13_IDX_O_UDP_LENGTH = 20, - BNXT_ULP_HF13_IDX_O_UDP_CSUM = 21 + BNXT_ULP_HF13_IDX_O_IPV4_VER = 10, + BNXT_ULP_HF13_IDX_O_IPV4_TOS = 11, + BNXT_ULP_HF13_IDX_O_IPV4_LEN = 12, + BNXT_ULP_HF13_IDX_O_IPV4_FRAG_ID = 13, + BNXT_ULP_HF13_IDX_O_IPV4_FRAG_OFF = 14, + BNXT_ULP_HF13_IDX_O_IPV4_TTL = 15, + BNXT_ULP_HF13_IDX_O_IPV4_PROTO_ID = 16, + BNXT_ULP_HF13_IDX_O_IPV4_CSUM = 17, + BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR = 18, + BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR = 19, + BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT = 20, + BNXT_ULP_HF13_IDX_O_TCP_DST_PORT = 21, + BNXT_ULP_HF13_IDX_O_TCP_SENT_SEQ = 22, + BNXT_ULP_HF13_IDX_O_TCP_RECV_ACK = 23, + BNXT_ULP_HF13_IDX_O_TCP_DATA_OFF = 24, + BNXT_ULP_HF13_IDX_O_TCP_TCP_FLAGS = 25, + BNXT_ULP_HF13_IDX_O_TCP_RX_WIN = 26, + BNXT_ULP_HF13_IDX_O_TCP_CSUM = 27, + BNXT_ULP_HF13_IDX_O_TCP_URP = 28 }; enum bnxt_ulp_hf14 { @@ -266,15 +262,10 @@ enum bnxt_ulp_hf14 { BNXT_ULP_HF14_IDX_O_IPV6_TTL = 15, BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR = 16, BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF14_IDX_O_TCP_SRC_PORT = 18, - BNXT_ULP_HF14_IDX_O_TCP_DST_PORT = 19, - BNXT_ULP_HF14_IDX_O_TCP_SENT_SEQ = 20, - BNXT_ULP_HF14_IDX_O_TCP_RECV_ACK = 21, - BNXT_ULP_HF14_IDX_O_TCP_DATA_OFF = 22, - BNXT_ULP_HF14_IDX_O_TCP_TCP_FLAGS = 23, - BNXT_ULP_HF14_IDX_O_TCP_RX_WIN = 24, - BNXT_ULP_HF14_IDX_O_TCP_CSUM = 25, - BNXT_ULP_HF14_IDX_O_TCP_URP = 26 + BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT = 18, + BNXT_ULP_HF14_IDX_O_UDP_DST_PORT = 19, + BNXT_ULP_HF14_IDX_O_UDP_LENGTH = 20, + BNXT_ULP_HF14_IDX_O_UDP_CSUM = 21 }; enum bnxt_ulp_hf15 { @@ -288,47 +279,23 @@ enum bnxt_ulp_hf15 { BNXT_ULP_HF15_IDX_OI_VLAN_CFI_PRI = 7, BNXT_ULP_HF15_IDX_OI_VLAN_VID = 8, BNXT_ULP_HF15_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF15_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF15_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF15_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF15_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF15_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF15_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF15_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF15_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF15_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF15_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF15_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF15_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF15_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF15_IDX_O_UDP_CSUM = 23, - BNXT_ULP_HF15_IDX_T_VXLAN_FLAGS = 24, - BNXT_ULP_HF15_IDX_T_VXLAN_RSVD0 = 25, - BNXT_ULP_HF15_IDX_T_VXLAN_VNI = 26, - BNXT_ULP_HF15_IDX_T_VXLAN_RSVD1 = 27, - BNXT_ULP_HF15_IDX_I_ETH_DMAC = 28, - BNXT_ULP_HF15_IDX_I_ETH_SMAC = 29, - BNXT_ULP_HF15_IDX_I_ETH_TYPE = 30, - BNXT_ULP_HF15_IDX_IO_VLAN_CFI_PRI = 31, - BNXT_ULP_HF15_IDX_IO_VLAN_VID = 32, - BNXT_ULP_HF15_IDX_IO_VLAN_TYPE = 33, - BNXT_ULP_HF15_IDX_II_VLAN_CFI_PRI = 34, - BNXT_ULP_HF15_IDX_II_VLAN_VID = 35, - BNXT_ULP_HF15_IDX_II_VLAN_TYPE = 36, - BNXT_ULP_HF15_IDX_I_IPV4_VER = 37, - BNXT_ULP_HF15_IDX_I_IPV4_TOS = 38, - BNXT_ULP_HF15_IDX_I_IPV4_LEN = 39, - BNXT_ULP_HF15_IDX_I_IPV4_FRAG_ID = 40, - BNXT_ULP_HF15_IDX_I_IPV4_FRAG_OFF = 41, - BNXT_ULP_HF15_IDX_I_IPV4_TTL = 42, - BNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID = 43, - BNXT_ULP_HF15_IDX_I_IPV4_CSUM = 44, - BNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR = 45, - BNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR = 46, - BNXT_ULP_HF15_IDX_I_UDP_SRC_PORT = 47, - BNXT_ULP_HF15_IDX_I_UDP_DST_PORT = 48, - BNXT_ULP_HF15_IDX_I_UDP_LENGTH = 49, - BNXT_ULP_HF15_IDX_I_UDP_CSUM = 50 + BNXT_ULP_HF15_IDX_O_IPV6_VER = 10, + BNXT_ULP_HF15_IDX_O_IPV6_TC = 11, + BNXT_ULP_HF15_IDX_O_IPV6_FLOW_LABEL = 12, + BNXT_ULP_HF15_IDX_O_IPV6_PAYLOAD_LEN = 13, + BNXT_ULP_HF15_IDX_O_IPV6_PROTO_ID = 14, + BNXT_ULP_HF15_IDX_O_IPV6_TTL = 15, + BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR = 16, + BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR = 17, + BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT = 18, + BNXT_ULP_HF15_IDX_O_TCP_DST_PORT = 19, + BNXT_ULP_HF15_IDX_O_TCP_SENT_SEQ = 20, + BNXT_ULP_HF15_IDX_O_TCP_RECV_ACK = 21, + BNXT_ULP_HF15_IDX_O_TCP_DATA_OFF = 22, + BNXT_ULP_HF15_IDX_O_TCP_TCP_FLAGS = 23, + BNXT_ULP_HF15_IDX_O_TCP_RX_WIN = 24, + BNXT_ULP_HF15_IDX_O_TCP_CSUM = 25, + BNXT_ULP_HF15_IDX_O_TCP_URP = 26 }; enum bnxt_ulp_hf16 { @@ -359,7 +326,30 @@ enum bnxt_ulp_hf16 { BNXT_ULP_HF16_IDX_T_VXLAN_FLAGS = 24, BNXT_ULP_HF16_IDX_T_VXLAN_RSVD0 = 25, BNXT_ULP_HF16_IDX_T_VXLAN_VNI = 26, - BNXT_ULP_HF16_IDX_T_VXLAN_RSVD1 = 27 + BNXT_ULP_HF16_IDX_T_VXLAN_RSVD1 = 27, + BNXT_ULP_HF16_IDX_I_ETH_DMAC = 28, + BNXT_ULP_HF16_IDX_I_ETH_SMAC = 29, + BNXT_ULP_HF16_IDX_I_ETH_TYPE = 30, + BNXT_ULP_HF16_IDX_IO_VLAN_CFI_PRI = 31, + BNXT_ULP_HF16_IDX_IO_VLAN_VID = 32, + BNXT_ULP_HF16_IDX_IO_VLAN_TYPE = 33, + BNXT_ULP_HF16_IDX_II_VLAN_CFI_PRI = 34, + BNXT_ULP_HF16_IDX_II_VLAN_VID = 35, + BNXT_ULP_HF16_IDX_II_VLAN_TYPE = 36, + BNXT_ULP_HF16_IDX_I_IPV4_VER = 37, + BNXT_ULP_HF16_IDX_I_IPV4_TOS = 38, + BNXT_ULP_HF16_IDX_I_IPV4_LEN = 39, + BNXT_ULP_HF16_IDX_I_IPV4_FRAG_ID = 40, + BNXT_ULP_HF16_IDX_I_IPV4_FRAG_OFF = 41, + BNXT_ULP_HF16_IDX_I_IPV4_TTL = 42, + BNXT_ULP_HF16_IDX_I_IPV4_PROTO_ID = 43, + BNXT_ULP_HF16_IDX_I_IPV4_CSUM = 44, + BNXT_ULP_HF16_IDX_I_IPV4_SRC_ADDR = 45, + BNXT_ULP_HF16_IDX_I_IPV4_DST_ADDR = 46, + BNXT_ULP_HF16_IDX_I_UDP_SRC_PORT = 47, + BNXT_ULP_HF16_IDX_I_UDP_DST_PORT = 48, + BNXT_ULP_HF16_IDX_I_UDP_LENGTH = 49, + BNXT_ULP_HF16_IDX_I_UDP_CSUM = 50 }; enum bnxt_ulp_hf17 { @@ -386,7 +376,11 @@ enum bnxt_ulp_hf17 { BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT = 20, BNXT_ULP_HF17_IDX_O_UDP_DST_PORT = 21, BNXT_ULP_HF17_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF17_IDX_O_UDP_CSUM = 23 + BNXT_ULP_HF17_IDX_O_UDP_CSUM = 23, + BNXT_ULP_HF17_IDX_T_VXLAN_FLAGS = 24, + BNXT_ULP_HF17_IDX_T_VXLAN_RSVD0 = 25, + BNXT_ULP_HF17_IDX_T_VXLAN_VNI = 26, + BNXT_ULP_HF17_IDX_T_VXLAN_RSVD1 = 27 }; enum bnxt_ulp_hf18 { @@ -410,15 +404,10 @@ enum bnxt_ulp_hf18 { BNXT_ULP_HF18_IDX_O_IPV4_CSUM = 17, BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR = 18, BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF18_IDX_O_TCP_SRC_PORT = 20, - BNXT_ULP_HF18_IDX_O_TCP_DST_PORT = 21, - BNXT_ULP_HF18_IDX_O_TCP_SENT_SEQ = 22, - BNXT_ULP_HF18_IDX_O_TCP_RECV_ACK = 23, - BNXT_ULP_HF18_IDX_O_TCP_DATA_OFF = 24, - BNXT_ULP_HF18_IDX_O_TCP_TCP_FLAGS = 25, - BNXT_ULP_HF18_IDX_O_TCP_RX_WIN = 26, - BNXT_ULP_HF18_IDX_O_TCP_CSUM = 27, - BNXT_ULP_HF18_IDX_O_TCP_URP = 28 + BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT = 20, + BNXT_ULP_HF18_IDX_O_UDP_DST_PORT = 21, + BNXT_ULP_HF18_IDX_O_UDP_LENGTH = 22, + BNXT_ULP_HF18_IDX_O_UDP_CSUM = 23 }; enum bnxt_ulp_hf19 { @@ -432,18 +421,25 @@ enum bnxt_ulp_hf19 { BNXT_ULP_HF19_IDX_OI_VLAN_CFI_PRI = 7, BNXT_ULP_HF19_IDX_OI_VLAN_VID = 8, BNXT_ULP_HF19_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF19_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF19_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF19_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF19_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF19_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT = 18, - BNXT_ULP_HF19_IDX_O_UDP_DST_PORT = 19, - BNXT_ULP_HF19_IDX_O_UDP_LENGTH = 20, - BNXT_ULP_HF19_IDX_O_UDP_CSUM = 21 + BNXT_ULP_HF19_IDX_O_IPV4_VER = 10, + BNXT_ULP_HF19_IDX_O_IPV4_TOS = 11, + BNXT_ULP_HF19_IDX_O_IPV4_LEN = 12, + BNXT_ULP_HF19_IDX_O_IPV4_FRAG_ID = 13, + BNXT_ULP_HF19_IDX_O_IPV4_FRAG_OFF = 14, + BNXT_ULP_HF19_IDX_O_IPV4_TTL = 15, + BNXT_ULP_HF19_IDX_O_IPV4_PROTO_ID = 16, + BNXT_ULP_HF19_IDX_O_IPV4_CSUM = 17, + BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR = 18, + BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR = 19, + BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT = 20, + BNXT_ULP_HF19_IDX_O_TCP_DST_PORT = 21, + BNXT_ULP_HF19_IDX_O_TCP_SENT_SEQ = 22, + BNXT_ULP_HF19_IDX_O_TCP_RECV_ACK = 23, + BNXT_ULP_HF19_IDX_O_TCP_DATA_OFF = 24, + BNXT_ULP_HF19_IDX_O_TCP_TCP_FLAGS = 25, + BNXT_ULP_HF19_IDX_O_TCP_RX_WIN = 26, + BNXT_ULP_HF19_IDX_O_TCP_CSUM = 27, + BNXT_ULP_HF19_IDX_O_TCP_URP = 28 }; enum bnxt_ulp_hf20 { @@ -465,15 +461,10 @@ enum bnxt_ulp_hf20 { BNXT_ULP_HF20_IDX_O_IPV6_TTL = 15, BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR = 16, BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF20_IDX_O_TCP_SRC_PORT = 18, - BNXT_ULP_HF20_IDX_O_TCP_DST_PORT = 19, - BNXT_ULP_HF20_IDX_O_TCP_SENT_SEQ = 20, - BNXT_ULP_HF20_IDX_O_TCP_RECV_ACK = 21, - BNXT_ULP_HF20_IDX_O_TCP_DATA_OFF = 22, - BNXT_ULP_HF20_IDX_O_TCP_TCP_FLAGS = 23, - BNXT_ULP_HF20_IDX_O_TCP_RX_WIN = 24, - BNXT_ULP_HF20_IDX_O_TCP_CSUM = 25, - BNXT_ULP_HF20_IDX_O_TCP_URP = 26 + BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT = 18, + BNXT_ULP_HF20_IDX_O_UDP_DST_PORT = 19, + BNXT_ULP_HF20_IDX_O_UDP_LENGTH = 20, + BNXT_ULP_HF20_IDX_O_UDP_CSUM = 21 }; enum bnxt_ulp_hf21 { @@ -487,16 +478,67 @@ enum bnxt_ulp_hf21 { BNXT_ULP_HF21_IDX_OI_VLAN_CFI_PRI = 7, BNXT_ULP_HF21_IDX_OI_VLAN_VID = 8, BNXT_ULP_HF21_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF21_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF21_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF21_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF21_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF21_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF21_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF21_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF21_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR = 19 + BNXT_ULP_HF21_IDX_O_IPV6_VER = 10, + BNXT_ULP_HF21_IDX_O_IPV6_TC = 11, + BNXT_ULP_HF21_IDX_O_IPV6_FLOW_LABEL = 12, + BNXT_ULP_HF21_IDX_O_IPV6_PAYLOAD_LEN = 13, + BNXT_ULP_HF21_IDX_O_IPV6_PROTO_ID = 14, + BNXT_ULP_HF21_IDX_O_IPV6_TTL = 15, + BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR = 16, + BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR = 17, + BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT = 18, + BNXT_ULP_HF21_IDX_O_TCP_DST_PORT = 19, + BNXT_ULP_HF21_IDX_O_TCP_SENT_SEQ = 20, + BNXT_ULP_HF21_IDX_O_TCP_RECV_ACK = 21, + BNXT_ULP_HF21_IDX_O_TCP_DATA_OFF = 22, + BNXT_ULP_HF21_IDX_O_TCP_TCP_FLAGS = 23, + BNXT_ULP_HF21_IDX_O_TCP_RX_WIN = 24, + BNXT_ULP_HF21_IDX_O_TCP_CSUM = 25, + BNXT_ULP_HF21_IDX_O_TCP_URP = 26 +}; + +enum bnxt_ulp_hf22 { + BNXT_ULP_HF22_IDX_SVIF_INDEX = 0, + BNXT_ULP_HF22_IDX_O_ETH_DMAC = 1, + BNXT_ULP_HF22_IDX_O_ETH_SMAC = 2, + BNXT_ULP_HF22_IDX_O_ETH_TYPE = 3, + BNXT_ULP_HF22_IDX_OO_VLAN_CFI_PRI = 4, + BNXT_ULP_HF22_IDX_OO_VLAN_VID = 5, + BNXT_ULP_HF22_IDX_OO_VLAN_TYPE = 6, + BNXT_ULP_HF22_IDX_OI_VLAN_CFI_PRI = 7, + BNXT_ULP_HF22_IDX_OI_VLAN_VID = 8, + BNXT_ULP_HF22_IDX_OI_VLAN_TYPE = 9, + BNXT_ULP_HF22_IDX_O_IPV4_VER = 10, + BNXT_ULP_HF22_IDX_O_IPV4_TOS = 11, + BNXT_ULP_HF22_IDX_O_IPV4_LEN = 12, + BNXT_ULP_HF22_IDX_O_IPV4_FRAG_ID = 13, + BNXT_ULP_HF22_IDX_O_IPV4_FRAG_OFF = 14, + BNXT_ULP_HF22_IDX_O_IPV4_TTL = 15, + BNXT_ULP_HF22_IDX_O_IPV4_PROTO_ID = 16, + BNXT_ULP_HF22_IDX_O_IPV4_CSUM = 17, + BNXT_ULP_HF22_IDX_O_IPV4_SRC_ADDR = 18, + BNXT_ULP_HF22_IDX_O_IPV4_DST_ADDR = 19 +}; + +enum bnxt_ulp_hf23 { + BNXT_ULP_HF23_IDX_SVIF_INDEX = 0, + BNXT_ULP_HF23_IDX_O_ETH_DMAC = 1, + BNXT_ULP_HF23_IDX_O_ETH_SMAC = 2, + BNXT_ULP_HF23_IDX_O_ETH_TYPE = 3, + BNXT_ULP_HF23_IDX_OO_VLAN_CFI_PRI = 4, + BNXT_ULP_HF23_IDX_OO_VLAN_VID = 5, + BNXT_ULP_HF23_IDX_OO_VLAN_TYPE = 6, + BNXT_ULP_HF23_IDX_OI_VLAN_CFI_PRI = 7, + BNXT_ULP_HF23_IDX_OI_VLAN_VID = 8, + BNXT_ULP_HF23_IDX_OI_VLAN_TYPE = 9, + BNXT_ULP_HF23_IDX_O_IPV6_VER = 10, + BNXT_ULP_HF23_IDX_O_IPV6_TC = 11, + BNXT_ULP_HF23_IDX_O_IPV6_FLOW_LABEL = 12, + BNXT_ULP_HF23_IDX_O_IPV6_PAYLOAD_LEN = 13, + BNXT_ULP_HF23_IDX_O_IPV6_PROTO_ID = 14, + BNXT_ULP_HF23_IDX_O_IPV6_TTL = 15, + BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR = 16, + BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR = 17 }; enum bnxt_ulp_hf_bitmask1 { @@ -553,20 +595,14 @@ enum bnxt_ulp_hf_bitmask7 { BNXT_ULP_HF7_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, BNXT_ULP_HF7_BITMASK_OI_VLAN_VID = 0x0080000000000000, BNXT_ULP_HF7_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF7_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF7_BITMASK_O_UDP_CSUM = 0x0000010000000000 + BNXT_ULP_HF7_BITMASK_O_IPV6_VER = 0x0020000000000000, + BNXT_ULP_HF7_BITMASK_O_IPV6_TC = 0x0010000000000000, + BNXT_ULP_HF7_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, + BNXT_ULP_HF7_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, + BNXT_ULP_HF7_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, + BNXT_ULP_HF7_BITMASK_O_IPV6_TTL = 0x0001000000000000, + BNXT_ULP_HF7_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, + BNXT_ULP_HF7_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000 }; enum bnxt_ulp_hf_bitmask8 { @@ -590,15 +626,10 @@ enum bnxt_ulp_hf_bitmask8 { BNXT_ULP_HF8_BITMASK_O_IPV4_CSUM = 0x0000400000000000, BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_CSUM = 0x0000001000000000, - BNXT_ULP_HF8_BITMASK_O_TCP_URP = 0x0000000800000000 + BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF8_BITMASK_O_UDP_LENGTH = 0x0000020000000000, + BNXT_ULP_HF8_BITMASK_O_UDP_CSUM = 0x0000010000000000 }; enum bnxt_ulp_hf_bitmask9 { @@ -612,18 +643,25 @@ enum bnxt_ulp_hf_bitmask9 { BNXT_ULP_HF9_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, BNXT_ULP_HF9_BITMASK_OI_VLAN_VID = 0x0080000000000000, BNXT_ULP_HF9_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF9_BITMASK_O_UDP_LENGTH = 0x0000080000000000, - BNXT_ULP_HF9_BITMASK_O_UDP_CSUM = 0x0000040000000000 + BNXT_ULP_HF9_BITMASK_O_IPV4_VER = 0x0020000000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_TOS = 0x0010000000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_LEN = 0x0008000000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_TTL = 0x0001000000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_CSUM = 0x0000400000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, + BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_CSUM = 0x0000001000000000, + BNXT_ULP_HF9_BITMASK_O_TCP_URP = 0x0000000800000000 }; enum bnxt_ulp_hf_bitmask10 { @@ -645,15 +683,10 @@ enum bnxt_ulp_hf_bitmask10 { BNXT_ULP_HF10_BITMASK_O_IPV6_TTL = 0x0001000000000000, BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_CSUM = 0x0000004000000000, - BNXT_ULP_HF10_BITMASK_O_TCP_URP = 0x0000002000000000 + BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF10_BITMASK_O_UDP_LENGTH = 0x0000080000000000, + BNXT_ULP_HF10_BITMASK_O_UDP_CSUM = 0x0000040000000000 }; enum bnxt_ulp_hf_bitmask11 { @@ -667,20 +700,23 @@ enum bnxt_ulp_hf_bitmask11 { BNXT_ULP_HF11_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, BNXT_ULP_HF11_BITMASK_OI_VLAN_VID = 0x0080000000000000, BNXT_ULP_HF11_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF11_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF11_BITMASK_O_UDP_CSUM = 0x0000010000000000 + BNXT_ULP_HF11_BITMASK_O_IPV6_VER = 0x0020000000000000, + BNXT_ULP_HF11_BITMASK_O_IPV6_TC = 0x0010000000000000, + BNXT_ULP_HF11_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, + BNXT_ULP_HF11_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, + BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, + BNXT_ULP_HF11_BITMASK_O_IPV6_TTL = 0x0001000000000000, + BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, + BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_CSUM = 0x0000004000000000, + BNXT_ULP_HF11_BITMASK_O_TCP_URP = 0x0000002000000000 }; enum bnxt_ulp_hf_bitmask12 { @@ -704,15 +740,10 @@ enum bnxt_ulp_hf_bitmask12 { BNXT_ULP_HF12_BITMASK_O_IPV4_CSUM = 0x0000400000000000, BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_CSUM = 0x0000001000000000, - BNXT_ULP_HF12_BITMASK_O_TCP_URP = 0x0000000800000000 + BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF12_BITMASK_O_UDP_LENGTH = 0x0000020000000000, + BNXT_ULP_HF12_BITMASK_O_UDP_CSUM = 0x0000010000000000 }; enum bnxt_ulp_hf_bitmask13 { @@ -726,18 +757,25 @@ enum bnxt_ulp_hf_bitmask13 { BNXT_ULP_HF13_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, BNXT_ULP_HF13_BITMASK_OI_VLAN_VID = 0x0080000000000000, BNXT_ULP_HF13_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF13_BITMASK_O_UDP_LENGTH = 0x0000080000000000, - BNXT_ULP_HF13_BITMASK_O_UDP_CSUM = 0x0000040000000000 + BNXT_ULP_HF13_BITMASK_O_IPV4_VER = 0x0020000000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_TOS = 0x0010000000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_LEN = 0x0008000000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_TTL = 0x0001000000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_CSUM = 0x0000400000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, + BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_CSUM = 0x0000001000000000, + BNXT_ULP_HF13_BITMASK_O_TCP_URP = 0x0000000800000000 }; enum bnxt_ulp_hf_bitmask14 { @@ -759,15 +797,10 @@ enum bnxt_ulp_hf_bitmask14 { BNXT_ULP_HF14_BITMASK_O_IPV6_TTL = 0x0001000000000000, BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_CSUM = 0x0000004000000000, - BNXT_ULP_HF14_BITMASK_O_TCP_URP = 0x0000002000000000 + BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF14_BITMASK_O_UDP_LENGTH = 0x0000080000000000, + BNXT_ULP_HF14_BITMASK_O_UDP_CSUM = 0x0000040000000000 }; enum bnxt_ulp_hf_bitmask15 { @@ -781,47 +814,23 @@ enum bnxt_ulp_hf_bitmask15 { BNXT_ULP_HF15_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, BNXT_ULP_HF15_BITMASK_OI_VLAN_VID = 0x0080000000000000, BNXT_ULP_HF15_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF15_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF15_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF15_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF15_BITMASK_O_UDP_CSUM = 0x0000010000000000, - BNXT_ULP_HF15_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000, - BNXT_ULP_HF15_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000, - BNXT_ULP_HF15_BITMASK_T_VXLAN_VNI = 0x0000002000000000, - BNXT_ULP_HF15_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000, - BNXT_ULP_HF15_BITMASK_I_ETH_DMAC = 0x0000000800000000, - BNXT_ULP_HF15_BITMASK_I_ETH_SMAC = 0x0000000400000000, - BNXT_ULP_HF15_BITMASK_I_ETH_TYPE = 0x0000000200000000, - BNXT_ULP_HF15_BITMASK_IO_VLAN_CFI_PRI = 0x0000000100000000, - BNXT_ULP_HF15_BITMASK_IO_VLAN_VID = 0x0000000080000000, - BNXT_ULP_HF15_BITMASK_IO_VLAN_TYPE = 0x0000000040000000, - BNXT_ULP_HF15_BITMASK_II_VLAN_CFI_PRI = 0x0000000020000000, - BNXT_ULP_HF15_BITMASK_II_VLAN_VID = 0x0000000010000000, - BNXT_ULP_HF15_BITMASK_II_VLAN_TYPE = 0x0000000008000000, - BNXT_ULP_HF15_BITMASK_I_IPV4_VER = 0x0000000004000000, - BNXT_ULP_HF15_BITMASK_I_IPV4_TOS = 0x0000000002000000, - BNXT_ULP_HF15_BITMASK_I_IPV4_LEN = 0x0000000001000000, - BNXT_ULP_HF15_BITMASK_I_IPV4_FRAG_ID = 0x0000000000800000, - BNXT_ULP_HF15_BITMASK_I_IPV4_FRAG_OFF = 0x0000000000400000, - BNXT_ULP_HF15_BITMASK_I_IPV4_TTL = 0x0000000000200000, - BNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID = 0x0000000000100000, - BNXT_ULP_HF15_BITMASK_I_IPV4_CSUM = 0x0000000000080000, - BNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR = 0x0000000000040000, - BNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR = 0x0000000000020000, - BNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT = 0x0000000000010000, - BNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT = 0x0000000000008000, - BNXT_ULP_HF15_BITMASK_I_UDP_LENGTH = 0x0000000000004000, - BNXT_ULP_HF15_BITMASK_I_UDP_CSUM = 0x0000000000002000 + BNXT_ULP_HF15_BITMASK_O_IPV6_VER = 0x0020000000000000, + BNXT_ULP_HF15_BITMASK_O_IPV6_TC = 0x0010000000000000, + BNXT_ULP_HF15_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, + BNXT_ULP_HF15_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, + BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, + BNXT_ULP_HF15_BITMASK_O_IPV6_TTL = 0x0001000000000000, + BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, + BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_CSUM = 0x0000004000000000, + BNXT_ULP_HF15_BITMASK_O_TCP_URP = 0x0000002000000000 }; enum bnxt_ulp_hf_bitmask16 { @@ -852,7 +861,30 @@ enum bnxt_ulp_hf_bitmask16 { BNXT_ULP_HF16_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000, BNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000, BNXT_ULP_HF16_BITMASK_T_VXLAN_VNI = 0x0000002000000000, - BNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000 + BNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000, + BNXT_ULP_HF16_BITMASK_I_ETH_DMAC = 0x0000000800000000, + BNXT_ULP_HF16_BITMASK_I_ETH_SMAC = 0x0000000400000000, + BNXT_ULP_HF16_BITMASK_I_ETH_TYPE = 0x0000000200000000, + BNXT_ULP_HF16_BITMASK_IO_VLAN_CFI_PRI = 0x0000000100000000, + BNXT_ULP_HF16_BITMASK_IO_VLAN_VID = 0x0000000080000000, + BNXT_ULP_HF16_BITMASK_IO_VLAN_TYPE = 0x0000000040000000, + BNXT_ULP_HF16_BITMASK_II_VLAN_CFI_PRI = 0x0000000020000000, + BNXT_ULP_HF16_BITMASK_II_VLAN_VID = 0x0000000010000000, + BNXT_ULP_HF16_BITMASK_II_VLAN_TYPE = 0x0000000008000000, + BNXT_ULP_HF16_BITMASK_I_IPV4_VER = 0x0000000004000000, + BNXT_ULP_HF16_BITMASK_I_IPV4_TOS = 0x0000000002000000, + BNXT_ULP_HF16_BITMASK_I_IPV4_LEN = 0x0000000001000000, + BNXT_ULP_HF16_BITMASK_I_IPV4_FRAG_ID = 0x0000000000800000, + BNXT_ULP_HF16_BITMASK_I_IPV4_FRAG_OFF = 0x0000000000400000, + BNXT_ULP_HF16_BITMASK_I_IPV4_TTL = 0x0000000000200000, + BNXT_ULP_HF16_BITMASK_I_IPV4_PROTO_ID = 0x0000000000100000, + BNXT_ULP_HF16_BITMASK_I_IPV4_CSUM = 0x0000000000080000, + BNXT_ULP_HF16_BITMASK_I_IPV4_SRC_ADDR = 0x0000000000040000, + BNXT_ULP_HF16_BITMASK_I_IPV4_DST_ADDR = 0x0000000000020000, + BNXT_ULP_HF16_BITMASK_I_UDP_SRC_PORT = 0x0000000000010000, + BNXT_ULP_HF16_BITMASK_I_UDP_DST_PORT = 0x0000000000008000, + BNXT_ULP_HF16_BITMASK_I_UDP_LENGTH = 0x0000000000004000, + BNXT_ULP_HF16_BITMASK_I_UDP_CSUM = 0x0000000000002000 }; enum bnxt_ulp_hf_bitmask17 { @@ -879,7 +911,11 @@ enum bnxt_ulp_hf_bitmask17 { BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, BNXT_ULP_HF17_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF17_BITMASK_O_UDP_CSUM = 0x0000010000000000 + BNXT_ULP_HF17_BITMASK_O_UDP_CSUM = 0x0000010000000000, + BNXT_ULP_HF17_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000, + BNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000, + BNXT_ULP_HF17_BITMASK_T_VXLAN_VNI = 0x0000002000000000, + BNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000 }; enum bnxt_ulp_hf_bitmask18 { @@ -903,15 +939,10 @@ enum bnxt_ulp_hf_bitmask18 { BNXT_ULP_HF18_BITMASK_O_IPV4_CSUM = 0x0000400000000000, BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_CSUM = 0x0000001000000000, - BNXT_ULP_HF18_BITMASK_O_TCP_URP = 0x0000000800000000 + BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF18_BITMASK_O_UDP_LENGTH = 0x0000020000000000, + BNXT_ULP_HF18_BITMASK_O_UDP_CSUM = 0x0000010000000000 }; enum bnxt_ulp_hf_bitmask19 { @@ -925,18 +956,25 @@ enum bnxt_ulp_hf_bitmask19 { BNXT_ULP_HF19_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, BNXT_ULP_HF19_BITMASK_OI_VLAN_VID = 0x0080000000000000, BNXT_ULP_HF19_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_LENGTH = 0x0000080000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_CSUM = 0x0000040000000000 + BNXT_ULP_HF19_BITMASK_O_IPV4_VER = 0x0020000000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_TOS = 0x0010000000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_LEN = 0x0008000000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_TTL = 0x0001000000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_CSUM = 0x0000400000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, + BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_CSUM = 0x0000001000000000, + BNXT_ULP_HF19_BITMASK_O_TCP_URP = 0x0000000800000000 }; enum bnxt_ulp_hf_bitmask20 { @@ -958,15 +996,10 @@ enum bnxt_ulp_hf_bitmask20 { BNXT_ULP_HF20_BITMASK_O_IPV6_TTL = 0x0001000000000000, BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_CSUM = 0x0000004000000000, - BNXT_ULP_HF20_BITMASK_O_TCP_URP = 0x0000002000000000 + BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF20_BITMASK_O_UDP_LENGTH = 0x0000080000000000, + BNXT_ULP_HF20_BITMASK_O_UDP_CSUM = 0x0000040000000000 }; enum bnxt_ulp_hf_bitmask21 { @@ -980,16 +1013,66 @@ enum bnxt_ulp_hf_bitmask21 { BNXT_ULP_HF21_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, BNXT_ULP_HF21_BITMASK_OI_VLAN_VID = 0x0080000000000000, BNXT_ULP_HF21_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000 + BNXT_ULP_HF21_BITMASK_O_IPV6_VER = 0x0020000000000000, + BNXT_ULP_HF21_BITMASK_O_IPV6_TC = 0x0010000000000000, + BNXT_ULP_HF21_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, + BNXT_ULP_HF21_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, + BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, + BNXT_ULP_HF21_BITMASK_O_IPV6_TTL = 0x0001000000000000, + BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, + BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_CSUM = 0x0000004000000000, + BNXT_ULP_HF21_BITMASK_O_TCP_URP = 0x0000002000000000 }; +enum bnxt_ulp_hf_bitmask22 { + BNXT_ULP_HF22_BITMASK_SVIF_INDEX = 0x8000000000000000, + BNXT_ULP_HF22_BITMASK_O_ETH_DMAC = 0x4000000000000000, + BNXT_ULP_HF22_BITMASK_O_ETH_SMAC = 0x2000000000000000, + BNXT_ULP_HF22_BITMASK_O_ETH_TYPE = 0x1000000000000000, + BNXT_ULP_HF22_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, + BNXT_ULP_HF22_BITMASK_OO_VLAN_VID = 0x0400000000000000, + BNXT_ULP_HF22_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, + BNXT_ULP_HF22_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, + BNXT_ULP_HF22_BITMASK_OI_VLAN_VID = 0x0080000000000000, + BNXT_ULP_HF22_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_VER = 0x0020000000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_TOS = 0x0010000000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_LEN = 0x0008000000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_TTL = 0x0001000000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_CSUM = 0x0000400000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, + BNXT_ULP_HF22_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000 +}; + +enum bnxt_ulp_hf_bitmask23 { + BNXT_ULP_HF23_BITMASK_SVIF_INDEX = 0x8000000000000000, + BNXT_ULP_HF23_BITMASK_O_ETH_DMAC = 0x4000000000000000, + BNXT_ULP_HF23_BITMASK_O_ETH_SMAC = 0x2000000000000000, + BNXT_ULP_HF23_BITMASK_O_ETH_TYPE = 0x1000000000000000, + BNXT_ULP_HF23_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, + BNXT_ULP_HF23_BITMASK_OO_VLAN_VID = 0x0400000000000000, + BNXT_ULP_HF23_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, + BNXT_ULP_HF23_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, + BNXT_ULP_HF23_BITMASK_OI_VLAN_VID = 0x0080000000000000, + BNXT_ULP_HF23_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_VER = 0x0020000000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_TC = 0x0010000000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_TTL = 0x0001000000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, + BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000 +}; #endif -- 2.20.1