From 582085ed2f431d6ac75f984e8f4ed42881b042f6 Mon Sep 17 00:00:00 2001 From: Vidya Sagar Velumuri Date: Thu, 24 Feb 2022 23:59:00 +0530 Subject: [PATCH] common/cnxk: configure reassembly parameters When reassembly is enabled by application, set corresponding flags in SA during creation. Provide ROC API to configure reassembly unit with active and zombie limits and step size. Signed-off-by: Vidya Sagar Velumuri Acked-by: Jerin Jacob --- drivers/common/cnxk/cnxk_security.c | 10 ++++++++++ drivers/common/cnxk/roc_nix_inl.c | 23 +++++++++++++++++++++++ drivers/common/cnxk/roc_nix_inl.h | 8 ++++++++ drivers/common/cnxk/version.map | 1 + 4 files changed, 42 insertions(+) diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c index d6006d3176..ec808c0033 100644 --- a/drivers/common/cnxk/cnxk_security.c +++ b/drivers/common/cnxk/cnxk_security.c @@ -339,6 +339,16 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa, if (rc) return rc; + /* Default options for pkt_out and pkt_fmt are with + * second pass meta and no defrag. + */ + sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META; + sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG; + sa->w0.s.pkind = ROC_IE_OT_CPT_PKIND; + + if (ipsec_xfrm->options.ip_reassembly_en) + sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG; + /* ESN */ sa->w2.s.esn_en = !!ipsec_xfrm->options.esn; if (ipsec_xfrm->options.udp_encap) { diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c index fb08d3deb2..11ed157703 100644 --- a/drivers/common/cnxk/roc_nix_inl.c +++ b/drivers/common/cnxk/roc_nix_inl.c @@ -233,6 +233,29 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool inb_inl_dev, uint32_t spi) return (sa_base + ((spi & mask) * sz)); } +int +roc_nix_reassembly_configure(uint32_t max_wait_time, uint16_t max_frags) +{ + struct idev_cfg *idev = idev_get_cfg(); + struct roc_cpt *roc_cpt; + struct roc_cpt_rxc_time_cfg cfg; + + PLT_SET_USED(max_frags); + roc_cpt = idev->cpt; + if (!roc_cpt) { + plt_err("Cannot support inline inbound, cryptodev not probed"); + return -ENOTSUP; + } + + cfg.step = (max_wait_time * 1000 / ROC_NIX_INL_REAS_ACTIVE_LIMIT); + cfg.zombie_limit = ROC_NIX_INL_REAS_ZOMBIE_LIMIT; + cfg.zombie_thres = ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD; + cfg.active_limit = ROC_NIX_INL_REAS_ACTIVE_LIMIT; + cfg.active_thres = ROC_NIX_INL_REAS_ACTIVE_THRESHOLD; + + return roc_cpt_rxc_time_cfg(roc_cpt, &cfg); +} + int roc_nix_inl_inb_init(struct roc_nix *roc_nix) { diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h index 9475f00f10..1dc58f2da2 100644 --- a/drivers/common/cnxk/roc_nix_inl.h +++ b/drivers/common/cnxk/roc_nix_inl.h @@ -55,6 +55,12 @@ #define ROC_NIX_INL_MAX_SOFT_EXP_RNGS \ (PLT_MAX_ETHPORTS * ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS) +/* Reassembly configuration */ +#define ROC_NIX_INL_REAS_ACTIVE_LIMIT 0xFFF +#define ROC_NIX_INL_REAS_ACTIVE_THRESHOLD 10 +#define ROC_NIX_INL_REAS_ZOMBIE_LIMIT 0xFFF +#define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10 + static inline struct roc_onf_ipsec_inb_sa * roc_nix_inl_onf_ipsec_inb_sa(uintptr_t base, uint64_t idx) { @@ -166,6 +172,8 @@ struct roc_nix_rq *__roc_api roc_nix_inl_dev_rq(void); int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix *roc_nix, uint32_t tag_const, uint8_t tt); uint64_t __roc_api roc_nix_inl_dev_rq_limit_get(void); +int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time, + uint16_t max_frags); /* NIX Inline Outbound API */ int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix); diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index a56468c666..44adf91776 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -211,6 +211,7 @@ INTERNAL { roc_nix_ptp_tx_ena_dis; roc_nix_queues_ctx_dump; roc_nix_ras_intr_ena_dis; + roc_nix_reassembly_configure; roc_nix_register_cq_irqs; roc_nix_register_queue_irqs; roc_nix_rq_dump; -- 2.20.1